DETAILED ACTION
Status of Claims
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This action is in reply to the amendment filed on 02/24/2026.
Claims 1-20 are currently pending and have been examined.
Response to Arguments
Applicant's arguments filed 02/24/2026 have been fully considered but they are not persuasive.
Applicant argues #1:
Regarding Step 2A, Prong One, the Examiner has alleged that the claims are
directed to "mathematical concepts" relating to computation of a binary extended GCD. This characterization improperly abstracts the claims from their technical context. As described in the specification, the claims relate to "computing platforms, methods, and systems for corrections to the 'almost' binary extended greatest common denominator (also referred to as greatest common divisor) in cryptographic operations of cryptographic processes." As-Filed Specification, paragraph [00010]. The claims are not directed to computing a GCD in the abstract, but rather to a specific cryptographic computation architecture.
Claim 1 recites computing "the binary extended GCD using a multiplication with an inverse of two instead of a division by two." This is not merely a mathematical abstraction but a specific technical approach to restructuring how cryptographic computations are executed. Claim 17 recites a "first processor" that computes the binary extended GCD and issues "one or more commands to the second processor to compute, using a Montgomery multiplication, a product of the first variable (a) and the second variable (3) modulus n." This dual-processor architecture with specific command issuance represents a concrete technical implementation, not abstract mathematics.
The specification explains that aspects of the present disclosure use an "almost" extended GCD algorithm, where all divisions are deferred to the end of the computation and are substituted with multiplications. As-Filed Specification, paragraph [00016]. This deferral and substitution technique defines how the computation is performed on cryptographic hardware, not the mathematics of GCD itself. The claims recite specific technical features including tracking counters for identity applications, performing sequences of Montgomery multiplications, and computing products modulus n. These are specific computational techniques tied to cryptographic processing, not abstract mathematical relationships.
Examiners response:
The Examiner respectfully disagrees, the claims recite and are focused on several computational steps and therefor under Step 2A Prong One the claims do recite an abstract related to mathematical concepts, for example computing "the binary extended GCD using a multiplication with an inverse of two instead of a division by two." is describing mathematical concepts. Performing sequences of Montgomery multiplications, is still using the additional elements to perform a series of repetitive calculations, and therefore part of the abstract idea. The processors are analyzed under Step 2A Prong 2 and Step 2B, as addressed below.
Applicant argues #2:
Regarding Step 2A, Prong Two, even assuming the claims recite mathematical concepts, the claims integrate any such concepts into a practical application by providing a specific technological improvement to cryptographic coprocessor efficiency. The specification states that "[a]spects of the present disclosure overcome the deficiencies of traditional binary extended GCD algorithms by increasing the efficiency of the computations to compute a binary extended GCD of two input values." As-Filed Specification, paragraph [00016]. This represents a concrete improvement to computer functionality.
The specification further explains that traditional systems issue individual commands to the coprocessor to perform many small operations, and the coprocessor can be idle between these small operations because the issuer is obliged to check a status of the coprocessor, check that a command can be issued, issue the command, poll a status register for a command to finish or wait for an interrupt and process that interrupt, and check the status of the coprocessor again. As-Filed Specification, paragraph [00016].
Claim 17 specifically addresses this technical problem by reciting that the first processor issues "one or more commands to the second processor to compute, using a Montgomery multiplication" rather than issuing many smaller instructions. This is not generic data transmission but architectural coordination to achieve computational efficiency.
The specification notes that "these divisions can be supplied to the coprocessor using two Montgomery multiplications (or other modular exponentiation operations) with chosen powers of two" and "[u]sing these Montgomery multiplications, rather than using a lot of smaller instructions, allows the coprocessor and processor to operate more efficiently." As-Filed Specification, paragraph [00016]. Additionally, "the correction of the error can be fast since only 4 instructions are needed to compute the correction." As- Filed Specification, paragraph [00031]. Claims 4, 10, 14, 19, and 20 recite this specific four-Montgomery-multiplication correction sequence. The specification further notes that with "a processor and a coprocessor operating at 50 MHz, the 'almost' extended GCD algorithm reduces the required computation to a third of that of traditional algorithms." As-Filed Specification, paragraph [00016]. This quantifiable improvement demonstrates a practical application.
The Examiner's characterization of processor interaction as mere "sending and receiving data over a network" is factually incorrect. The claims restructure computation so that only a bounded number of Montgomery multiplications are issued to the coprocessor, fundamentally different from routine data transmission. The specification explains that "when using a cryptographic coprocessor, the choice of algorithms is not the same as on a desktop computer" and "it is beneficial to reduce the number of smaller operations sent to the coprocessor to minimize the overhead of managing the communications with the coprocessor." As-Filed Specification, paragraph [00017]. The claims are specifically tailored to address this technical challenge unique to cryptographic coprocessor systems.
Examiners response:
The Examiner respectfully disagrees, the Examiner fails to see how the additional elements themselves have been improved. The applicant alleges that “aspects of the present disclosure overcome the deficiencies of traditional binary extended GCD algorithms by increasing the efficiency of the computations to compute a binary extended GCD of two input values.”, provides a technical improvement, i.e., “by reciting that the first processor issues "one or more commands to the second processor to compute, using a Montgomery multiplication.” The Examiner fails to see how this amounts to a technical improvement as the Courts have shown it’s well-understood, routine and conventional to use a computer to perform repetitive calculations (see Performing repetitive calculations, Flook, 437 U.S. at 594, 198 USPQ2d at 199 (recomputing or readjusting alarm limit values); Bancorp Services v. Sun Life, 687 F.3d 1266, 1278, 103 USPQ2d 1425, 1433 (Fed. Cir. 2012) ("The computer required by some of Bancorp’s claims is employed only for its most basic function, the performance of repetitive calculations, and as such does not impose meaningful limits on the scope of those claims.")). Further sending commands to a second processor to perform Montgomery multiplication sequences does not amount to technical improvement as applicant’s specification provides that Montgomery multiplications are typically used [0014] for large numbers. While the number of calculations may have been reduced, reducing the number of steps in an abstract sequence is not a technical improvement, the Federal Circuit has also indicated that mere automation of manual processes or increasing the speed of a process where these purported improvements come solely from the capabilities of a general-purpose computer are not sufficient to show an improvement in computer-functionality. FairWarning IP, LLC v. Iatric Sys., 839 F.3d 1089, 1095, 120 USPQ2d 1293, 1296 (Fed. Cir. 2016); Credit Acceptance Corp. v. Westlake Services, 859 F.3d 1044, 1055, 123 USPQ2d 1100, 1108-09 (Fed. Cir. 2017). Similarly, the Federal Circuit has indicated that a claim must include more than conventional implementation on generic components or machinery to qualify as an improvement to an existing technology (see MPEP 2106.04(a)). Therefore this argument is not persuasive.
Applicant argues #3:
Regarding Step 2B, the Examiner provides no evidence that it was conventional to eliminate divisions during extended GCD computation, track missed divisions via counters for later correction, or consolidate correction into a fixed number of Montgomery multiplications. Notably, the Examiner acknowledges that "the prior art of record fails to anticipate or render obvious the claimed subject matter" and that "one of ordinary skill in the art would not be motivated to modify the teachings of the prior art to provide the systems and method of claims 1, 11, and 17." Office Action, page 7. This admission confirms that the claimed combination is not routine or conventional.
Claims 3-5, 7-10, 13-16, and 18-20 recite specific implementation details including initialization operations, identity applications, counter tracking, and sequences of Montgomery multiplications. For example, claims 4 and 14 recite performing four specific Montgomery multiplications with particular operands and intermediate values to correct accumulated error. This specific ordered combination represents a non- conventional execution strategy. The specification explains that "[t]he divisions by two in Algorithm 1 of FIG. 2 can be replaced with a multiplication with the inverse of two" and "[b]y combining the multiplication substitution with the 'almost' modular inverse, all of these multiplications get pushed to an end of the algorithm." As-Filed Specification, paragraph [00027]. This specific technique of deferring and consolidating operations is not a well-understood, routine, or conventional approach.
The Examiner's citation to buySAFE and Flook for the proposition that "receiving and transmitting data" and "performing repetitive calculations" are conventional is inapposite. The claims do not merely perform repetitive calculations they restructure how calculations are performed to minimize processor-coprocessor interaction and improve efficiency.
Dependent claims 2-10, 12-16, and 18-20 are patent eligible for the same reasons as independent claims 1, 11, and 17 from which they depend. These dependent claims further recite specific technical implementation details that reinforce the technological nature of the claimed subject matter.
For at least the foregoing reasons, claims 1-20 are patent eligible under 35 U.S.C. § 101 and Applicant respectfully requests withdrawal of this rejection.
Examiners response:
The Examiner respectfully disagrees, with respect to lack of prior art rejections, just because claims may be novel under § 103 over a number of prior art rejections does not mean they are not directed to an abstract idea. Cf. Intellectual Ventures ILLCv. Symantec Corp., 838 F.3d 1307, 1315 (Fed. Cir. 2016).
Indeed, “[t]he ‘novelty’ of any element or steps in a process, or even of the process itself, is of no relevance in determining whether the subject matter of a claim falls within the § 101 categories of possibly patentable subject matter.” Diamond v. Diehr, 450 U.S. 175, 188—89 (1981) (emphasis added); see also Mayo, 132 S. Ct. at 1303—04 (rejecting “the Government’s invitation to substitute §§ 102, 103, and 112 inquiries for the better established inquiry under § 101”). Here, the jury’s general finding that Symantec did not prove by clear and convincing evidence that three particular prior art references do not disclose all the limitations of or render obvious the asserted claims does not resolve the question of whether the claims embody an inventive concept at the second step of Mayo/Alice.
As previously stated, while the number of calculations may have been reduced, reducing the number of steps in an abstract sequence is not a technical improvement, the Federal Circuit has also indicated that mere automation of manual processes or increasing the speed of a process where these purported improvements come solely from the capabilities of a general-purpose computer are not sufficient to show an improvement in computer-functionality. FairWarning IP, LLC v. Iatric Sys., 839 F.3d 1089, 1095, 120 USPQ2d 1293, 1296 (Fed. Cir. 2016); Credit Acceptance Corp. v. Westlake Services, 859 F.3d 1044, 1055, 123 USPQ2d 1100, 1108-09 (Fed. Cir. 2017). Similarly, the Federal Circuit has indicated that a claim must include more than conventional implementation on generic components or machinery to qualify as an improvement to an existing technology (see MPEP 2106.04(a)). Therefore this argument is not persuasive.
For the reasons above, the 101 rejection is hereby maintained.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more, and fails step 2 of the analysis because the focus of the claims is not on the devices themselves or a practical application but rather directed towards an abstract idea, the analysis is provided below.
Step 1 (Statutory Categories) - The claims pass step 1 of the subject matter eligibility test (see MPEP 2106(III)) as the claims are directed towards two systems, and a method.
Step 2A – Prong One (Do the claims recite an abstract idea?) -
Claim 1 recites an idea in the claims, in part, by:
receive, from a cryptographic process, a command to compute a binary extended GCD of a first input value (x) and a second input value (y) for a cryptographic operation;
compute the binary extended GCD of the first input value (x) and the second input value (y) using the binary extended GCD algorithm to obtain a first output value ( a), wherein the binary extended GCD algorithm computes the binary extended GCD using a multiplication with an inverse of two instead of a division by two, wherein the binary extended GCD algorithm computes a second output value (u) and a third output value (v), wherein the second output value is a first integer (a) and the third output value is a second integer (b ), wherein a sum of a first product of the first integer and the first input value (x) and a second product of the second integer and the second input value (y) is equal to the first output value; and
return, to the cryptographic process, the first output value (a), the second output value (u), and the third output value (v).
Claim 11, while varying in scope, recites a similar abstract idea, in part, by:
receiving, from a cryptographic process, a command to compute a binary extended greatest common denominator (GCD) of a first input value (x) and a second input value (y) for a cryptographic operation;
computing, by a binary extended GCD algorithm, the binary extended GCD using a multiplication with an inverse of two, instead of a division by two, to obtain a first output value (a);
computing, by the binary extended GCD algorithm, a second output value (u) and a third output value (v), wherein the second output value is a first integer (a) and the third output value is a second integer (b ), wherein a sum of a first product of the first integer and the first input value (x) and a second product of the second integer and the second input value (y) is equal to the first output value; and
returning, to the cryptographic process, the first output value (a), the second output value (u), and the third output value (v).
And claim 17, while varying in scope, recites a similar abstract idea, in part, by:
compute, as part of a cryptographic operation, a binary extended GCD of a first input value (x) and a second input value (y) using the binary extended GCD algorithm to obtain a first output value (a), a second output value (u), and a third output value (v), wherein the binary extended GCD algorithm computes the binary extended GCD using a multiplication with an inverse of two instead of a division by two, wherein the second output value is a first integer (a) and the third output value is a second integer (b ), wherein a sum of a first product of the first integer and the first input value (x) and a second product of the second integer and the second input value (y) is equal to the first output value;
track a first number of times a first identity is applied by the binary extended GCD algorithm until a condition is met, wherein the condition comprises a first variable (a) being equal to a second variable (P) or the second variable (P) being equal to zero;
multiply the first output value (a) by two to the power of the first number to obtain the binary extended GCD;
issue one or more commands to compute, using a Montgomery multiplication, a product of the first variable (a) and the second variable (P) modulus n, where n is an input modulus value specified by the cryptographic operation;
receive the second output value (u) and the third output value (v); and
output the first output value (a), the second output value (u), and the third output value (v).
The steps recited above under the broadest reasonable interpretation covers Mathematical concepts – mathematical relationships, mathematical formulas or equations, mathematical calculations but for the recitation of generic computer components. That is other than reciting a computing system, memory device, processor device, a first processor and second processor nothing in the claim elements are directed towards anything other than Mathematical concepts for computing an extended binary greatest common denominator and therefore, under its broadest reasonable interpretation, falls within the “Mathematical concepts” groupings of abstract ideas. Accordingly, the claims recite an abstract idea.
Step 2A – Prong Two (Does the claim recite additional elements that integrate the judicial exception into a practical application?) - This judicial exception is not integrated into a practical application. In particular, the system claims only recite the additional elements of a computing system, memory device, processor device, a first processor and second processor. Examiner notes, the method claims (claims 11-16) recite no additional elements and are purely abstract method steps and therefor recite no additional elements to integrate the idea into a practical application. With respect to the systems, the computing system, memory device, processor device, a first processor and second processor are recited at a high level of generality such that it amounts to no more than mere instructions to apply the exception using generic computer components. Mere instructions to apply the judicial exception using generic computer components (see MPEP 20106.05(f)). The specification describes these elements as generic components in [0020] of the specification which describes the memory and processors as generic components as “The electronic device 100 includes one or more processor(s) 130, such as one or more CPUs, microcontrollers, field programmable gate arrays, or other types of processors. The one or more processor(s) 130 can include one or more processing cores. The electronic device 100 can also include one or more cryptographic processor(s) 134. The cryptographic processor(s) 134 can be dedicated processing logic comprising hardware, software, firmware, or any combination thereof for handling computations, including computations for a cryptographic process. The cryptographic process can be performed by the processor(s) 130 as the main processor and can issue one or more instructions 132 to the cryptographic processor(s) 134 for computations, such as one or more Montgomery multiplications for computing the binary extended GCD. The electronic device 100 also includes system memory 106, which may correspond to any combination of volatile and/or non-volatile storage mechanisms.”. Accordingly, these additional elements do not integrate the abstract idea into a practical application because they do not impose any meaningful limits on practicing the abstract idea. The claims are directed towards an abstract idea.
Step 2B (Does the claim recite additional elements that amount to significantly more than the judicial exception?) - The claims do not include additional elements that are sufficient to amount to significantly more than the judicial exception because, as discussed above, with respect to integration of the abstract idea into a practical application, the additional elements of using computing system, memory device, processor device, a first processor and second processor to perform the steps recited in Step 2A Prong One of the analysis, amounts to no more than mere instructions to apply the exception using generic computer components. Mere instructions to apply an exception using a generic computer component cannot provide an inventive concept. The additional elements have been considered separately, and as an ordered combination, and do not add significantly more (also known as an “inventive concept”) to the judicial exception. Further, MPEP 2106.05(d)(ii) provides that receiving and transmitting data over a network (see buySAFE, Inc. v. Google, Inc., 765 F.3d 1350, 1355, 112 USPQ2d 1093, 1096 (Fed. Cir. 2014) (computer receives and sends information over a network), and Performing repetitive calculations, Flook, 437 U.S. at 594, 198 USPQ2d at 199 (recomputing or readjusting alarm limit values); Bancorp Services v. Sun Life, 687 F.3d 1266, 1278, 103 USPQ2d 1425, 1433 (Fed. Cir. 2012) ("The computer required by some of Bancorp’s claims is employed only for its most basic function, the performance of repetitive calculations, and as such does not impose meaningful limits on the scope of those claims."); are well-understood routine and conventional, similar to the instant application claims which recites issuing commands to second processor (i.e. sending and receiving data over network) compute output values using the binary extended GCD algorithm (i.e. perform repetitive calculations). Additionally, applicant’s specification [0015] shows that traditional systems issue commands to coprocessors to perform mathematical operations and applicant’s specification provides that Montgomery multiplications are typically used [0014] for large numbers. Thus, the claims are not patent eligible.
The dependent claims have been given the full analysis including analyzing the additional limitations both individually and in combination as a whole. For instance, claims 2-10, 12-16, and 18-20 are all steps that fall within the “Mathematical Concepts” groupings of abstract ideas, amounting to mere instructions to apply the idea, and with respect to the issuing commands to a second processor, as discussed above, this amounts to sending and receiving data over network and performing repetitive calculations and ineligible for the same reasons as above. The Dependent claims when analyzed both individually and in combination are also held to be patent ineligible under 35 U.S.C. 101 for the same reasoning as above and the additional recited limitations fail to establish that the claims are not directed to an abstract idea. The additional limitations of the dependent claims when considered individually and as an ordered combination do not amount to significantly more than the abstract idea.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to GREGORY S CUNNINGHAM II whose telephone number is (313)446-6564. The examiner can normally be reached Mon-Fri 8:30am-4pm.
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GREGORY S. CUNNINGHAM II
Primary Examiner
Art Unit 3694
/GREGORY S CUNNINGHAM II/Primary Examiner, Art Unit 3694