DETAILED ACTION
Response to Arguments
Applicant’s arguments with respect to claim(s) pending have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 14, 26 is/are rejected under 35 U.S.C. 103 as being unpatentable over U.S. PGPub 2005/0213873 A by Piede et al.
Regarding claim 1, Piede teaches an apparatus (Fig. 6) comprising: a glass substrate (insulating layer 12) comprising: one or more waveguides (silicon/SOI waveguides 92, 94, 96, 98); and one or more curved mirrors (104, 106) defined in the glass substrate, wherein individual waveguides (92, 96) of the one or more waveguides are to direct light to individual curved mirrors (92 directs light to 104 and 96 directs light to 112) of the one or more curved mirrors, wherein individual curved mirrors of the one or more curved mirrors are to collimate light from individual waveguides of the one or more waveguides (as discussed in at least ¶[0039], [0040]). It is noted, based on applicant’s own claim 14, a surface capable of reflecting light signals via TIR constitutes a mirror.
While Piede does not specify that the insulating layer (12) is glass, SOI-based structures are commonly manufactured by oxidizing a silicon wafer to form a dielectric silicon dioxide layer, i.e., a buried oxide (BOX) layer below the SOI layer, and Official notice is taken that such a modification or design choice would have been well within the knowledge of one having ordinary skill in the art, before the effective filing date of the claimed invention. Using a well-known material and process has various advantages in quality, cost and industrial applications.
Regarding claim 14, Piede further teaches that individual curved mirrors of the one or more curved mirrors defined in the glass substrate are reflective due to total internal reflection. (¶[0039])
Regarding claim 26, Piede further teaches each of the one or more curved mirrors is formed in a respective cavity in the glass substrate (by etching to form the curved surfaces), and wherein the respective cavity is backfilled with a material (by an insulating material such as silicon dioxide or silicon nitride to ensure TIR, ¶[0039]) such that a surface of the glass substrate adjacent the cavity is planarized (see various horizontal and vertical end surfaces of the SOI layer 14 as illustrated in Fig. 6).
Claim(s) 2, 11-13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Piede et al. as applied to claim 1 above, and further in view of JP 2001141965 A patent publication by Furukawa (copy and English translation previously provided).
Regarding claim 2, Piede teaches the apparatus comprising the waveguides and mirrors, wherein the waveguides appear to redirect a focused propagating signal into output waveguiding regions (94, 98) laterally, or to side surface of the apparatus, instead of out of the top surface as claimed. Furukawa teaches an apparatus (Fig. 8) comprising: a glass substrate (11, Si, quartz or glass, 7th page of the translation) or comprising: one or more waveguides (617); and one or more curved mirrors (elliptical concave portion 13 and reflective film 15) defined in the glass substrate, a photonic integrated circuit (PIC) die (substrate 25 having the laser 27 formed thereon in Fig. 8, and similarly in Fig. 10, and also shown as LSI chips 911 in Fig. 11) mounted on a top surface of the glass substrate, wherein individual curved mirrors of the one or more curved mirrors are to direct a focused light from individual waveguides of the one or more waveguides out of the top surface towards the PIC die (as illustrated in Figs. 8, 10). It would have been obvious to one having ordinary skill in the art, before the effective filing date of the claimed invention, to modify Piede’s invention, by redirecting the focused propagating signal out of the top surface of the apparatus to a PIC die mounted thereon, i.e., stacking dies for heterogeneous integration, as suggested by Furukawa’s design. Advantages of such designs include, among others, smaller footprint or device size as well as improvements in thermal management and power consumption.
Regarding claims 11-13, Furukawa further suggests that individual curved mirrors of the one or more curved mirrors defined in the glass substrate comprise an aluminum reflective surface (7th page of the translation), or a dielectric stack and due to total internal reflection (a dielectric multilayer film such as Si / SiO2, 7th page of the translation). These means of reflections are all commonly known and among a finite number of identified, predictable solutions for reflecting optical signals and would have been obvious to one having ordinary skill in the art to try with a reasonable expectation of success.
Claim(s) 4-7, 9, 10, 28 is/are rejected under 35 U.S.C. 103 as being unpatentable over Piede et al. and Furukawa as applied to claim 1 above, and further in view of U.S. PGPub 2021/0271037 by Brusberg et al.
Regarding claims 4-7, Furukawa teaches (Fig. 11) the glass substrate (901) having the plurality of PICs (LSI chips 911) mounted thereon and connected using electrical contacts/pads (illustrated but not described). Brusberg teaches an optical-electrical device (Fig. 18) comprising a glass substate (662, made of glass as stated through the disclosure), a plurality of PIC (685), a plurality of solder bumps (689) that join the glass substrate and the PIC die, wherein individual solder bumps of the plurality of solder bumps electrically couple the glass substrate to the PIC die (Fig. 18), wherein the glass substrate comprises a plurality of through-glass vias (676), wherein individual through-glass vias of the plurality of through- glass vias are electrically coupled to individual solder bumps of the plurality of solder bumps (Fig. 18), an electronic integrated circuit (EIC) die (688) mounted on the top surface of the glass substrate, further comprising an additional plurality of solder bumps (689) that join the glass substrate (662) and the EIC die (Fig. 18), wherein individual solder bumps of the additional plurality of solder bumps electrically couple the glass substrate to the EIC die (Fig. 18), wherein the glass substrate comprises a plurality of through-glass vias (678(, wherein individual through-glass vias of the plurality of through-glass vias are electrically coupled to individual solder bumps of the additional plurality of solder bumps (Fig. 18); and a redistribution layer (680) on a top surface of the glass substrate. It would have been obvious to one having ordinary skill in the art, before the effective filing date of the claimed invention, to modify the invention suggested by Piede and Furukawa, by further including an EIC on the glass substrate, e.g., for performing the electric function of the transceiver in Furukawa’s invention, and further using solder bumps to electrically couple the glass substrate and the EIC and PIC, which allows vertical 3D integration of the circuits, and further using the redistribution layer, for conducting signals among the PICs (685) and EIC (688).
Regarding claim 9, Brusberg further suggests using an optical connector (Figs. 10A-E), wherein an interface for the optical connector is defined in the glass substrate (upper surface 504 of glass substrate 502, Fig. 10B), wherein the optical connector is mated with the glass substrate (alignment pins 512 and corresponding slots 508). The connector provides a simple, passive alignment means to couple the waveguides and photonic devices to external optical components.
Regarding claim 10, Brusberg further suggest using a redistribution layer (680) on top of the glass substrate (662), for the purpose of conducting signals laterally between multiple PICs (685) and/or an EIC (688).
Regarding claim 28, Piede does not teach using alignment pins interfacing with an optical connector that comprises one or more optical fibers and equivalents thereof. Brusberg also teaches a glass substrate (470) comprising a plurality of glass optical waveguides (475), a recessed alignment pin interface (slots 478) for interfacing with a multi-fiber optical connector (480), i.e., the slots receive alignment pins (482) of the connector (480). It would have been obvious to one having ordinary skill in the art, before the effective filing date of the claimed invention, to modify Furukawa’s invention, by adding slots in the glass substrate for interfacing with the connector, in order to provide a simple, passive alignment structure between the optical waveguides and fibers in the multi-fiber connector.
Claim(s) 15, 16, 18, 21 is/are rejected under 35 U.S.C. 103 as being unpatentable over Piede et al. in view of Brusberg et al.
Regarding claim 15, Piede teaches an apparatus (Fig. 6) comprising: a glass substrate (12) comprising: one or more waveguides (92, 94, 96, 98); and one or more curved mirrors (104, 112) defined in the glass substrate. Piede does not teach using alignment pins interfacing with an optical connector that comprises one or more optical fibers and equivalents thereof. Brusberg also teaches a glass substrate (470) comprising a plurality of glass optical waveguides (475), an alignment pin interface (slots 478) for interfacing with a multi-fiber optical connector (480), i.e., the slots receive alignment pins (482) of the connector (480). It would have been obvious to one having ordinary skill in the art, before the effective filing date of the claimed invention, to modify Furukawa’s invention, by adding slots in the glass substrate for interfacing with the connector, in order to provide a simple, passive alignment structure between the optical waveguides and fibers in the multi-fiber connector.
Regarding claim 16, Piede further teaches the means for collimating light from the one or more optical fibers comprises one or more curved mirrors (104, 112) defined in the glass substrate (11).
Regarding claim 18, Brusberg further suggests (Fig. 18) using a plurality of solder bumps (689) that join the glass substrate (662) and the PIC die (685), wherein individual solder bumps of the plurality of solder bumps electrically couple the glass substrate to the PIC die. It would have been obvious to one having ordinary skill in the art, before the effective filing date of the claimed invention, to modify Furukawa’s invention, by further using solder bumps to electrically couple the glass substrate and the EIC and PIC, which allows vertical 3D integration of the circuits.
Regarding claim 21, Furukawa further teaches a second PIC die mounted on the top surface of the glass substrate (four PICs are mounted on the glass substrate as illustrated in Fig. 11), the glass substrate further comprising means for receiving collimated light from the second PIC die and directing corresponding collimated light to the PIC die. Since Piede uses both input waveguides (92, 96) and output waveguides (94, 98) and thus requires both input and output ports for the propagating signals therein, it would have been obvious to one having ordinary skill in the art, before the effective filing date of the claimed invention, to use mirrors capable of collimating and focusing the light as shown in Piede’s invention, on both the transmitting and receiving sides of the optical waveguide to communicate with first and second PIC dies, respectively, in order to reduce divergence and loss of optical signals propagating between optical components.
Claim(s) 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Piede et al. and Brusberg et al. as applied to claim 15 above, and further in view of JP 2001141965 A patent publication by Furukawa (copy and English translation previously provided).
Regarding claim 17, Piede teaches the apparatus comprising the waveguides and mirrors, wherein the waveguides appear to redirect a focused propagating signal into output waveguiding regions (94, 98) laterally, or to side surface of the apparatus, instead of out of the top surface as claimed. Furukawa teaches an apparatus (Fig. 8) comprising: a glass substrate (11, Si, quartz or glass, 7th page of the translation) or comprising: one or more waveguides (617); and one or more curved mirrors (elliptical concave portion 13 and reflective film 15) defined in the glass substrate, a photonic integrated circuit (PIC) die (substrate 25 having the laser 27 formed thereon in Fig. 8, and similarly in Fig. 10, and also shown as LSI chips 911 in Fig. 11) mounted on a top surface of the glass substrate, wherein individual curved mirrors of the one or more curved mirrors are to direct a focused light from individual waveguides of the one or more waveguides out of the top surface towards the PIC die (as illustrated in Figs. 8, 10). It would have been obvious to one having ordinary skill in the art, before the effective filing date of the claimed invention, to modify Piede’s invention, by redirecting the focused propagating signal out of the top surface of the apparatus to a PIC die mounted thereon, i.e., stacking dies for heterogeneous integration, as suggested by Furukawa’s design. Advantages of such designs include, among others, smaller footprint or device size as well as improvements in thermal management and power consumption.
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
The broadest reasonable interpretation of a claim element is limited by the description in the specification when 35 U.S.C. 112(f) is invoked, therefore, means for interfacing with an optical connector that comprises one or more optical fibers and means for collimating light from the one or more optical fibers in claims 15-17, 29, 30 are interpreted as alignment pins that interfaces with an optical connector and curved mirror that is capable of collimating light from the one or more optical fibers, respectively; means for receiving collimated light from the second PIC die and directing corresponding collimated light to the PIC die in claim 21 is interpreted as curved mirror that is capable of collimating light to and from a PIC die.
Allowable Subject Matter
Claim 3 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Analogous and relevant prior art fails to teach or further suggest the PIC die comprises one or more waveguides, the apparatus further comprising an optical insert mounted on the PIC die, wherein the optical insert comprises one or more curved mirrors, wherein individual curved mirrors of the one or more curved mirrors of the optical insert are to focus light collimated by individual curved mirrors of the one or more curved mirrors of the glass substrate to individual waveguides of the one or more waveguides of the PIC die, when considered in view of the rest of the limitations of the claimed invention.
Claim 8 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Analogous and relevant prior art fails to teach or further suggest a second PIC die mounted on the top surface of the glass substrate, the glass substrate further comprising a second curved mirror defined in the glass substrate and a third curved mirror defined in the glass substrate, wherein the second curved mirror is to focus collimated light from the second PIC die to a waveguide of the one or more waveguides of the glass substrate, wherein the third curved mirror is to collimate light from the waveguide into a beam and direct the beam out of the top surface towards the PIC die, when considered in view of the rest of the limitations of the claimed invention.
Claim 27 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Relevant and analogous prior art fails to further teach or suggest a planar reflective surface defined in the glass substrate, and an optical element (comprises a metasurface lens, diffractive optical element, hologram, or grating) disposed on or in the glass substrate and positioned to receive light reflected by the planar reflective surface, the optical element configured to collimate the light, when considered in view of the rest of the limitations of the claimed invention. Piede suggests the possibility of using planar surfaces (e.g., 254, 256) with a focused signal but does not further teach or suggest a rationale for the claimed optical element on the glass substrate.
Claim 29 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Prior art fails to teach or suggest the means for collimating is further configured to direct the collimated light out of a top surface of the glass substrate and toward a photonic integrated circuit (PIC) die mounted on a top surface of the glass substrate, the PIC die being optically coupled to the means for collimating, wherein the PIC die comprises one or more waveguides, the apparatus further comprising an optical insert mounted on the PIC die, wherein the optical insert comprises one or more curved mirrors, wherein individual curved mirrors of the one or more curved mirrors of the optical insert are to focus light collimated by the means for collimating to individual waveguides of the one or more waveguides of the PIC die, when considered in view of the rest of the limitations of the claimed invention.
Claim 30 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Relevant prior art fails to teach or suggest the means for collimating is to direct light from individual waveguides of the means for interfacing with an optical connector out of the top surface towards the PIC die. further comprising a second PIC die mounted on the top surface of the glass substrate, the glass substrate further comprising a second curved mirror defined in the glass substrate and a third curved mirror defined in the glass substrate, wherein the second curved mirror is to focus collimated light from the second PIC die to a waveguide of one or more waveguides of the glass substrate, wherein the third curved mirror is to collimate light from the waveguide into a beam and direct the beam out of the top surface towards the PIC die, when considered in view of the rest of the limitations of the claimed invention.
Claim 31 is allowed. Prior art of record fails to teach or suggest a photonic integrated circuit (PIC) die, wherein the PIC die comprises one or more waveguides; and an optical insert mounted on the PIC die (herein interpreted as inserted into the PIC die), wherein the optical insert comprises one or more curved mirrors, wherein individual curved mirrors of the one or more curved mirrors of the optical insert are to focus individual collimated light beams to individual waveguides of the one or more waveguides of the PIC die.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US20190265421 discloses using curved reflectors to direct light.
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/CHARLIE Y PENG/ Primary Examiner, Art Unit 2874
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