Authorization for Internet Communications
The examiner encourages Applicant to submit an authorization to communicate with the examiner via the Internet by making the following statement (from MPEP 502.03):
“Recognizing that Internet communications are not secure, I hereby authorize the USPTO to communicate with the undersigned and practitioners in accordance with 37 CFR 1.33 and 37 CFR 1.34 concerning any subject matter of this application by video conferencing, instant messaging, or electronic mail. I understand that a copy of these communications will be made of record in the application file.”
Please note that the above statement can only be submitted via Central Fax, Regular postal mail, or EFS Web (PTO/SB/439).
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Examiner Notes
Examiner cites particular columns and line numbers in the references as applied to the claims below for the convenience of the applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested that, in preparing responses, the applicant fully consider the references in entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the examiner.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-8 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claims 1, 7, and 8, recite “acquire device information of the device from the device while the processor is executing” does not make sense, and appears to contain redundant language that is difficult to comprehend. Clarification or amendment is required.
Regarding claims 2-6, are dependent upon claim 1, and are rejected for the same reasons.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-8 are rejected under 35 U.S.C. 103 as being unpatentable Veal et al. (U.S. PG PUB 2013/0339565) in view of Hayashida (U.S. PG PUB 2019/0073285).
Regarding claim 1, Veal teaches an information processing apparatus comprising:
a memory (see Fig. 5 memory); and
a processor coupled to the memory (see Fig. 5, 516 processor) and configured to: execute an operating system of the information processing apparatus (see ¶[0027] “As used herein, "host OS" refers to a lowest level OS executing on a computer platform--e.g. where any virtual machines, guest OSs or other virtualization processes of the computer platform run on top of the host OS. In an embodiment, the host OS includes an OS I/O stack and an OS I/O interface for communication between the OS I/O stack and one or more device drivers.”);
manage an operation of the information processing apparatus (see ¶ [0059] “During operation, device resource information may be exchanged within computer platform 500--e.g. the exchange in aid of representing an aggregate device to a host OS executing in processor 516”);
issue, on basis of detection of connection of a device to the information processing apparatus (see ¶[0060] “In an embodiment, enumeration information is retrieved from non-volatile memory of computer platform 500--e.g. as part of an enumeration process to identify physical devices which are present on computer platform 500. Such enumeration may, for example, be performed by boot-time software (e.g. BIOS software, UEFI software and/or the like) executing on processor 516.”), an acquisition instruction for a driver stored in the information processing apparatus for the device to acquire device information of the device from the device while the processor is executing the operating system (see ¶[0060] “The enumeration information may include PCI configuration space data or any of a variety of additional or alternative types of information which, for example, are exchanged according to conventional device enumeration techniques. The enumeration information may represent AD 512 as a distinct physical device--e.g. where the enumeration information includes a device ID which is specific to AD 512. In an embodiment, some or all of such enumeration information may also be provided to a driver for AD 512--e.g. for the driver's own internal enumeration to detect for devices.”);
Ouchi does not expressly disclose, however, Hayashida teaches start the driver stored in the information processing apparatus for the device to acquire the device information of the device from the device while the processor is executing the operating system (see ¶[0031] “boots the OS” see ¶[0034] “The IPMI driver is a program for the OS of the server 1 for communicating with a BMC 320. That is to say, the server 1 is communicable with the BMC 20 using a command compliant with the IPMI specification via an interface such as KCS, System Management Interface Chip (SMIC), and Block Transfer (BT), in accordance with the BIOS or the OS. The CPU 11 is an example of a processor and a first processor, and the I/O device 13 is an example of an electrical device.”), on basis of the acquisition instruction (see ¶ [0067] “In accordance with the instruction from the BMC 20, the activation process of the server 1 is started (S3B) and the BIOS starts the POST (S3C). The BIOS inquires of the BMC 20 about the activation mode (S3D) and the BMC 20 notifies the BIOS of the activation mode (S3E). The BIOS performs the POST in the notified activation mode (minimum activation mode). That is to say, the BIOS activates the CPU 11 and the memory 12 in the minimum activation mode, and the BMC 20 uses the MCTP through the PCIe and the I2C to acquire the information of the I/O device 13 (S4).” See ¶ [0035] “The BMC 20 acquires information of the hardware of each unit of the server 1 in accordance with Management Component Transport Protocol (MCTP). That is to say, the BMC 20 is connected with a monitoring target device (may be said to be the hardware of each unit) referred to as a management controller using a physical wire, and communicates with the monitoring target device using the physical wire. The BMC 20 communicates with the hardware of each unit (management controller) using the MCTP protocol.”); and
notify in a notification the acquired device information (see ¶ [0043] the BIOS notifies the BMC 320 of the collected information, and a server manager is able to check the information of an I/O device via the BMC 320, using a PC “”).
Hence, it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the teachings of Veal by adapting Hayashida to initialize the device and acquire the information from the management device via a transmission route (see ¶ [0007] of Hayashida).
Regarding claim 2, Veal does not expressly disclose, however, Hayashida teaches wherein the processor ends an acquisition of the device information on the basis of completion of the notification of the device information (see ¶[0042] “For example, at the time of activation of the server 301, the BIOS calls the driver and waits until the initialization is completed. Furthermore, the BIOS collects information of the I/O device 13 after the initialization of the I/O device 13”), and notifies the operating system of the connection of the device (see ¶[0043] “Accordingly, the BIOS notifies the BMC 320 of the collected information, and a server manager is able to check the information of an I/O device via the BMC 320, using a PC”).
Hence, it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the teachings of Ouchi by adapting Hayashida to initialize the device and acquire the information from the management device via a transmission route (see ¶ [0007] of Hayashida).
Regarding claim 3, Veal teaches wherein on the basis of the notification of the connection of the device, the operating system executes recognition processing of the device, and starts access of the device (see ¶[0059] “During operation, device resource information may be exchanged within computer platform 500--e.g. the exchange in aid of representing an aggregate device to a host OS executing in processor 516. Such device resource information may, for example, include enumeration information having some or all of the features of resource information 350.” See ¶[0060] “The enumeration information may represent AD 512 as a distinct physical device--e.g. where the enumeration information includes a device ID which is specific to AD 512. In an embodiment, some or all of such enumeration information may also be provided to a driver for AD 512--e.g. for the driver's own internal enumeration to detect for devices.”).
Regarding claim 4, Veal does not expressly disclose, however, Hayashida teaches wherein the processor is included in a virtual machine monitor generated on the information processing apparatus, the operating system is executed on a first virtual machine generated on the information processing apparatus, and a function of the processor is implemented by a second virtual machine generated on the information processing apparatus (see ¶[0078] “For example, to provide a virtual machine with needed amounts of resources, the management program requests the server computer and the storage system to allocate needed resources for the virtual machine and requests a hypervisor to create the virtual machine using the allocated resources.”).
Hence, it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the teachings of Veal by adapting Hayashida to initialize the device and acquire the information from the management device via a transmission route (see ¶ [0007] of Hayashida).
Regarding claim 5, Veal does not expressly disclose, however, Hayashida teaches wherein the first virtual machine is among a plurality of first virtual machines generated each first virtual machines executing the operating system, respectively, and the function of the processor implemented by the second virtual machine is used in common by the plurality of first virtual machines (see ¶[0078] “The management subsystem can quickly provide an execution environment (a virtual machine, a DBMS: Database Management System, a Web server, or the like) desired by the manager. For example, to provide a virtual machine with needed amounts of resources, the management program requests the server computer and the storage system to allocate needed resources for the virtual machine and requests a hypervisor to create the virtual machine using the allocated resources.”).
Hence, it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the teachings of Veal by adapting Hayashida to initialize the device and acquire the information from the management device via a transmission route (see ¶ [0007] of Hayashida).
Regarding claim 6, Veal does not expressly disclose, however, Hayashida teaches wherein the started driver issues a command to acquire the device information to the device (see ¶[0041] “Furthermore, the BMC 320 acquires information (I/O device information) of the I/O devices 13-1, 13-2, and 13-3 and the like of the server 301 from the BIOS. Furthermore, the BMC 320 provides a function of a web server to a PC over a LAN via the LAN device 24. Accordingly, the PC is able to acquire the information from the BMC 320 and monitor the state of the server 301 via the LAN.”).
Hence, it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the teachings of Veal by adapting Hayashida to initialize the device and acquire the information from the management device via a transmission route (see ¶ [0007] of Hayashida).
Regarding claim 7, is an independent method claim corresponding to claim 1 above, and is rejected for the same reasons.
Regarding claim 8, is an independent medium claim corresponding to claim 1 above, and is rejected for the same reasons. In addition, Ouchi teaches a non-transitory computer-readable recording medium storing an information processing program (see ¶ [0066] storage media).
Response to Arguments
Applicant's arguments filed 11/07/2025 have been fully considered but they are not persuasive.
Regarding 101 rejection, is withdrawn in light of applicant’s amendment and arguments provided.
Regarding 103 rejection, applicants’ argument of Ouchi is moot due to the new prior art rejections. A general statement of Hayashida not disclosing the limitation is disclosed, however, examiner disagrees. Applicant's arguments fail to comply with 37 CFR 1.111(b) because they amount to a general allegation that the claims define a patentable invention without specifically pointing out how the language of the claims patentably distinguishes them from the references.
Support for Amendments and Newly Added Claims
Applicants are respectfully requested, in the event of an amendment to claims or submission of new claims, that such claims and their limitations be directly mapped to the specification, which provides support for the subject matter. This will assist in expediting compact prosecution. MPEP 714.02 recites: “Applicant should also specifically point out the support for any amendments made to the disclosure. See MPEP § 2163.06. An amendment which does not comply with the provisions of 37 CFR 1.121(b), (c), (d), and (h) may be held not fully responsive. See MPEP § 714.” Amendments not pointing to specific support in the disclosure may be deemed as not complying with provisions of 37 C.F.R. 1.121(b), (c), (d), and (h) and therefore held not fully responsive. Generic statements such as “Applicants believe no new matter has been introduced” may be deemed insufficient.
Interview Requests
In accordance with 37 CFR 1.133(a)(3), requests for interview must be made in advance. Interview requests are to be made by telephone (571-270-7848) call or email (carina.yun@uspto.gov). Applicants must provide a detailed agenda as to what will be discussed (generic statement such as “discuss §102 rejection” or “discuss rejections of claims 1-3” may be denied interview). The detail agenda along with any proposed amendments is to be written on a PTOL-413A or a custom form and should be emailed, (subject to MPEP 713.01.I / MPEP 502.03) to the Examiner prior to requesting for interview. Interview requests submitted within amendments may be denied because the Examiner was not notified, in advance, of the Applicant Initiated Interview Request and due to time constraints may not be able to review the interview request to prior to the mailing of the next Office Action.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Murata (U.S. PG PUB 2016/0179640) teaches a power-failure detector that detects a halt of power supply from a power source; a standby power supply that supplies, when the power supply from the power source is halted, standby power to a processor, a memory, and a storing device; and a disconnector that disconnects communication between the processor and a peripheral device. When the power-failure detector detects the halt of power supply from the power source, the disconnector disconnects the communication between the processor and the peripheral device and the processor carries out a memory backup process that reads data from the memory and stores the read data into the storing device. With this configuration, the memory backup process is surely carried out even in the event of power failure.
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CARINA YUN whose telephone number is (571)270-7848. The examiner can normally be reached Mon, Tues, Thurs, 9-4 (EST).
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Carina Yun
Patent Examiner
Art Unit 2194
/CARINA YUN/Examiner, Art Unit 2194