DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
The present application, 17874917 filed 07/27/2022 is a Continuation of PCT/EP2021/052019, filed 01/28/2021, claims foreign priority to EP20382048.5, filed 01/28/2020.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 07/27/2022 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Objections
Claims 10 is objected to under 37 C.F.R. 1.71(a) which requires “full, clear, concise, and exact terms” as to enable any person skilled in the art or science to which the invention or discovery appertains, or with which it is most nearly connected, to make and use the same. The following should be corrected.
A. In claim 10 line 1, “wherein it is it is” should read “wherein it is
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 14-17 are rejected under 35 U.S.C. 101 because the claimed inventions are directed to a non-statutory subject matter. Claims 14-17 does not fall within at least one of the four categories of patent because, the broadest reasonable interpretation of a computer-readable storage medium in view of the state of the art covers a signal per se. Thus, in this case, a claim to computer-readable storage medium is ineligible unless amended to avoid the ineligible signal embodiment.
Claims 1-11 and 13-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more.
Under Step 1, claims 1-11 and 13 recite a series of steps and, therefore, is a process. Claims 14-17 recite a computer-readable storage medium. Claims 18-20 recite a system and, therefore, is a machine.
Under Step 2A prong 1, claim 1 recites
A method comprising:
representing a random number as a first sequence of bits and representing a threshold as a second sequence of bits; and
comparing, by a comparator, the first sequence of bits representing the random number with the second sequence of bits representing the threshold on a bit-wise basis, wherein the comparing comprises comparing a most significant bit of the first sequence of bits representing the random number with a most significant sequence of the second sequence of bits representing the threshold, and
determining the first sequence of bits and the most significant sequence of the second sequence of bits are not equal, and deciding that the random number is larger or smaller than the threshold, or
determining the first sequence of bits and the most significant sequence of the second sequence of bits are equal, repeatedly comparing an immediately following bit in the first sequence of bits representing the random number with an immediately following bit in the second sequence of bits representing the threshold until a first bit that is not equal in the first sequence of bits representing the random number and the second sequence of bits representing the threshold is reached or until all bits have been compared and found to be equal.
The above limitations of comparing two bit sequences representing two numbers amounts to processing mathematical relationships/calculations the can practically be performed mentally and falls within the “Mathematical Concepts” and “Mental Processes” grouping of abstract ideas. The steps of “representing” and “comparing” is a process that under its broadest reasonable interpretation, covers performance of the limitation in the mind. That is, other than reciting “a comparator”, nothing in the claim element precludes the steps from practically being performed in the human mind. For example, but for the “a comparator” language, the claim encompasses manually representing two numbers as binary sequences and performing bit-wise comparison starting at the most significant bit to determine which of the two numbers/sequences is larger and/or smaller or whether they are equal. Accordingly, the claim is directed to recite an abstract idea.
Under step 2A prong 2, the claim recites the following additional elements: a comparator. However, the additional elements of “a comparator” is recited at a high-level of generality (i.e., as a generic comparator for comparing) such that they amount to no more than mere instructions using a generic computer component or merely as tools to implement the abstract idea. Use of a computer or other machinery in its ordinary capacity for economic or other tasks (e.g., to receive, store, or transmit data) or simply adding a general purpose computer or computer components after the fact to an abstract idea (e.g., a fundamental economic practice or mathematical equation) does not integrate a judicial exception into a practical application or provide significantly more. See MPEP 2106.05(f) for more information. The additional elements do not, individually or in combination, integrate the exception into a practical application. Accordingly, the claim is not integrated into a practical application.
Under step 2B, claim 1 does not include additional elements that, individually or in combination, are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, the additional elements of “a comparator” is recited at a high-level of generality (i.e., as a generic comparator for comparing) such that they amount to no more than mere instructions using a generic computer component or merely as tools to implement the abstract idea. Use of a computer or other machinery in its ordinary capacity for economic or other tasks (e.g., to receive, store, or transmit data) or simply adding a general purpose computer or computer components after the fact to an abstract idea (e.g., a fundamental economic practice or mathematical equation) does not integrate a judicial exception into a practical application or provide significantly more. See MPEP 2106.05(f) for more information. The claim does not recite additional elements that alone or in combination amount to an inventive concept. Accordingly, the claim does not amount to significantly more than the abstract idea.
Under step 2A prong 1, claims 2-11 and 13 recite the same abstract idea as claim 1 by reason of dependence. Further, claim 2 recites further details of the abstract idea and further abstract idea of “wherein the first sequence of bits and the second sequence of bits are found to be equal and further comprising determining that the random number and the threshold are identical.” Claim 3 recites further details of the abstract idea and further abstract idea of “wherein the random number is found to be smaller or equal to the threshold, and the random number is discarded and the comparing is repeated with a new random number.” Claim 4 recites further details of the abstract idea and further abstract idea of “wherein the random number is found to be larger than or equal to the threshold, the random number is discarded and the comparing is repeated with a new random number.” Claim 6 recites further details of the abstract idea of “wherein the comparing is performed concurrently with the generating of the random number.” Claim 8 recites further details of the abstract idea of “wherein, after the first bit has been generated and before the second bit is generated, the first bit is compared to a correspondingly significant bit of the threshold.” Claim 9 recites further details of the abstract idea of “wherein it is determined that the random number is smaller than the threshold in response determining that the first bit is smaller than the correspondingly significant bit of the threshold.” Claim 10 recites further details of the abstract idea of “wherein it is determined that the random number is larger than the threshold in response to determining that the first bit is larger than the correspondingly significant bit of the threshold.” Claim 11 recites further details of the abstract idea of “wherein the second bit is generated if it is determined that the first bit is larger than or equal to the correspondingly significant bit of the threshold or the second bit is generated if it is determined that the first bit is smaller than or equal to the correspondingly significant bit of the threshold.” Claim 13 recites further details of the abstract idea of “wherein the method further comprises determining the random number is larger than the threshold” which falls within the “Mathematical Concepts” and/or “Mental Processes” grouping of abstract ideas. In particular claims 2-4, 6 and 8-11 do not include additional elements that would require further analysis under step 2A prong 2 and step 2B. Accordingly, the claims are directed to recite an abstract idea.
Under step 2A prong 2, claim 5 recites the following additional elements: further comprising generating the random number using an algorithmic random number generator or a physical random number generator. Claim 7 recites the following additional elements: wherein the random number is generated on a bit-wise basis comprising generating a first bit of the random number and, after that, generating a second bit of the random number, wherein the first bit is more significant than the second bit. Claim 13 recites the following additional elements: using the random number in at least one of encryption of data, encryption of data transmission, a numerical simulation. However, the additional elements of “further comprising generating the random number using an algorithmic random number generator or a physical random number generator” in claim 5; and “wherein the random number is generated on a bit-wise basis comprising generating a first bit of the random number and, after that, generating a second bit of the random number, wherein the first bit is more significant than the second bit” in claim 7 are recited at a high-level of generality (i.e., as a generic algorithmic random number generator or a physical random number generator for generating random numbers on a bit-wise basis without reciting any specific configuration or circuit structure of the random number generator to generate the random number on a bit-wise basis) such that they amount to no more than mere instructions using a generic computer component or merely as tools to implement the abstract idea or merely reciting the words “apply it” or an equivalent with the judicial exception. The additional elements of “using the random number in at least one of encryption of data, encryption of data transmission, a numerical simulation” is merely generally linking the use of the abstract idea to a particular technological environment or field of use. See MPEP 2106.05(h) for more information. The additional elements do not, individually or in combination, integrate the exception into a practical application. Accordingly, the claims are not integrated into a practical application.
Under step 2B, claims 5, 7 and 13 do not include additional elements that, individually or in combination, are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, the additional elements of “further comprising generating the random number using an algorithmic random number generator or a physical random number generator” in claim 5; and “wherein the random number is generated on a bit-wise basis comprising generating a first bit of the random number and, after that, generating a second bit of the random number, wherein the first bit is more significant than the second bit” in claim 7 are recited at a high-level of generality (i.e., as a generic algorithmic random number generator or a physical random number generator for generating random numbers on a bit-wise basis without reciting any specific configuration or circuit structure of the random number generator to generate the random number on a bit-wise basis) such that they amount to no more than mere instructions using a generic computer component or merely as tools to implement the abstract idea or merely reciting the words “apply it” or an equivalent with the judicial exception. The additional elements of “using the random number in at least one of encryption of data, encryption of data transmission, a numerical simulation” is merely generally linking the use of the abstract idea to a particular technological environment or field of use. See MPEP 2106.05(h) for more information. The claims do not recite additional elements that alone or in combination amount to an inventive concept. Accordingly, the claims do not amount to significantly more than the abstract idea.
Regarding claims 14-17, they are directed to a computer-readable storage medium comprising computer-executable instructions that, when executed by one or more processing devices comprising a comparator, cause the one or more processing devices to perform the method of claims 1-4 respectively. Claims 1-4 analysis applies equally to claims 14-17 respectively.
Under Step 2A prong 1, claim 18 recites
A computing system comprising a processor and a comparator, wherein the processor is configured to:
represent a random number as a first sequence of bits and represent a threshold as a second sequence of bits; and
compare, by the comparator, the first sequence of bits representing the random number with the second sequence of bits representing the threshold on a bit-wise basis, wherein the comparison comprises comparing a most significant bit of the first sequence of bits representing the random number with a most significant sequence of the second sequence of bits representing the threshold, and
determine the first sequence of bits and the most significant sequence of the second sequence of bits are not equal, and deciding that the random number is larger or smaller than the threshold, or
determine the first sequence of bits and the most significant sequence of the second sequence of bits are equal, repeatedly comparing an immediately following bit in the first sequence of bits representing the random number with an immediately following bit in the second sequence of bits representing the threshold until a first bit that is not equal in the first sequence of bits representing the random number and a first sequence in the second sequence of bits representing the threshold is reached or until all bits have been compared and found to be equal.
The above limitations of comparing two bit sequences representing two numbers amounts to processing mathematical relationships/calculations the can practically be performed mentally and falls within the “Mathematical Concepts” and “Mental Processes” grouping of abstract ideas. The steps of “representing” and “comparing” is a process that under its broadest reasonable interpretation, covers performance of the limitation in the mind. That is, other than reciting “a processor” and “a comparator”, nothing in the claim element precludes the steps from practically being performed in the human mind. For example, but for the “a processor” and “a comparator” language, the claim encompasses manually representing two numbers as binary sequences and performing bit-wise comparison starting at the most significant bit to determine which of the two numbers/sequences is larger and/or smaller or whether they are equal. Accordingly, the claim is directed to recite an abstract idea.
Under step 2A prong 2, the claim recites the following additional elements: a processor, and a comparator. However, the additional elements of “a processor” and “a comparator” are recited at a high-level of generality (i.e., as a generic computer component for executing a series of mathematical operations; and a generic comparator for comparing) such that they amount to no more than mere instructions using a generic computer component or merely as tools to implement the abstract idea. Use of a computer or other machinery in its ordinary capacity for economic or other tasks (e.g., to receive, store, or transmit data) or simply adding a general purpose computer or computer components after the fact to an abstract idea (e.g., a fundamental economic practice or mathematical equation) does not integrate a judicial exception into a practical application or provide significantly more. See MPEP 2106.05(f) for more information. The additional elements do not, individually or in combination, integrate the exception into a practical application. Accordingly, the claim is not integrated into a practical application.
Under step 2B, claim 18 does not include additional elements that, individually or in combination, are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, the additional elements of “a processor” and “a comparator” are recited at a high-level of generality (i.e., as a generic computer component for executing a series of mathematical operations; and a generic comparator for comparing) such that they amount to no more than mere instructions using a generic computer component or merely as tools to implement the abstract idea. Use of a computer or other machinery in its ordinary capacity for economic or other tasks (e.g., to receive, store, or transmit data) or simply adding a general purpose computer or computer components after the fact to an abstract idea (e.g., a fundamental economic practice or mathematical equation) does not integrate a judicial exception into a practical application or provide significantly more. See MPEP 2106.05(f) for more information. The claim does not recite additional elements that alone or in combination amount to an inventive concept. Accordingly, the claim does not amount to significantly more than the abstract idea.
Under step 2A prong 1, claims 19-20 recite the same abstract idea as claim 18 by reason of dependence. Further, claim 19 recites further details of the abstract idea and further abstract idea of “wherein all bits of the first sequence of bits and the second sequence of bits are found to be equal and further comprising instructions that cause the processor to determine that the random number and the threshold are identical” which falls within the “Mathematical Concepts” and/or “Mental Processes” grouping of abstract ideas. In particular claim 19 does not include additional elements that would require further analysis under step 2A prong 2 and step 2B. Accordingly, the claim is directed to recite an abstract idea.
Under step 2A prong 2, claim 20 recites the following additional elements: further comprises an algorithmic or physical random number generator configured to generate the random number and wherein the processor is configured to provide the first sequence of bits representing the random number to the comparator. However, the additional elements of “further comprises an algorithmic or physical random number generator configured to generate the random number” is recited at a high-level of generality (i.e., as a generic algorithmic or a physical random number generator for generating random numbers without reciting any specific configuration or circuit structure of the random number generator to generate the random number) such that they amount to no more than mere instructions using a generic computer component or merely as tools to implement the abstract idea or merely reciting the words “apply it” or an equivalent with the judicial exception. The additional element of “provide the first sequence of bits representing the random number” is merely adding an insignificant extra-solution activity. The additional elements do not, individually or in combination, integrate the exception into a practical application. Accordingly, the claim is not integrated into a practical application.
Under step 2B, claim 20 does not include additional elements that, individually or in combination, are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, the additional elements of “further comprises an algorithmic or physical random number generator configured to generate the random number” is recited at a high-level of generality (i.e., as a generic algorithmic or a physical random number generator for generating random numbers without reciting any specific configuration or circuit structure of the random number generator to generate the random number) such that they amount to no more than mere instructions using a generic computer component or merely as tools to implement the abstract idea or merely reciting the words “apply it” or an equivalent with the judicial exception. The additional element of “provide the first sequence of bits representing the random number” is merely adding an insignificant extra-solution activity. See MPEP 2106.05(d)(II) which states that the courts have recognized computer functions such as “Receiving or transmitting data over a network” and “Storing and retrieving information in memory” as well‐understood, routine, and conventional functions when they are claimed in a merely generic manner (e.g., at a high level of generality) or as insignificant extra-solution activity. The claim does not recite additional elements that alone or in combination amount to an inventive concept. Accordingly, the claim does not amount to significantly more than the abstract idea.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-5 and 14-20 are rejected under 35 U.S.C. 103 as being unpatentable over Yamashita1 et al. (JP H0883167 A), hereinafter Yamashita, in view of Pascucci (US 20030023654 A1).
Regarding claim 1, Yamashita teaches a method comprising:
comparing, by a comparator, (Yamashita Fig. 10 and paragraph [0014] “In FIG. 10 … If the input random number R is equal to or more than the threshold value S6 and equal to or less than S7, the output of the comparator 54a is "1" and "0" outside the range”; comparator – 54a),
(Yamashita Fig. 10 and paragraph [0014] ““In FIG. 10 … If the input random number R is equal to or more than the threshold value S6 and equal to or less than S7, the output of the comparator 54a is "1" and "0" outside the range”),
.
Yamashita does not explicitly teach representing a random number as a first sequence of bits and representing a threshold as a second sequence of bits; and comparing, by a comparator, the first sequence of bits representing the random number with the second sequence of bits representing the threshold on a bit-wise basis, wherein the comparing comprises comparing a most significant bit of the first sequence of bits representing the random number with a most significant sequence of the second sequence of bits representing the threshold, and determining the first sequence of bits and the most significant sequence of the second sequence of bits are not equal, and deciding that the random number is larger or smaller than the threshold, or determining the first sequence of bits and the most significant sequence of the second sequence of bits are equal, repeatedly comparing an immediately following bit in the first sequence of bits representing the random number with an immediately following bit in the second sequence of bits representing the threshold until a first bit that is not equal in the first sequence of bits representing the random number and the second sequence of bits representing the threshold is reached or until all bits have been compared and found to be equal.
However, on the same field of endeavor, Pascucci discloses representing a first number as a first sequence of bits and representing a second number as a second sequence of bits; and comparing, by a comparator, the first sequence of bits representing the first number with the second sequence of bits representing the second number on a bit-wise basis, wherein the comparing comprises comparing a most significant bit of the first sequence of bits representing the first number with a most significant bit of the second sequence of bits representing the second number, and determining the first sequence of bits and the most significant bit of the second sequence of bits are not equal, and deciding that the first number is larger or smaller than the second number, or determining the first sequence of bits and the most significant bit of the second sequence of bits are equal, repeatedly comparing an immediately following bit in the first sequence of bits representing the first number with an immediately following bit in the second sequence of bits representing the second number until a first bit that is not equal in the first sequence of bits representing the first number and the second sequence of bits representing the second number is reached or until all bits have been compared and found to be equal (Pascucci Fig. 4 and paragraphs [0055-0057] “The comparator circuit of FIG. 4 is constituted basically by two blocks: a block 200 for identifying the condition of equality/inequality of each pair of homologous bits, that is, bits of the same weight or significance, of the binary numbers to be compared; a priority decision structure for identifying the difference between homologous bits which is significant for the purposes of the comparison, that is, between the bits of greatest weight or most significant bits of the binary numbers to be compared”; paragraphs [0061-0063, 0079-0085]).
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention, to modify Yamashita using Pascucci and represent the random number and the threshold being as a first and second sequence of bits respectively, and perform the comparison on a bit by bit basis by first comparing a most significant bit to determine whether the first and second sequence of bits are not equal, then repeatedly comparing the next bits until an inequality between homologous bits is found to determine whether the random number is smaller or larger than the threshold or until all bits have been compared and the random number is determined to be equal to the threshold in order to perform comparison between two numbers at high speed by determining the most significant condition of inequality because the conditions of equality/inequality between bits of lower weight, that is, less significant bits, are completely irrelevant once the most significant condition of inequality is determined (Pascucci paragraphs [0002, 0085]).
Therefore, the combination of Yamashita as modified in view of Pascucci teaches representing a random number as a first sequence of bits and representing a threshold as a second sequence of bits; and comparing, by a comparator, the first sequence of bits representing the random number with the second sequence of bits representing the threshold on a bit-wise basis, wherein the comparing comprises comparing a most significant bit of the first sequence of bits representing the random number with a most significant sequence of the second sequence of bits representing the threshold, and determining the first sequence of bits and the most significant sequence of the second sequence of bits are not equal, and deciding that the random number is larger or smaller than the threshold, or determining the first sequence of bits and the most significant sequence of the second sequence of bits are equal, repeatedly comparing an immediately following bit in the first sequence of bits representing the random number with an immediately following bit in the second sequence of bits representing the threshold until a first bit that is not equal in the first sequence of bits representing the random number and the second sequence of bits representing the threshold is reached or until all bits have been compared and found to be equal.
Regarding claim 2, Yamashita as modified in view of Pascucci teaches all the limitations of claim 1 as stated above. Further, Yamashita as modified in view of Pascucci teaches wherein the first sequence of bits and the second sequence of bits are found to be equal and further comprising determining that the random number and the threshold are identical (Pascucci paragraphs [0061, 0063, 0090]).
Regarding claim 3, Yamashita as modified in view of Pascucci teaches all the limitations of claim 1 as stated above. Further, Yamashita as modified in view of Pascucci teaches wherein the random number is found to be smaller or equal to the threshold, and the random number is discarded and the comparing is repeated with a new random number (Yamashita paragraphs [0014-0015, 0017] “If the input random number R is equal to or more than the threshold value S6 … output of the comparator 54a is "1" and "0" outside the range. The switch 55 is turned on only when the output data of the comparator 54a is "1"; new random number – next random number being compared).
Regarding claim 4, Yamashita as modified in view of Pascucci teaches all the limitations of claim 1 as stated above. Further, Yamashita as modified in view of Pascucci teaches wherein the random number is found to be larger than or equal to the threshold, the random number is discarded and the comparing is repeated with a new random number (Yamashita paragraphs [0014-0015, 0017] “If the input random number R is … equal to or less than S7, the output of the comparator 54a is " "1" and "0" outside the range. The switch 55 is turned on only when the output data of the comparator 54a is "1"; new random number – next random number being compared).
Regarding claim 5, Yamashita as modified in view of Pascucci teaches all the limitations of claim 1 as stated above. Further, Yamashita as modified in view of Pascucci teaches further comprising generating the random number using an algorithmic random number generator or a physical random number generator (Yamashita Fig. 10 and paragraph [0003] “an M-sequence generator often used as an original random number generator outputs a pseudo-random number sequence”).
Regarding claims 14-17, they are directed to a computer-readable storage medium comprising computer-executable instructions that, when executed by one or more processing devices comprising a comparator, cause the one or more processing devices to perform the method of claims 1-4 respectively. Claims 1-4 analysis applies equally to claims 14-17 respectively.
Regarding claims 18-19, they are directed to a computing system comprising a processor and a comparator that is configured to implement the method of claims 1-2 respectively. Claims 1-2 analysis applies equally to claims 18-19 respectively. Further, Yamashita as modified in view of Pascucci teaches a processor (Yamashita paragraph [0016] “The circuits after the original random number generator 50 can be realized by software”; processor – device implementing the software).
Regarding claim 20, Yamashita as modified in view of Pascucci teaches all the limitations of claim 18 as stated above. Further, Yamashita as modified in view of Pascucci teaches wherein the computing system further comprises an algorithmic or physical random number generator configured to generate the random number (Yamashita Fig. 10 and paragraph [0003] “an M-sequence generator often used as an original random number generator outputs a pseudo-random number sequence”), and wherein the processor is configured to provide the first sequence of bits representing the random number to the comparator (Yamashita Fig. 10 and paragraphs [0016-0017] the software provides the random number R to the comparator 54a).
Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Yamashita in view of Pascucci as applied to claim 1 above, and further in view of Ray (US 11853719 B1).
Regarding claim 13, Yamashita as modified in view of Pascucci teaches all the limitations of claim 1 as stated above. Further, Yamashita as modified in view of Pascucci teaches wherein the method further comprises determining the random number is larger than the threshold, (Yamashita Fig. 10 and paragraphs [0014-0015, 0017]).
Yamashita does not explicitly teach using the random number in at least one of encryption of data, encryption of data transmission, a numerical simulation.
However, on the same field of endeavor, Ray discloses using a random number in at least one of encryption of data, encryption of data transmission, a numerical simulation (Ray Fig. 1 and col 2 lines 36-57 “the random number generation system 100 and the communication system 110 may be implemented on a UAV where the communication system 110 uses random numbers from the random number generation system 100 to encrypt or decrypt data wirelessly communicated by the communication system 110 … The transmitter 112 may use one or more random numbers from the random number generation system 100 to encrypt data for transmission by the transmitter 112”).
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention, to modify Yamashita in view of Pascucci using Ray and use the random number for encryption of data or encryption of data transmission in order to communicate sensitive data securely (Ray col 1 lines 16-23).
Therefore, the combination of Yamashita as modified in view of Pascucci and Ray teaches using the random number in at least one of encryption of data, encryption of data transmission, a numerical simulation.
Claims 6 and 7 are rejected under 35 U.S.C. 103 as being unpatentable over Yamashita in view of Pascucci as applied to claim 5 above, and further in view of Cheng (US 20200241842 A1).
Regarding claim 7, Yamashita as modified in view of Pascucci teaches all the limitations of claim 5 as stated above.
Yamashita does not explicitly teach wherein the random number is generated on a bit-wise basis comprising generating a first bit of the random number and, after that, generating a second bit of the random number, wherein the first bit is more significant than the second bit.
However, on the same field of endeavor, Cheng discloses generating a random number of a given bit-length on a bit-wise basis comprising generating a first bit of the random number and, after that, generating a second bit of the random number (Cheng paragraph [0046] “In some embodiments, HRNG unit 110 or control unit 106 generate a random number of a given bit-length from a single bitcell by cycling the RESET and READ operations for each bit needed in the random number. Due to the stochastic nature of resistance change of the tunable resistors, each cycle of operation will produce a random bit. By combining multiple random bits from multiple cycles of a single bit, we can get multiple-bit random number using a single bitcell”).
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention, to modify Yamashita in view of Pascucci using Cheng and configure the random number generator (RNG) to generate the random number on a bit-wise basis from a most-significant bit (MSB) to a least significant bit (LSB) in order to implement a more compact RNG using a single memory cell to produce the random number (Cheng paragraph [0043]). Furthermore, by generating the MSB first, the comparison operation can be performed immediately and the most significant condition of inequality can be determined faster as compared to generating the LSB first (Pascucci paragraph [0085]).
Therefore, the combination of Yamashita as modified in view of Pascucci and Cheng teaches wherein the random number is generated on a bit-wise basis comprising generating a first bit of the random number and, after that, generating a second bit of the random number, wherein the first bit is more significant than the second bit.
Regarding claim 6, Yamashita as modified in view of Pascucci teaches all the limitations of claim 5 as stated above. Further, Yamashita teaches wherein the comparing is performed (Yamashita Fig. 10 and paragraph [0017]).
Yamashita does not explicitly teach wherein the comparing is performed concurrently with the generating of the random number.
However, on the same field of endeavor, Cheng discloses generating a random number on a bit-wise basis (Cheng paragraph [0046]).
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention, to modify Yamashita in view of Pascucci using Cheng and configure the circuit to perform the comparison concurrently with the generating of the random number by realizing that the random number would take a few cycles to be fully generated while the result of the comparison can be determined without comparing the full sequence of bits of the random number as the result one depends on the most significant condition of inequality (Pascucci paragraph [0085]).
Therefore, the combination of Yamashita as modified in view of Pascucci and Cheng teaches wherein the comparing is performed concurrently with the generating of the random number.
Allowable Subject Matter
Claim 12 would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 8-11 would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims, and if rewritten to overcome the 35 U.S.C. 101 rejection discussed above.
The following is a statement of reasons for the indication of allowable subject matter:
Claim 8 is directed to a method, comprising among other things, wherein, after the first bit has been generated and before the second bit is generated, the first bit is compared to a correspondingly significant bit of the threshold.
Yamashita is the closest prior art found. Yamashita discloses a random number generating circuit configured to generate a random number with a specific numerical range by comparing a random number with a lower threshold value and an upper threshold value and outputting a control signal to turn a switch on and output the random number only when the random number is equal to the threshold values or within the range of the threshold values. On the other hand, Pascucci discloses comparing two numbers in a bit-wise fashion to determine whether the two numbers are equal or whether the first number is smaller or larger than the second number by detecting an inequality starting at the most significant bit of the two numbers. However, neither Yamashita nor Pascucci whether taken alone or in combination, explicitly teach or suggest wherein, after the first bit has been generated and before the second bit is generated, the first bit is compared to a correspondingly significant bit of the threshold as recited in claim 8.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Najafi et al. (US 20190289345 A1) related to a deterministic pseudo-random bit-stream generator configured to generate an operand bit-stream based on comparing a pseudo-random number and a constant number using a comparator which outputs a first bit value if the pseudo-random number is less than or equal to the constant number or a second bit value if the pseudo-random number is greater than the constant number.
Ogaki et al. (US 20190304410 A1), Joshi et al. (US 20200387563 A1), and Yamamoto et al. (US 20050193045 A1) are related to an apparatus configured to compare a random number and a threshold value.
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/Carlo Waje/Examiner, Art Unit 2151 (571)272-5767
1 See the provided Machine Translation of JP H0883167 A for the cited portions of Yamashita