Prosecution Insights
Last updated: July 17, 2026
Application No. 17/875,332

LIGHT EMITTING DIODE PACKAGE AND BACKLIGHT UNIT INCLUDING THE SAME

Final Rejection §103
Filed
Jul 27, 2022
Priority
Jul 28, 2021 — provisional 63/226,480 +1 more
Examiner
YEUNG LOPEZ, FEIFEI
Art Unit
2899
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Seoul Semiconductor Co., Ltd.
OA Round
4 (Final)
81%
Grant Probability
Favorable
5-6
OA Rounds
0m
Est. Remaining
78%
With Interview

Examiner Intelligence

Grants 81% — above average
81%
Career Allowance Rate
869 granted / 1071 resolved
+13.1% vs TC avg
Minimal -3% lift
Without
With
+-2.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
35 currently pending
Career history
1116
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
84.9%
+44.9% vs TC avg
§102
8.2%
-31.8% vs TC avg
§112
4.7%
-35.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1071 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action. Claim(s) 1-4,10,11,18,19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim (WO2019/124937 A1), English translation is found in (US PG Pub 2020/0212264 A1), Kim (WO 2020/036320 A1, hereafter Kim320), a reference submitted by Applicant, and Emerson (PG Pub 2011/0186873 A1). Regarding claim 1, Kim teaches a light emitting diode package comprising: a housing (1230, figs. 31-34) including a cavity region therein; a light emitting diode (LED) chip (1110) mounted in the cavity region of the housing; and a resin (1120, paragraphs [0180][0196]) formed in the cavity region to cover a light emitting surface of the light emitting diode chip, wherein the housing includes a first surface and a second surface perpendicular to a width direction of the housing and spaced apart from each other, and a third surface and a fourth surface perpendicular a longitudinal direction of the housing and spaced apart from each other, wherein the first surface and the second surface surround the resin while the third surface and the fourth surface expose side surfaces of the resin (figs. 31-34), and the housing further includes a mounting region (under 1110, fig. 33) and two inclined regions (1235) extending from opposing ends of the mounting region in the longitudinal direction, the mounting region having a flat surface with the LED chip being mounted on a portion of the mounting region. Kim does not teach wherein a height of each portion of the third surface is greater than a height of the light emitting diode chip, but less than a height of each of the first and second surfaces, to prevent direct side emission of light emitted from the light emitting diode chip. In the same field of endeavor, Kim320 teaches a height of each portion of the third surface (a surface perpendicular to A1—A2 line, fig. 1 and fig. 3) is greater than a height of the light emitting diode chip (110), but less than a height of each of the first and second surfaces (surfaces perpendicular to B1—B2 line, fig. 1 and fig. 4), for the benefit of preventing light efficiency reduction (paragraph [0065] of English translation). Thus, it would have been obvious to the skilled in the art before the effective filing date of the invention to make a height of each portion of the third surface is greater than a height of the light emitting diode chip, but less than a height of each of the first and second surfaces, for the benefit of preventing light efficiency reduction. Although Kim320 does not teach the modification is to prevent direct side emission of light emitted from the light emitting diode chip, modifying Kim’s device in view of Kim320’s teaching would have enabled the resultant device to function as claimed—that is “to prevent direct side emission of light emitted from the light emitting diode chip”—because the resultant device would have the same structure as that claimed. It was ruled that “[a] claim containing a ‘recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus’ if the prior art apparatus teaches all the structural limitations of the claim. Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987). Kim does not teach a length of the mounting region that extends beyond the LED chip in the longitudinal direction is longer than a length of each of the inclined regions in the longitudinal direction. In the same field of endeavor, Emerson teaches the housing further includes a mounting region and two inclined regions (figs. 5, 7, 16) extending from opposing ends of the mounting region in the longitudinal direction, the mounting region having a flat surface with the LED chip (14, paragraph [0053]) being mounted on a portion of the mounting region, and a length of the mounting region that extends beyond the LED chip in the longitudinal direction is longer than a length of each of the inclined regions ((L3 – L4)/2 = 0.965mm or 965 microns, Table 1) in the longitudinal direction (x and y equals 300 microns, Table 2, and L4 equals 3.47 mm or 3470 microns and W3 equals 1.7mm or 1700 microns, Table 1), for the benefit of reducing thermal breakdown and maintain brightness (paragraph [0003]). Thus, it would have been obvious to the skilled in the art before the effective filing date of the invention to make a length of the mounting region that extends beyond the LED chip in the longitudinal direction is longer than a length of each of the inclined regions in the longitudinal direction for the benefit of reducing thermal breakdown and maintain brightness. Regarding claim 2, Kim teaches the light emitting diode package of claim 1, wherein the housing is formed of a silicon or epoxy material (paragraph [0056]) having a white color (paragraph [0207]). Regarding claim 3, Kim teaches (see claim 19) the light emitting diode package of claim 1, wherein the housing includes: a first sidewall and a second sidewall extending from opposing ends of the mounting region in the width direction of the housing, respectively; a first step extending from the first sidewall to the first surface and a second step extending from the second sidewall to the second surface; a third sidewall and a fourth sidewall extending from opposing ends of the mounting region in the longitudinal direction of the housing, respectively; and a third step extending from the third sidewall to the third surface and a fourth step extending from the fourth sidewall to the fourth surface (figs. 31 and 32). Regarding claim 4, Kim teaches the light emitting diode package of claim 3, wherein: the third and fourth sidewalls include inclined surfaces having a first inclination angle (1235, fig. 33), and the first and second sidewalls include inclined surfaces having a second inclination angle (1232) and the first inclination angle is less than (figs. 32 and 33) the second inclination angle. Regarding claim 10, Kim teaches the light emitting diode package of claim 1, wherein the resin has a downward convex shap Regarding claim 11, Kim teaches the light emitting diode package of claim 10, wherein the resin includes a transparent silicon or a phosphor for wavelength conversion (paragraphs [0180][0196]). Regarding claim 18, Kim in view of Kim320 teaches (also see claim 1) the backlight unit comprising: a plurality of light emitting diode packages (1335, fig. 34) each being configured to emit light in at least three directions (from LED to 1231 and to 1235, and upward of the package, paragraphs [0209][0213][0221]); a circuit board (1331, paragraph [0217]) on which the light emitting diode packages are mounted; a light guide plate (1340) configured to change a path of light (paragraph [0225]) incident from the light emitting diode packages; and at least one optical sheet disposed on an upper surface of the light guide plate, wherein each of the light emitting diode packages includes: a housing including a cavity region therein; a light emitting diode chip mounted in the cavity region of the housing; and a resin (1120, paragraphs [0180][0196]) formed in the cavity region to cover a light emitting surface of the light emitting diode chip, wherein the housing includes a first surface perpendicular to a width direction of the housing, a second surface parallel to the first surface, a third surface perpendicular to a longitudinal direction of the housing, and a fourth surface parallel to the third surface, wherein the first surface and the second surface surround the resin while the third surface and the fourth surface expose side surfaces of the resin, wherein a height of each portion of the third surface is greater than a height of the light emitting diode chip, but less than a height of each of the first and second surfaces, to prevent direct side emission of light emitted from the light emitting diode chip, and wherein exposed side surfaces of the resins of adjacent light emitting diode packages face each other (fig. 34), and wherein the housing further includes a mounting region and two inclined regions extending from opposing ends of the mounting region in the longitudinal direction, the mounting region having a flat surface with the LED chip being mounted on a portion of the mounting region, and a length of the mounting region that extends beyond the LED chip in the longitudinal direction is longer than a length of each of the inclined regions in the longitudinal direction.. Regarding claim 19, Kim teaches the backlight unit of claim 18, wherein the housing includes: a first sidewall and a second sidewall extending from opposing ends of the mounting region in the width direction of the housing, respectively; a first step (1231 on the left, figs. 31 and 32) extending from the first sidewall to the first surface and a second step (1231 on the right) extending from the second sidewall to the second surface; a third side wall and a fourth side wall (of side 1230 along G3 and G4, figs. 31-3.3) extending from opposing ends of the mounting region in the longitudinal direction of the housing, respectively; and a third step (1234 on the left) extending from the third sidewall to the third surface and a fourth step (1235 on the right) extending from the fourth sidewall to the fourth surface. Claim(s) 5-7 and 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim (WO2019/124937 A1), English translation is found in (US PG Pub 2020/0212264 A1), Kim (WO 2020/036320 A1, hereafter Kim320), a reference submitted by Applicant, and Emerson (PG Pub 2011/0186873 A1), as applied to claims 1 and 3 above, and further in view of Tischler et al (PG Pub 2015/0221835 A1). Regarding claim 5, the previous combination remains as applied in claim 3. Kim does not teach a center of the mounting region of the light emitting diode chip to the third sidewall is greater than a second distance from the third sidewall to the third step, and the second distance is greater than a third distance from the third step to the third surface of the housing. The claimed features “a center of a mounting region of the light emitting diode chip to the third sidewall”, “a second distance from the third sidewall to the third step”, and “a third distance from the third step to the third surface of the housing” relate to the dimensions of the claimed chip and of the claimed housing. Figs. 16 to 22 of Tischler teach different chip (210, fig. 1) and housing (270 and 230) dimensions results in different output power (figs. 16A, 17A, and 22, for examples), various color uniformities (figs. 16B and 17B, for examples). It would have been obvious to the skilled in the art before the effective filing date of the invention to adjust the claimed first, second, and third distances to optimize the output color uniformity and output power, according to the intended use of the device. “[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation.” In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955). Regarding claim 6, Kim does not teach wherein a fourth distance from the first sidewall to the first step is smaller than the second distance from the third sidewall to the third step. The claimed features “a fourth distance from the first sidewall to the first step” and “the second distance from the third sidewall to the third step” relate to the dimensions of the claimed housing. Figs. 16 to 22 of Tischler teach different chip (210, fig. 1) and housing (270 and 230) dimensions results in different output power (figs. 16A, 17A, and 22, for examples), various color uniformities (figs. 16B and 17B, for examples). It would have been obvious to the skilled in the art before the effective filing date of the invention to adjust the claimed fourth and second distances to optimize the output color uniformity and output power, according to the intended use of the device. “[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation.” In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955). Regarding claim 7, Kim further teaches the light emitting diode chip is disposed at a center of the cavity region in the width direction of the housing (fig. 1). The previous combination does not teach the light emitting diode chip is disposed closer to the third sidewall than the fourth sidewall or is disposed closer to the fourth sidewall than the third sidewall in the longitudinal direction of the housing. The distances from the chip to the sidewall portions relate to the dimensions of the claimed chip and of the claimed housing. Figs. 16 to 22 of Tischler teach different chip (210, fig. 1) and housing (270 and 230) dimensions results in different output power (figs. 16A, 17A, and 22, for examples), various color uniformities (figs. 16B and 17B, for examples). It would have been obvious to the skilled in the art before the effective filing date of the invention to adjust the claimed distances—such as “the light emitting diode chip is disposed closer to the third sidewall than the fourth sidewall or is disposed closer to the fourth sidewall than the third sidewall in the longitudinal direction of the housing”—to optimize the output color uniformity and output power, according to the intended use of the device. “[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation.” In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955). Regarding claim 9, Kim remains as applied in claim 1. Kim does not teach a height of an exposed region of the resin which is exposed through the third surface and the fourth surface of the housing is about 50% or less of an overall height of the light emitting diode package. Kim teaches the dimensions of the housing (frame die FD) affect various light output features (figs. 16 to 22). Kim also teaches dimension of the exposed region of the resin (232, fig. 1D) changes the output power of light (paragraph [0267]). In the same field of endeavor, Park also teaches to adjust the height of the sidewalls (fig. 20c) to optimize light output (paragraph [0078]). It would have been obvious to the skilled in the art before the effective filing date of the invention to adjust “a height of an exposed region of the resin which is exposed through the third surface and the fourth surface of the housing” and “an overall height of the light emitting diode package” to optimize the light output characteristics. “[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation.” In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955). Claim(s) 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim (WO2019/124937 A1), English translation is found in (US PG Pub 2020/0212264 A1), Kim (WO 2020/036320 A1, hereafter Kim320), a reference submitted by Applicant, and Emerson (PG Pub 2011/0186873 A1), as applied to claim 1 above, and further in view of Hamada (PG Pub 2010/0134716 A1) and Han et al (PG Pub 2011/0031526 A1). Regarding claim 8, the previous combination remains as applied in claim 1. Kim does not teach electrodes electrically connected to the light emitting diode chip, wherein the electrodes are respectively exposed on the third surface and the fourth surface of the housing. In the same field of endeavor, Hamada teaches electrodes (22a and 22b, fig. 1) electrically connected (paragraph [0068]) to the light emitting diode chip (21), wherein the electrodes are respectively exposed on the third surface and the fourth surface of the housing (fig. 1), for the benefit of providing power to the light emitting diode chip to turn in on/off. Hamada does not teach wherein each of the electrodes is spaced apart from a bottom surface of the housing by a preset height, and is surrounded by the housing. In the same field of endeavor, Han teaches an electrode (114, fig. 4) is spaced apart from a bottom surface of the housing (130) by a preset height, and is surrounded by the housing, for the benefit of securing the electrode to the housing (paragraph [0054]). Claim(s) 1-4,10,11,18,19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim (WO2019/124937 A1), English translation is found in (US PG Pub 2020/0212264 A1), Park et al (PG Pub 2017/0104141 A1), and Emerson (PG Pub 2011/0186873 A1). Regarding claim 1, Kim teaches a light emitting diode package comprising: a housing (1230, figs. 31-34) including a cavity region therein; a light emitting diode chip (1110) mounted in the cavity region of the housing; and a resin (1120, paragraphs [0180][0196]) formed in the cavity region to cover a light emitting surface of the light emitting diode chip, wherein the housing includes a first surface and a second surface perpendicular to a width direction of the housing and spaced apart from each other, and a third surface and a fourth surface perpendicular a longitudinal direction of the housing and spaced apart from each other, wherein the first surface and the second surface surround the resin while the third surface and the fourth surface expose side surfaces of the resin (figs. 31-34), and the housing further includes a mounting region (under 1110, fig. 33) and two inclined regions (1235) extending from opposing ends of the mounting region in the longitudinal direction, the mounting region having a flat surface with the LED chip being mounted on a portion of the mounting region. Kim does not teach wherein a height of each portion of the third surface is greater than a height of the light emitting diode chip, but less than a height of each of the first and second surfaces, to prevent direct side emission of light emitted from the light emitting diode chip. In the same field of endeavor, Park teaches a height of each portion of the third surface (a surface that includes 6100 and 6110, fig. 20c) is greater than a height of the light emitting diode chip, but less than a height of each of the first and second surfaces (fig. 20a, due to partial removal of the two surfaces shown in fig. 20c, paragraph [0078]), for the benefit of adjusting the amount of light being extracted from the side surfaces (paragraph [0078]). Thus, it would have been obvious to the skilled in the art before the effective filing date of the invention to make a height of each portion of the third surface is greater than a height of the light emitting diode chip, but less than a height of each of the first and second surfaces, for the benefit of adjusting the amount of light being extracted from the side surfaces. Although Park does not teach the modification is to prevent direct side emission of light emitted from the light emitting diode chip, modifying Kim’s device in view of Park’s teaching would have enabled the resultant device to function as claimed—that is “to prevent direct side emission of light emitted from the light emitting diode chip”—because the resultant device would have the same structure as that claimed. It was ruled that “[a] claim containing a ‘recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus’ if the prior art apparatus teaches all the structural limitations of the claim. Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987). Kim does not teach a length of the mounting region that extends beyond the LED chip in the longitudinal direction is longer than a length of each of the inclined regions in the longitudinal direction. In the same field of endeavor, Emerson teaches the housing further includes a mounting region and two inclined regions (figs. 5, 7, 16) extending from opposing ends of the mounting region in the longitudinal direction, the mounting region having a flat surface with the LED chip (14, paragraph [0053]) being mounted on a portion of the mounting region, and a length of the mounting region that extends beyond the LED chip in the longitudinal direction is longer than a length of each of the inclined regions ((L3 – L4)/2 = 0.965mm or 965 microns, Table 1) in the longitudinal direction (x and y equals 300 microns, Table 2, and L4 equals 3.47 mm or 3470 microns and W3 equals 1.7mm or 1700 microns, Table 1), for the benefit of reducing thermal breakdown and maintain brightness (paragraph [0003]). Thus, it would have been obvious to the skilled in the art before the effective filing date of the invention to make a length of the mounting region that extends beyond the LED chip in the longitudinal direction is longer than a length of each of the inclined regions in the longitudinal direction for the benefit of reducing thermal breakdown and maintain brightness. Regarding claim 2, Kim teaches the light emitting diode package of claim 1, wherein the housing is formed of a silicon or epoxy material (paragraph [0056]) having a white color (paragraph [0207]). Regarding claim 3, Kim teaches (see claim 19) the light emitting diode package of claim 1, wherein the housing includes: a first sidewall and a second sidewall extending from opposing ends of the mounting region in the width direction of the housing, respectively; a first step extending from the first sidewall to the first surface and a second step extending from the second sidewall to the second surface; a third sidewall and a fourth sidewall extending from opposing ends of the mounting region in the longitudinal direction of the housing, respectively; and a third step extending from the third sidewall to the third surface and a fourth step extending from the fourth sidewall to the fourth surface (figs. 31 and 32). Regarding claim 4, Kim teaches the light emitting diode package of claim 3, wherein: the third and fourth sidewalls include inclined surfaces having a first inclination angle (1235, fig. 33), and the first and second sidewalls include inclined surfaces having a second inclination angle (1232) and the first inclination angle is less than (figs. 32 and 33) the second inclination angle. Regarding claim 10, Kim teaches the light emitting diode package of claim 1, wherein the resin has a downward convex shap (figs. 32 and 33). Regarding claim 11, Kim teaches the light emitting diode package of claim 10, wherein the resin includes a transparent silicon or a phosphor for wavelength conversion (paragraphs [0180][0196]). Regarding claim 18, Kim in view of Park teaches (also see claim 1) the backlight unit comprising: a plurality of light emitting diode packages (1335, fig. 34) each being configured to emit light in at least three directions (from LED to 1231 and to 1235, and upward of the package, paragraphs [0209][0213][0221]); a circuit board (1331, paragraph [0217]) on which the light emitting diode packages are mounted; a light guide plate (1340) configured to change a path of light (paragraph [0225]) incident from the light emitting diode packages; and at least one optical sheet disposed on an upper surface of the light guide plate, wherein each of the light emitting diode packages includes: a housing including a cavity region therein; a light emitting diode chip mounted in the cavity region of the housing; and a resin (1120, paragraphs [0180][0196]) formed in the cavity region to cover a light emitting surface of the light emitting diode chip, wherein the housing includes a first surface perpendicular to a width direction of the housing, a second surface parallel to the first surface, a third surface perpendicular to a longitudinal direction of the housing, and a fourth surface parallel to the third surface, wherein the first surface and the second surface surround the resin while the third surface and the fourth surface expose side surfaces of the resin, wherein a height of the third surface is greater than a height of the light emitting diode chip, but less than a height of each of the first and second surfaces, to prevent direct side emission of light emitted from the light emitting diode chip, and wherein exposed side surfaces of the resins of adjacent light emitting diode packages face each other (fig. 34), and wherein the housing further includes a mounting region and two inclined regions extending from opposing ends of the mounting region in the longitudinal direction, the mounting region having a flat surface with the LED chip being mounted on a portion of the mounting region, and a length of the mounting region that extends beyond the LED chip in the longitudinal direction is longer than a length of each of the inclined regions in the longitudinal direction. Regarding claim 19, Kim teaches the backlight unit of claim 18, wherein the housing includes: a first sidewall and a second sidewall extending from opposing ends of the mounting region in the width direction of the housing, respectively; a first step (1231 on the left, figs. 31 and 32) extending from the first sidewall to the first surface and a second step (1231 on the right) extending from the second sidewall to the second surface; a third side wall and a fourth side wall (of side 1230 along G3 and G4, figs. 31-3.3) extending from opposing ends of the mounting region in the longitudinal direction of the housing, respectively; and a third step (1234 on the left) extending from the third sidewall to the third surface and a fourth step (1235 on the right) extending from the fourth sidewall to the fourth surface. Claim(s) 5-7 and 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim (WO2019/124937 A1), English translation is found in (US PG Pub 2020/0212264 A1), Park et al (PG Pub 2017/0104141 A1), and Emerson (PG Pub 2011/0186873 A1) as applied to claims 1 and 3 above, and further in view of Tischler et al (PG Pub 2015/0221835 A1). Regarding claim 5, the previous combination remains as applied in claim 3. Kim does not teach a center of the mounting region of the light emitting diode chip to the third sidewall is greater than a second distance from the third sidewall to the third step, and the second distance is greater than a third distance from the third step to the third surface of the housing. The claimed features “a center of a mounting region of the light emitting diode chip to the third sidewall”, “a second distance from the third sidewall to the third step”, and “a third distance from the third step to the third surface of the housing” relate to the dimensions of the claimed chip and of the claimed housing. Figs. 16 to 22 of Tischler teach different chip (210, fig. 1) and housing (270 and 230) dimensions results in different output power (figs. 16A, 17A, and 22, for examples), various color uniformities (figs. 16B and 17B, for examples). It would have been obvious to the skilled in the art before the effective filing date of the invention to adjust the claimed first, second, and third distances to optimize the output color uniformity and output power, according to the intended use of the device. “[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation.” In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955). Regarding claim 6, Kim does not teach wherein a fourth distance from the first sidewall to the first step is smaller than the second distance from the third sidewall to the third step. The claimed features “a fourth distance from the first sidewall to the first step” and “the second distance from the third sidewall to the third step” relate to the dimensions of the claimed housing. Figs. 16 to 22 of Tischler teach different chip (210, fig. 1) and housing (270 and 230) dimensions results in different output power (figs. 16A, 17A, and 22, for examples), various color uniformities (figs. 16B and 17B, for examples). It would have been obvious to the skilled in the art before the effective filing date of the invention to adjust the claimed fourth and second distances to optimize the output color uniformity and output power, according to the intended use of the device. “[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation.” In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955). Regarding claim 7, Kim further teaches the light emitting diode chip is disposed at a center of the cavity region in the width direction of the housing (fig. 1). The previous combination does not teach the light emitting diode chip is disposed closer to the third sidewall than the fourth sidewall or is disposed closer to the fourth sidewall than the third sidewall in the longitudinal direction of the housing. The distances from the chip to the sidewall portions relate to the dimensions of the claimed chip and of the claimed housing. Figs. 16 to 22 of Tischler teach different chip (210, fig. 1) and housing (270 and 230) dimensions results in different output power (figs. 16A, 17A, and 22, for examples), various color uniformities (figs. 16B and 17B, for examples). It would have been obvious to the skilled in the art before the effective filing date of the invention to adjust the claimed distances—such as “the light emitting diode chip is disposed closer to the third sidewall than the fourth sidewall or is disposed closer to the fourth sidewall than the third sidewall in the longitudinal direction of the housing”—to optimize the output color uniformity and output power, according to the intended use of the device. “[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation.” In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955). Regarding claim 9, Kim remains as applied in claim 1. Kim does not teach a height of an exposed region of the resin which is exposed through the third surface and the fourth surface of the housing is about 50% or less of an overall height of the light emitting diode package. Kim teaches the dimensions of the housing (frame die FD) affect various light output features (figs. 16 to 22). Kim also teaches dimension of the exposed region of the resin (232, fig. 1D) changes the output power of light (paragraph [0267]). In the same field of endeavor, Park also teaches to adjust the height of the sidewalls (fig. 20c) to optimize light output (paragraph [0078]). It would have been obvious to the skilled in the art before the effective filing date of the invention to adjust “a height of an exposed region of the resin which is exposed through the third surface and the fourth surface of the housing” and “an overall height of the light emitting diode package” to optimize the light output characteristics. “[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation.” In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955). Claim(s) 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim (WO2019/124937 A1), English translation is found in (US PG Pub 2020/0212264 A1), Park et al (PG Pub 2017/0104141 A1), and Emerson (PG Pub 2011/0186873 A1) as applied to claim 1 above, and further in view of Hamada (PG Pub 2010/0134716 A1) and Han et al (PG Pub 2011/0031526 A1). Regarding claim 8, the previous combination remains as applied in claim 1. Kim does not teach electrodes electrically connected to the light emitting diode chip, wherein the electrodes are respectively exposed on the third surface and the fourth surface of the housing. In the same field of endeavor, Hamada teaches electrodes (22a and 22b, fig. 1) electrically connected (paragraph [0068]) to the light emitting diode chip (21), wherein the electrodes are respectively exposed on the third surface and the fourth surface of the housing (fig. 1), for the benefit of providing power to the light emitting diode chip to turn in on/off. Hamada does not teach wherein each of the electrodes is spaced apart from a bottom surface of the housing by a preset height, and is surrounded by the housing. In the same field of endeavor, Han teaches an electrode (114, fig. 4) is spaced apart from a bottom surface of the housing (130) by a preset height, and is surrounded by the housing, for the benefit of securing the electrode to the housing (paragraph [0054]). Response to Arguments Applicant’s arguments with respect to claim(s) 1-11, 18, and 19 have been considered but are moot because Emerson teaches the added features. See rejection above. Applicant's arguments filed march 2, 2026 have been fully considered but they are not persuasive because the previously cited references teach the amended features. See rejection above. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to FEIFEI YEUNG LOPEZ whose telephone number is (571)270-1882. The examiner can normally be reached M-F: 8am to 4pm EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dale Page can be reached on 571 270 7877. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /FEIFEI YEUNG LOPEZ/Primary Examiner, Art Unit 2899
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Prosecution Timeline

Show 1 earlier event
Mar 20, 2025
Non-Final Rejection mailed — §103
Jun 13, 2025
Response Filed
Sep 05, 2025
Final Rejection mailed — §103
Nov 25, 2025
Request for Continued Examination
Dec 03, 2025
Response after Non-Final Action
Dec 12, 2025
Non-Final Rejection mailed — §103
Mar 02, 2026
Response Filed
Apr 23, 2026
Final Rejection mailed — §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12684898
LIGHT-EMITTING ELEMENT AND LIGHT-EMITTING DIODE
4y 4m to grant Granted Jul 14, 2026
Patent 12684931
DISPLAY PANEL AND DISPLAY DEVICE
3y 9m to grant Granted Jul 14, 2026
Patent 12684923
TRANSFER SUBSTRATE USED FOR MANUFACTURING DISPLAY DEVICE, DISPLAY DEVICE, AND METHOD FOR MANUFACTURING DISPLAY DEVICE
3y 5m to grant Granted Jul 14, 2026
Patent 12684930
DISPLAY DEVICE
3y 7m to grant Granted Jul 14, 2026
Patent 12680663
ELECTRONIC DEVICE
3y 3m to grant Granted Jul 14, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

5-6
Expected OA Rounds
81%
Grant Probability
78%
With Interview (-2.9%)
2y 4m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 1071 resolved cases by this examiner. Grant probability derived from career allowance rate.

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