Prosecution Insights
Last updated: April 19, 2026
Application No. 17/878,135

KEY FOB AUTHENTICATION, RETENTION, AND REVOCATION

Non-Final OA §103§112
Filed
Aug 01, 2022
Examiner
KHAN, SHER A
Art Unit
2497
Tech Center
2400 — Computer Networks
Assignee
Texas Instruments Incorporated
OA Round
5 (Non-Final)
85%
Grant Probability
Favorable
5-6
OA Rounds
2y 7m
To Grant
99%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allow Rate
284 granted / 333 resolved
+27.3% vs TC avg
Strong +23% interview lift
Without
With
+23.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
12 currently pending
Career history
345
Total Applications
across all art units

Statute-Specific Performance

§101
11.0%
-29.0% vs TC avg
§103
51.1%
+11.1% vs TC avg
§102
2.4%
-37.6% vs TC avg
§112
18.6%
-21.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 333 resolved cases

Office Action

§103 §112
Notice of Pre-AIA or AIA Status The present application is being examined under the pre-AIA first to invent provisions. Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 02/10/2026 has been entered. Response to Amendments and Arguments Applicant amended independent claims 1 & 13 also amended dependent claim 12 and argued in the remarks 02/10/2026 that cited arts (True and Kune) alone and or in combination does not teach “selecting a subset of bits of an encrypted counter value (fewer than all bits of the encrypted counter value) and transmitting a message that comprises (i) the selected subset of encrypted-counter bits and (ii) a selected subset of counter-value bits, wherein the message excludes unselected bits of the encrypted counter value”. Examiner considered these amendments and arguments but respectfully disagrees as the spec or disclosure as whole does not teach explicitly selecting a subset of bits of an encrypted counter value (fewer than all bits of the encrypted counter value) and transmitting a message that comprises (i) the selected subset of encrypted-counter bits wherein the message excludes unselected bits of the encrypted counter value. The Applicant mentioned paragraph 0018 and 0026 of the specification to show support of this amended limitations. Examiner noted that paragraph 0018 teaches “Key fob 101 then transmits (105) the 8 lowest -order bits of 128-bit counter 103 and some predetermined bits of AES-128, OpKey-encrypted value of the counter 103 to control unit 102”. And paragraph [0026] teaches” a process for normal operation of a key fob and control unit using OpKey verification. In step 301, the key fob reads the 8 lowest-order bits of a 128-bit counter. In step 302, the key fob generates an AES-128, OpKey-encrypted value of the key fob counter. The 8 lowest-order bits (does not mention encrypted bits) and some selected bits from the AES-128, OpKey-encrypted value of the key fob counter are sent to the control unit in step 303. This information may be associated with a particular command or request by the key fob”. Both paragraphs teach selection and transmission of the 8 lowest -order bits of 128-bit counter 103 (lowest order 8 clear 8 bits nowhere it mentions that these 8 bits is a part of or subset of encrypted counter value) other and OpKey-encrypted value (full encrypted value) of the counter 103. It is obvious to a skilled person that these paragraphs does not teach explicitly as claimed by the Applicant and the limitation that recite selecting and transmission of subset of encrypted counter bits and also does not teach wherein the message excludes unselected bits of the encrypted counter value. The Applicant has also mentioned other paragraphs such as 0005, 0007, 0019, 0031 & 0034. However, none of these paragraphs provides explicit support to the newly amended part of the claims 1 & 13. Claim Rejections - 35 USC§ 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL-The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claims 1-20 rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. The subject matters " select a subset of bits of the plurality of bits of the encrypted counter value, wherein the subset is fewer than all bits of the encrypted counter value; and transmit, via the transmitter, a message that comprises the selected subset of bits of the plurality of bits of the encrypted counter value and the selected subset of the plurality of bits of the counter value, wherein unselected bits of the encrypted counter value are excluded from the message." as recited in claims 1 & 13 are not properly described in the application/dislousre as filed. Regarding claim 1, the claim(s) recite(s) limitations as mentioned above is not supported by the instant application as originally filed. The applicant failed to provide explicit support for the newly added claims as explained above in “Response to Amendments and Argument“ section. The Applicant is advised to clearly and concisely provide claim language that is consistent and correlates to the specification and mindful not to improperly utilized language that is clearly not supported. The Examiner respectfully requests the applicant to provide additional (besides what has already been mentioned by the Applicant) paragraphs, lines and figure(s) of the instant application that supports the amended limitation of the claim(s) and/or any supportive comment(s) to help clarify and resolve this issue(s). Dependent claims 2-12 are also rejected for their dependencies on claim1. Claims 13 (including claims 14-20) is rejected for the similar reasons as set forth for claim 1. Dependent claims 14-20 are also rejected for their dependencies on claim1. Due to the 112 (a) rejections of the current claim language, the Examiner has given a reasonable interpretation of said language and the claims are rejected as broadest and best interpreted. In addition, applicant is welcome to point out additional (besides what has already been mentioned by the Applicant) places/locations where in the specification the Examiner can find support for this language if Applicant believes otherwise. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Claims 1-3, & 13-14 are rejected under 35 USC 103 as being unpatentable over True (US 20100208894 A1 as mentioned in IDS dated 08/01/2022) in view of Forest (USUS 20050041813 A1- as mentioned in IDS dated 08/01/2022) and Kune (US20090292913) Regarding claim 1, True teaches: a device, comprising: a transmitter; a counter configured to provide a current counter value indicated by a plurality of bits; [[0045] In an embodiment, a system for an encoder and decoder wireless transmission system is provided comprising an encoder and decoder, the encoder comprising, checker means adapted to check the logic state of encoder input lines and assembling these states into a command byte, storage means adapted to store the command byte, an authentication value, and a counter value, combiner means adapted for combining the command byte, the authentication value, and counter value into an n-bit data block, ] a memory configured to store an operation key; [0049] In another embodiment, the system further comprises wherein storage means adapted for storing a key (operation key) in the encoder comprises encoder non-volatile memory, the encoder further comprising encoder communication means for communicating with the decoder non-volatile memory,] a processor coupled to the transmitter and memory, wherein the processor is configured to cause the device to perform operation that comprises encrypt the counter value using the operation key to produce an encrypted counter value; [[0045] In an embodiment, a system for an encoder and decoder wireless transmission system is provided comprising an encoder and decoder, the encoder comprising, checker means adapted to check the logic state of encoder input lines and assembling these states into a command byte, storage means adapted to store the command byte, an authentication value, and a counter value, combiner means adapted for combining the command byte, the authentication value, and counter value into an n-bit data block, encryption means (it is obvious to a skilled person in the art that a key is used) adapted to encrypt the n-bit data block forming an encrypted data block, transmitter means adapted to transmit the encrypted data block as a packet to the decoder,] Although, True teaches counter value, he does not teach explicitly, however, Forest teaches: select a subset of bits of the plurality of bits of the encrypted counter value, wherein the subset is fewer than all bits of the encrypted counter value; [[0016] The transmission of a message from the RKE transmitter to the motor vehicle can be accomplished by the following method, explained with continued reference to FIG. 1. In accordance with one embodiment of the invention, the plaintext command message created in an RKE transmitter 12 is based on a command generated in response to input from the individual possessing the RKE transmitter and the output of an incrementable counter 38. The individual possessing the RKE transmitter is usually the owner of the motor vehicle or other authorized user. The input from that individual is generated, for example, by pushing one of buttons 30-33 on the RKE transmitter. The plaintext command message may also include an identifier 42 identifying the particular RKE transmitter. Part (subset) or all of the command message is encrypted by an encryption algorithm 40 using a working key 24. The output of the encryption algorithm, a ciphertext version of the command message, is transmitted by transmitter 26 to a receiver 14 in motor vehicle 16. Each time a message is transmitted by transmitter 26, incrementable counter 38 is incremented so that the next command message encrypted by the working key and transmitted by transmitter 26 will include a different incrementable counter output. That is, the encrypted message changes for each subsequent command message transmission. Upon receipt by receiver 14 of a cipher message transmitted by transmitter 26, decryption circuitry 48 decrypts the message to retrieve the plaintext command message. The decryption circuitry is configured with decryption algorithm 50 to reverse the encryption process of encryption algorithm 40 and to recover the output of incrementable counter 38 which has been included in the transmitted message. Incrementable counter 52 is initially synchronized to incrementable counter 38. Each time a message is received by receiver 14, decrypted by decryption circuitry 48, and verified as a valid message from a valid transmitter by verification circuitry 51, incrementable counter 52 is resynchronized to the value of incrementable counter 38 that was received in the encrypted message. The inputs to decryption circuitry 48 are the working key 24, and the ciphertext command message received by receiver 14. The manner in which decryption algorithm 50 receives the correct working key is described below. By incrementing incrementable counter 38 each time a message is transmitted by transmitter 26 and by resynchronizing incrementable counter 52 each time a message is received by receiver 14, decrypted by decryption circuitry 48, and verified to be a valid message, the two incrementable counters 38 and 52 stay substantially synchronized. Because incrementable counter 38 may be incremented without a corresponding incrementing of incrementable counter 52, for example by a blind transmission by transmitter 26, verification circuitry 51 is configured to accept messages based upon the current output of incrementable counter 52 as well as a predetermined window of future counts. Each time a message is successfully verified by verification circuitry 51, incrementable counters 38 and 52 are resynchronized.] transmit, via the transmitter, a message that comprises selected subset of bits of the plurality of bits of the encrypted counter value, wherein unselected bits of the encrypted counter value are excluded from the message, [[0016] The transmission of a message from the RKE transmitter to the motor vehicle can be accomplished by the following method, explained with continued reference to FIG. 1. In accordance with one embodiment of the invention, the plaintext command message created in an RKE transmitter 12 is based on a command generated in response to input from the individual possessing the RKE transmitter and the output of an incrementable counter 38. The individual possessing the RKE transmitter is usually the owner of the motor vehicle or other authorized user. The input from that individual is generated, for example, by pushing one of buttons 30-33 on the RKE transmitter. The plaintext command message may also include an identifier 42 identifying the particular RKE transmitter. Part (subset) or all of the command message is encrypted by an encryption algorithm 40 using a working key 24. The output of the encryption algorithm, a ciphertext version of the command message, is transmitted by transmitter 26 to a receiver 14 in motor vehicle 16. Each time a message is transmitted by transmitter 26, incrementable counter 38 is incremented so that the next command message encrypted by the working key and transmitted by transmitter 26 will include a different incrementable counter output. That is, the encrypted message changes for each subsequent command message transmission. Upon receipt by receiver 14 of a cipher message transmitted by transmitter 26, decryption circuitry 48 decrypts the message to retrieve the plaintext command message. The decryption circuitry is configured with decryption algorithm 50 to reverse the encryption process of encryption algorithm 40 and to recover the output of incrementable counter 38 which has been included in the transmitted message. Incrementable counter 52 is initially synchronized to incrementable counter 38. Each time a message is received by receiver 14, decrypted by decryption circuitry 48, and verified as a valid message from a valid transmitter by verification circuitry 51, incrementable counter 52 is resynchronized to the value of incrementable counter 38 that was received in the encrypted message. The inputs to decryption circuitry 48 are the working key 24, and the ciphertext command message received by receiver 14. The manner in which decryption algorithm 50 receives the correct working key is described below. By incrementing incrementable counter 38 each time a message is transmitted by transmitter 26 and by resynchronizing incrementable counter 52 each time a message is received by receiver 14, decrypted by decryption circuitry 48, and verified to be a valid message, the two incrementable counters 38 and 52 stay substantially synchronized. Because incrementable counter 38 may be incremented without a corresponding incrementing of incrementable counter 52, for example by a blind transmission by transmitter 26, verification circuitry 51 is configured to accept messages based upon the current output of incrementable counter 52 as well as a predetermined window of future counts. Each time a message is successfully verified by verification circuitry 51, incrementable counters 38 and 52 are resynchronized.] Before the effective filing date of the claimed invention, it would have been obvious to one with ordinary skill in the art to combine the teachings of True with the disclosure of Forest. The motivation or suggestion would have been to implement improved system and method a for keyless remote operation of motor vehicle. (abstract, para 0001-0004, Forest) Although, True and Forest teach counter value, he does not teach explicitly, however, Kune teaches: select a subset of the plurality of bits of the counter value; [0040] As shown in FIG. 2, the controller 202 includes a counter 214. The counter 214 represents any suitable hardware, software, firmware, or combination thereof that increments or decrements a value. As a particular example, the counter 214 could represent a 128-bit counter. The value of the counter 214 can be used for various purposes, such as to support counter-based communications. As a particular example, the controller 202 could use the counter value to perform various encryption, decryption, or authentication functions. As another particular example, the controller 202 could include a subset of the bits from the counter value in messages transmitted by the wireless node 200. Additional details regarding these functions are provided below.] transmit, via the transmitter, a message that comprises the selected subset of the plurality of bits of the counter value, [0040] As shown in FIG. 2, the controller 202 includes a counter 214. The counter 214 represents any suitable hardware, software, firmware, or combination thereof that increments or decrements a value. As a particular example, the counter 214 could represent a 128-bit counter. The value of the counter 214 can be used for various purposes, such as to support counter-based communications. As a particular example, the controller 202 could use the counter value to perform various encryption, decryption, or authentication functions. As another particular example, the controller 202 could include a subset of the bits from the counter value in messages transmitted by the wireless node 200. Additional details regarding these functions are provided below. [0044] Partial counter values 304 represent portions of the counter values 302 that are actually included in the transmitted messages. As noted above, a transmitting node could include only a subset of the bits of the counter values 302 in its transmitted messages. Here, the transmitting node includes the six least significant bits of the counter values 302 in its transmitted messages. Because the entire counter values (such as the entire 128-bit values) are not included in the messages, the transmitting node uses less bandwidth and overhead to transmit the messages.] Before the effective filing date of the claimed invention, it would have been obvious to one with ordinary skill in the art to combine the teachings of True and Forest with the disclosure of Kune. The motivation or suggestion would have been to implement improved system and method a for counter-based communications in wireless sensor networks and other networks. (abstract, para 0002-0012, Kune) Regarding claims 2 & 14, although, True and Forest teach counter value, they does not explicitly teach, however, Kune teaches wherein the counter is a 128-bit counter and the plurality of bits includes 128 bits. [0040] As shown in FIG. 2, the controller 202 includes a counter 214. The counter 214 represents any suitable hardware, software, firmware, or combination thereof that increments or decrements a value. As a particular example, the counter 214 could represent a 128-bit counter. The value of the counter 214 can be used for various purposes, such as to support counter-based communications. As a particular example, the controller 202 could use the counter value to perform various encryption, decryption, or authentication functions. As another particular example, the controller 202 could include a subset of the bits from the counter value in messages transmitted by the wireless node 200. Additional details regarding these functions are provided below. Before the effective filing date of the claimed invention, it would have been obvious to one with ordinary skill in the art to combine the teachings of True and Forest with the disclosure of Kune. The motivation or suggestion would have been to implement improved system and method a for counter-based communications in wireless sensor networks and other networks. (abstract, para 0002-0012, Kune) Regarding claim 3, although, True and Forest teach counter value they do not explicitly teach, however, Kune teaches wherein the processor is configured to, after transmitting the message, increment the counter by one. [0032] In one aspect of operation, various nodes in a wireless network may engage in counter-based communications. Counter-based communications refer to communications that involve the use of a counter, such as when at least part of a counter value is included in a transmitted or received message or when a counter value is used to encrypt, decrypt, or authenticate a message. As a particular example, the leaf nodes and infrastructure nodes in FIG. 1 could support the EAX mode of encryption defined in the Advanced Encryption Standard (AES) from the National Institute of Standards and Technology (NIST). This standard defines a 128-bit counter that is incremented each time a message is transmitted. In some systems, the entire 128-bit counter value is included in each message that is transmitted by a wireless node. However, this can lead to wasted bandwidth and significant overhead, particularly when the transmitted messages are relatively small.] Before the effective filing date of the claimed invention, it would have been obvious to one with ordinary skill in the art to combine the teachings of True and Forest with the disclosure of Kune. The motivation or suggestion would have been to implement improved system and method a for counter-based communications in wireless sensor networks and other networks. (abstract, para 0002-0012, Kune) Regarding claim 13, this claim is interpreted to be same as claim 13, and rejected for the same reasons as set forth for claim 1. Claims 4-5 & 15-16 are rejected under 35 USC 103 as being unpatentable over True in view of Forest, Kune and Timpe (US20070260777) Regarding claims 4 & 15, although, True, Forest and Kune teach counter value, they do not teach, however, Timpe teaches wherein the subset of the plurality of bits of the counter value is a predetermined number of lowest-order bits of the counter value. [0027] Furthermore, under certain circumstances, it is possible to store the total event counter 18 and the write pointer 20 in the same register to define a counter/write pointer 18a. According to one embodiment of the present invention, the starting address of the queue 12, which can be conceptualized as either a literal address or an offset to another memory address, is selected to be (0) and the size of the address space (number of addressable locations), denoted m, is selected to satisfy the equation: size m=2.sup.n where n is a positive integer. For example, if n is equal to 8, then the size of the address space m=256. Because the address space starts at address (0), the queue address range is 0-255, and can be tracked using the lowest order n bits (8 bits in this illustration) of the total event counter 18. The total event counter 18 is thus selected to be able to hold a count significantly higher than m (256 in this illustration). For example, by allowing the count value stored in the total event counter 18 to be represented as a thirty two bit word, approximately 4.3 billion writes to the queue 12 can occur before the total event counter 18 overflows. Note that as the counter is incremented, the lowest order 8 bits circularly count through a cycle of 0-255. On the 256.sup.th write to the total event counter 18, the lowest order 8 bits of the count roll back to zero. Where the write pointer 20 is encoded into the lowest order n bits of the total event counter 18, the system 10 does not need to maintain a separate physical register for the write pointer 20. Under this arrangement, the queue logic 14 writes to the total event counter 18 to update a count stored therein, and the queue logic 14 reads (at least the lowest order n bits) from the total event counter 18 to determine the next write position in the queue 12.] Before the effective filing date of the claimed invention, it would have been obvious to one with ordinary skill in the art to combine the teachings of True, Forest and Kune with the disclosure of Timpe. The motivation or suggestion would have been to implement improved system and method a for utilizing counter and tracking changing counter value in wireless communications environment. (abstract, para 0001-0008, Timpe) Regarding claim 5 & 16, although, True, Foest and Kune teach counter value, they do not teach, however, Timpe teaches wherein the predetermined number of lowest-order bits of the counter value is 8 bits. [0027] Furthermore, under certain circumstances, it is possible to store the total event counter 18 and the write pointer 20 in the same register to define a counter/write pointer 18a. According to one embodiment of the present invention, the starting address of the queue 12, which can be conceptualized as either a literal address or an offset to another memory address, is selected to be (0) and the size of the address space (number of addressable locations), denoted m, is selected to satisfy the equation: size m=2.sup.n where n is a positive integer. For example, if n is equal to 8, then the size of the address space m=256. Because the address space starts at address (0), the queue address range is 0-255, and can be tracked using the lowest order n bits (8 bits in this illustration) of the total event counter 18. The total event counter 18 is thus selected to be able to hold a count significantly higher than m (256 in this illustration). For example, by allowing the count value stored in the total event counter 18 to be represented as a thirty-two-bit word, approximately 4.3 billion writes to the queue 12 can occur before the total event counter 18 overflows. Note that as the counter is incremented, the lowest order 8 bits circularly count through a cycle of 0-255. On the 256.sup.th write to the total event counter 18, the lowest order 8 bits of the count roll back to zero. Where the write pointer 20 is encoded into the lowest order n bits of the total event counter 18, the system 10 does not need to maintain a separate physical register for the write pointer 20. Under this arrangement, the queue logic 14 writes to the total event counter 18 to update a count stored therein, and the queue logic 14 reads (at least the lowest order n bits) from the total event counter 18 to determine the next write position in the queue 12.] Before the effective filing date of the claimed invention, it would have been obvious to one with ordinary skill in the art to combine the teachings of True, Forest and Kune with the disclosure of Timpe. The motivation or suggestion would have been to implement improved system and method a for utilizing counter and tracking changing counter value in wireless communications environment. (abstract, para 0001-0008, Timpe) Claims 6-10, & 17-20 are rejected under 35 USC 103 as being unpatentable over True in view of Forest, Kune and Nowottnick (US20080270793) Regarding claims 6 & 17, although True,Forest and Kune teach encrypting counter value, they do not explicitly teach, however, Nowottnick teaches wherein the operations further comprise encrypt the counter value by a symmetric encryption type with the operation key. [0053] In this context, a block cipher is a type of symmetric-key encryption algorithm transforming a fixed-length block of plaintext (=unencrypted text) data into a block of ciphertext (=encrypted text) data of the same length. This transformation takes place under the action of a user-provided secret key. Decryption is performed by applying the reverse transformation to the ciphertext block using the same secret key (SK). The fixed length is called the block size, and for many block ciphers, the block size is 64 bits or--with processors becoming more sophisticated--128 bits. [0054] A stream cipher is a type of symmetric encryption algorithm generating a so-called keystream, i.e. a sequence of bits used as a key. Encryption is then accomplished by combining the keystream with the plaintext, usually with the bitwise XOR operation. The generation of the keystream can be independent of the plaintext and ciphertext, yielding what is termed a synchronous stream cipher, or it can depend on the data and its encryption, in which case the stream cipher is said to be self-synchronizing. Most stream cipher designs are for synchronous stream ciphers.] Before the effective filing date of the claimed invention, it would have been obvious to one with ordinary skill in the art to combine the teachings of True, Forest and Kune with the disclosure of Nowottnick. The motivation or suggestion would have been to implement improved system and method for secured and fast control of locking an unlocking of a vehicle or remote device. (abstract, para 0001-0012, Nowottnick) Regarding claim 7 & 18, although, True, Forest and Kune teach encryption, they do not teach explicitly, however, Nowottnick teaches wherein the symmetric encryption type is based on the Advanced Encryption Standard (AES). [0059] Moreover, said EEPROM module 52 is designed for providing a first cipher unit 32 of the remote device 20 with a secret key SK on 128-bit basis wherein the first cipher unit 32 is operated on electronic codebook mode (so-called ECB mode), which is a special AES mode.[0060] Furthermore, the EEPROM module 52 is designed for providing a second cipher unit 36 of the remote device 20 with a secret key SK on 128-bit basis wherein the second cipher unit 36 is operated on output feedback mode (so-called OFB mode), which again is a special AES mode.] Before the effective filing date of the claimed invention, it would have been obvious to one with ordinary skill in the art to combine the teachings of True, Forest and Kune with the disclosure of Nowottnick. The motivation or suggestion would have been to implement improved system and method for secured and fast control of locking an unlocking of a vehicle or remote device. (abstract, para 0001-0012, Nowottnick) Regarding claims 8 & 19, although True, Forest and Kune teach encryption, they do not teach explicitly, however, Nowottnick teaches wherein the symmetric encryption type is based on AES-128 encryption. [0066] Moreover, the base station 10 comprises a first memory module 50, namely an EEPROM, for providing a first cipher unit 30 and a second cipher unit 34 with a secret key SK (symmetric key) on 128-bit basis wherein both cipher units 30, 34 are arranged at the base station 10.[0067] The first cipher unit 30 is operated by AES128 based on ECB mode and designed for providing the remote device 20 with a message authenticator MAC on 16-bit basis. The second cipher unit 34 of the base station 10 is operated by AES128 based on OFB mode.] Before the effective filing date of the claimed invention, it would have been obvious to one with ordinary skill in the art to combine the teachings of True, Forest and Kune with the disclosure of Nowottnick. The motivation or suggestion would have been to implement improved system and method for secured and fast control of locking an unlocking of a vehicle or remote device. (abstract, para 0001-0012, Nowottnick) Regarding claim 9, True teaches wherein the message is associated with a command. [0045] In an embodiment, a system for an encoder and decoder wireless transmission system is provided comprising an encoder and decoder, the encoder comprising, checker means adapted to check the logic state of encoder input lines and assembling these states into a command byte, storage means adapted to store the command byte, an authentication value, and a counter value, combiner means adapted for combining the command byte, the authentication value, and counter value into an n-bit data block, encryption means adapted to encrypt the n-bit data block forming an encrypted data block, transmitter means adapted to transmit the encrypted data block as a packet to the decoder, decrementer means adapted for decrementing the counter and encrypting the data block upon each packet transmission, the decoder comprising, storage means adapted to store a key and the counter value, receiver means adapted to receive the encrypted data block as a packet from the encoder, reader means adapted to read the key and the counter value, and decryption means adapted to decrypt the data block using the key and the block cipher to recover the command byte, setter means adapted to set the decoder output lines to the state corresponding to the command byte. Regarding claims 10 & 20, although True, Forest and Kune teach message command, they do not teach explicitly, however, Nowottnick teaches wherein the command is a request to lock or unlock a vehicle. [0050] As shown in FIG. 1, an embodiment being implemented by means of the present invention as an electronic communication system 100 comprises, amongst other things, a remote device 20 in form of a data carrier which in turn is part of an immobilizer, in particular of a system for opening and closing the door locks of a motor vehicle. Said electronic communication system 100 is an authentication control system, further comprising a base station 10 being arranged in the motor vehicle (on the left side of FIG. 1). Before the effective filing date of the claimed invention, it would have been obvious to one with ordinary skill in the art to combine the teachings of True, Forest and Kune with the disclosure of Nowottnick. The motivation or suggestion would have been to implement improved system and method for secured and fast control of locking an unlocking of a vehicle or remote device. (abstract, para 0001-0012, Nowottnick) Claim 11 is rejected under 35 USC 103 as being unpatentable over True, in view of Forest, Kune, Nowottnick and Flanagan (US20070036296) Regarding claim 11, although True, Forest and Kune and Nowottnick teach command, they do not teach clearly, however, Flanagan teaches, wherein the message further includes a data field that identifies the command. [0023] FIG. 5 illustrates an exemplary message 100 for transmitting encrypted phone numbers in accordance with an aspect of the present invention. The exemplary message 100 can be in the form of a packet, such as a VoIP packet, a Bluetooth, or IEEE 802.11 packet, a text message, or attached as part of a voice message. The exemplary message 100 includes a header portion 102, a command portion 104 (data field identifying the command), a party name 106, an encrypted phone number 108 and optionally a password protected key portion 110. The header portion 102 can include information associated with the type of message and the attached fields in the message. The command portion 104 can be a command, such as a command for adding the party name and encrypted phone number to an electronic phone list of a recipient. The command can be an add timer command in which a specified time period is attached, such that the party name and encrypted phone number expires at the end of the time period and is removed from the recipient's phone list and TCU at the end of the time period. The command can be a removal request command in which the party name and encrypted phone number is revoked and is removed from the recipient's phone list and TCU at receipt of the removal request command.] Before the effective filing date of the claimed invention, it would have been obvious to one with ordinary skill in the art to combine the teachings of True, Forest, Kune and Nowottnick with the disclosure of Flanagan. The motivation or suggestion would have been to implement improved system and method for protecting sensitive data from unauthorized access of users or devices. (abstract, para 0001-0006, Flanagan) Allowable Subject Matter Claim 12 is objected to but would be allowable if its limitations are fully incorporated into the base claims including incorporating limitations of all the intervening claims and provided the Applicants rewrites the base claims to overcome the 112a rejection issued for these claims in this instant office action without broadening the scope of these claims. Reasons of allowability will be provided whenever the Applicant further amends the claims and the case reaches the condition of allowability. Conclusion The prior art made of record and listed on the PTO-892 and not relied upon are considered pertinent to applicant’s disclosure. Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHER A KHAN whose telephone number is (571)272-8574. The examiner can normally be reached M-F 8:00 am-500pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eleni A Shiferaw can be reached at 571-272-3867. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SHER A KHAN/Primary Examiner, Art Unit 2497
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Prosecution Timeline

Aug 01, 2022
Application Filed
Jul 13, 2024
Non-Final Rejection — §103, §112
Dec 18, 2024
Response Filed
Feb 13, 2025
Final Rejection — §103, §112
Jun 19, 2025
Request for Continued Examination
Jun 21, 2025
Response after Non-Final Action
Jul 13, 2025
Non-Final Rejection — §103, §112
Oct 09, 2025
Response Filed
Nov 13, 2025
Final Rejection — §103, §112
Feb 10, 2026
Request for Continued Examination
Feb 23, 2026
Response after Non-Final Action
Mar 18, 2026
Non-Final Rejection — §103, §112 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12598069
MONITORING IN DISTRIBUTED COMPUTING SYSTEM
2y 5m to grant Granted Apr 07, 2026
Patent 12562909
LINKING DIGITAL AND PHYSICAL NON-FUNGIBLE ITEMS
2y 5m to grant Granted Feb 24, 2026
Patent 12537670
KEY SHARD VERIFICATION FOR KEY STORAGE DEVICES
2y 5m to grant Granted Jan 27, 2026
Patent 12530491
SELECTIVE DELETION OF SENSITIVE DATA
2y 5m to grant Granted Jan 20, 2026
Patent 12526157
IDENTITY AUTHENTICATION METHOD AND APPARATUS, AND DEVICE, CHIP, STORAGE MEDIUM AND PROGRAM
2y 5m to grant Granted Jan 13, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

5-6
Expected OA Rounds
85%
Grant Probability
99%
With Interview (+23.3%)
2y 7m
Median Time to Grant
High
PTA Risk
Based on 333 resolved cases by this examiner. Grant probability derived from career allow rate.

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