Prosecution Insights
Last updated: April 19, 2026
Application No. 17/880,478

SEMICONDUCTOR DEVICE

Final Rejection §103
Filed
Aug 03, 2022
Examiner
ABEL, GARY ROBERT
Art Unit
2897
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Toshiba Electronic Devices & Storage Corporation
OA Round
4 (Final)
89%
Grant Probability
Favorable
5-6
OA Rounds
3y 4m
To Grant
99%
With Interview

Examiner Intelligence

Grants 89% — above average
89%
Career Allow Rate
31 granted / 35 resolved
+20.6% vs TC avg
Strong +17% interview lift
Without
With
+16.7%
Interview Lift
resolved cases with interview
Typical timeline
3y 4m
Avg Prosecution
46 currently pending
Career history
81
Total Applications
across all art units

Statute-Specific Performance

§103
77.8%
+37.8% vs TC avg
§102
14.7%
-25.3% vs TC avg
§112
6.9%
-33.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 35 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendments Applicant's response of 02/05/2026 has been acknowledged. Claims 1, 3-6, and 8 have been amended. Claim 2 is canceled. No new matter has been added. This office action considers claims 1 and 3-14 pending for prosecution and are examined on their merits. Response to Arguments Applicant’s arguments filed 02/05/2026 with respect to the rejection of claim 1 have been fully considered but are moot in view of the new grounds of rejection. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Notes: when present, hyphen separated fields within the hyphens (- -) represent, for example, as (30A - Fig 2B - [0128]) = (element 30A - Figure No. 2B - Paragraph No. [0128]). For brevity, the texts “Element”, “Figure No.” and “Paragraph No.” shall be excluded, though; additional clarification notes may be added within each field. The number of fields may be fewer or more than three indicated above. The same conventions apply to Column and Sentence, for example (19:14-20) = (column19:sentences 14-20). These conventions are used throughout this document. Claims 1, 3-12 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Ina et al. (US 20190097004 A1 – hereinafter Ina) in view of Kim et al. (US 20200212219 A1 – hereinafter Kim and Zeng et al. (US 20200273987 A1 – hereinafter Zeng). Regarding independent claim 1, Ina teaches: (Currently Amended) A semiconductor device, comprising: a first electrode (141 – fig. 1 – [0026] – “source electrode 141”); a second electrode (143 – fig. 1 – [0026] – “drain electrode 143”) apart from the first electrode (141) in a first direction; a semiconductor part (110, 112, 114, 116 – Fig. 1 – [0026] – “substrate 110, first semiconductor layer 112, a second semiconductor layer 114, and a third semiconductor layer 116”) provided between the first electrode (141) and the second electrode (143), the semiconductor part (110, 112, 114, 116) including a first semiconductor layer (112 - Fig. 1 – [0028] – “the first semiconductor layer 112”) of a first conductivity type (112 - Fig. 1 – [0028] – “the first semiconductor layer 112 … a first conductivity type that is one of an n-type”), and a second semiconductor layer (114 – Fig. 1 [0028] – “second semiconductor layer 114”) provided between the first semiconductor layer (112) and the first electrode (141), the second semiconductor layer (114) being of a second conductivity type (114 – Fig. 1 [0028] – “second semiconductor layer 114 has a second conductivity type that is … p-type”); a first insulating film; a second insulating film; a conductive body provided in the semiconductor part (110, 112, 114, 116) and electrically insulated from the semiconductor part (110, 112, 116) by the first insulating film (130 – fig. 1 – [0039] – “insulating film 130”), the conductive body facing the first semiconductor layer (112) via the first insulating film (130); and a control electrode (142 – Fig. 1 – [0026] – “The “gate electrode 142” corresponds to the “control electrode provided between the second semiconductor layer (114) and the first electrode (141), the control electrode being apart from the conductive body, the control electrode including a first part and a second part linked to the first part, a first part facing the second semiconductor layer via a second insulating film along the first direction, the second part extending along the first direction, the second part facing the second semiconductor layer via the second insulating film along a second direction, the second direction being orthogonal to the first direction, wherein a portion of the first insulating film is located above an upper end of the conductive body, an end of the control electrode is continuous with the second part and is located on the portion of the first insulating film faces the portion of the first insulating film along the first direction, [[and]] a position of the second part in the first direction is positioned above a position of the end of the control electrode in the first direction, a position of the first part on the first direction is positioned above position of the second part in the first direction, the semiconductor part further includes a third semiconductor layer partially provided on the second semiconductor layer, the third semiconductor layer is of the first conductivity type, and the third semiconductor layer includes a portion facing the first part of the control electrode via the second insulating film, a part of the first part is provided between the first electrode and the third semiconductor layer in the first direction Ina does not expressly disclose the other limitations of claim 1. However, in an analogous art, Kim teaches a first insulating film (111 – Fig. 3 – [0028] – “dielectric liner 111” – this corresponds to a first insulating film); a second insulating film (105d Fig. 3 – [0029] – “A gate dielectric layer 105d” – this corresponds to a second insulating film); a conductive body (105c – Fig. 2 – [0028] – “bottom field plate portion 105c”) the control electrode (105a – Fig. 2 – [0029] – “the gate 105a” – this functions as the control electrode) being apart from the conductive body (105c). Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the first and second insulating films, the conductive body and the control electrode structure as taught by Kim into Ina. An ordinary artisan would have been motivated to use the known technique of Kim in the manner set forth above to produce the predictable result of an insulated conductive body that limits the possibility of unwanted current flow from the electrode being apart from the conductive body. To do so would have merely been to apply a known technique to a known device ready for improvement to yield predictable results, KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 82 USPQ2d 1385 (2007), MPEP 2143 I. D. Ina and Kim do not expressly disclose the other limitations of claim 1. However, in an analogous art, Zeng teaches the control electrode (56 – Fig. 20 – [0077] – “gate 56”) including a first part (Fig. 20 annotated, see below – hereinafter ‘56a’) and a second part (Fig. 20 annotated, see below – hereinafter ‘56b’) linked to the first part (56a), a first part (56a) facing the second semiconductor layer (20 – Fig. 20 – [0074] – “p-well 20”) via a second insulating film (Fig. 20 annotated, see below – hereinafter ‘53’) along the first direction (Fig. 20 annotated, see below – hereinafter ‘X’), the second part (56b) extending along the first direction (X), the second part (56b) facing the second semiconductor layer (20 – Fig. 20 – [0074] – “p-well 20”) via the second insulating film (53) along a second direction (Fig. 20 annotated, see below – hereinafter ‘Y’), the second direction (Y) being orthogonal to the first direction (Fig. 20 annotated, see below, shows this), wherein a portion of the first insulating film (36 – Fig. 20 annotated, see below – [0076] – “oxide 36” – this corresponds to the first insulating film) is located above an upper end of the conductive body (FP Poly – Fig. 20 – [0015] – “doped field plate (FP) polysilicon is deposited to partly fill the trench 30 without any void or gap. After the deposition, the FP poly”), an end of the control electrode (56) is continuous with the second part (56b) and is located on the portion of the first insulating film (36) faces the portion of the first insulating film (36) along the first direction (X), [[and]] a position of the second part (56b) in the first direction (X) is positioned above a position of the end of the control electrode (56) in the first direction (X), a position of the first part (56a) on the first direction (X) is positioned above position of the second part (56b) in the first direction (X), the semiconductor part further includes a third semiconductor layer (16 – Fig. 20 – [0074] – “n+ source region 16”) partially provided on the second semiconductor layer (20), the third semiconductor layer (16) is of the first conductivity type (16 – Fig. 20 – [0074] – “n+ source region 16”), and the third semiconductor layer (16) includes a portion facing the first part of the control electrode (56a) via the second insulating film (53), a part of the first part (56a) is provided between the first electrode (12 – Fig. 20 – [0073] – “electrode 12”) and the third semiconductor layer (16) in the first direction (X – Fig. 20 shows this). PNG media_image1.png 804 510 media_image1.png Greyscale Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to substitute the control electrode and insulating film structure as taught by Zeng into Ina and Kim. An ordinary artisan would have been motivated to use the known technique of Zeng in the manner set forth above to produce the predictable result of [0007] – “low switching losses (low gate capacitance) for switching regular applications, a low on-resistance, and a high source-drain breakdown voltage. The split gate design reduces switching losses, reduces on-resistance, and improves the breakdown voltage.” Regarding claim 3, Ina, as modified by Kim and Zeng, teaches claim 1 from which claim 3 depends. Ina and Kim do not expressly disclose the limitations of claim 3. However, in an analogous art, Zeng teaches (Currently Amended) The device according to claim [[2]] 1, wherein the third semiconductor layer (16) has a first-conductivity-type (16 – Fig. 20 shows this as N++) impurity concentration higher than a first-conductivity-type impurity concentration of the first semiconductor layer (22 – Fig. 20 – [0004] – “n− drift region 22” – Fig. 20 shows this as N region). Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the semiconductor impurity concentration structure as taught by Zeng into Ina and Kim. An ordinary artisan would have been motivated to use the known technique of Zeng in the manner set forth above to produce the predictable result as stated above in claim 1. Regarding claim 4, Ina, as modified by Kim and Zeng, teaches claim 1 from which claim 4 depends. Ina further teaches (Currently Amended) The device according to claim [[2]] 1, wherein the first electrode (141) is electrically connected to the second (114) and third semiconductor layers (116), and the control electrode (142 – Fig. 1) and the conductive body (105c) are electrically insulated from the first electrode (141) by a third insulating film (150 – Fig. 1 – [0023] – “third insulating film 150”). Ina and Zeng do not expressly disclose the limitations of claim 4. However, in an analogous art, Kim teaches the conductive body (105c). Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the conductive body structure as taught by Kim into Ina and Zeng An ordinary artisan would have been motivated to use the known technique of Kim in the manner set forth above to produce the predictable result as stated above in claim 1. Regarding claim 5, Ina, as modified by Kim and Zeng, teaches claim 2 from which claim 5 depends. Ina and Kim do not expressly disclose the limitations of claim 5. However, in an analogous art, Zeng teaches (Currently Amended) The device according to claim [[2]] 1, wherein the second semiconductor layer (20) has a first width in the first direction (X) along the second insulating film (53), and the first width is less than a second distance (Fig. 20 annotated and enlarged, see below – hereinafter ‘13d’) in the first direction (X) from a boundary between the first semiconductor layer (22) and the second semiconductor layer (20) to a boundary between the second insulating film (53) and the third semiconductor layer (16 – Fig. 20 annotated and enlarged, see below, shows this). PNG media_image2.png 386 507 media_image2.png Greyscale Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to substitute the control electrode structure as taught by Zeng into Ina and Kim. An ordinary artisan would have been motivated to use the known technique of Zeng in the manner set forth above to produce the predictable result as stated above in claim 1. Regarding claim 6, Ina, as modified by Kim and Zeng, teaches claim 1 from which claim 6 depends. Ina and Kim do not expressly disclose the limitations of claim 6. However, in an analogous art, Zeng teaches (Currently Amended) The device according to claim [[2]] 1, wherein a distance in the first direction from a boundary between the first semiconductor layer (22) and the second semiconductor layer (20) to the first part of the control electrode (56a) has a minimum at a surface of the second semiconductor layer (20) facing the second part (56b) of the control electrode (56) via the second insulating film (16 – Fig. 20 annotated and enlarged, see above, shows this). Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to substitute the semiconductor thickness structure as taught by Zeng into Ina and Kim. An ordinary artisan would have been motivated to use the known technique of Zeng in the manner set forth above to produce the predictable result as stated above in claim 1. Regarding claim 7, Ina, as modified by Kim and Zeng, teaches claim 1 from which claim 7 depends. Ina and Kim do not expressly disclose the limitations of claim 7. However, in an analogous art, Zeng teaches (Original) The device according to claim 5, wherein the first semiconductor layer (22) includes an extension portion (Fig. 20 annotated and enlarged, see below, shows this – hereinafter ‘22ex’) extending between the control electrode (56) and the second semiconductor layer (20) along the second insulating film (53). PNG media_image2.png 386 507 media_image2.png Greyscale Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to substitute the semiconductor extension structure as taught by Zeng into Ina and Kim. An ordinary artisan would have been motivated to use the known technique of Zeng in the manner set forth above to produce the predictable result as stated above in claim 1. Regarding claim 8, Ina, as modified by Kim and Zeng, teaches claim 5 from which claim 8 depends. Ina further teaches (Currently Amended) The device according to claim 5, wherein [[A]] a first distance from the boundary between the first semiconductor layer (112) and the second semiconductor layer (114) to the first electrode (141) through the third semiconductor layer (116) is defined in the first direction (Fig. 1 – ‘Z’ direction), and a second distance from an end at the second electrode (143) side of the control electrode (142) to the first electrode (141) is defined in the first direction (Z), the first distance being greater than the second distance (Fig. 1 annotated, see below shows this). PNG media_image3.png 536 751 media_image3.png Greyscale Regarding claim 9, Ina, as modified by Kim and Zeng, teaches claim 1 from which claim 9 depends. Ina and Zeng do not expressly disclose the limitations of claim 9. However, in an analogous art, Kim teaches (Original) The device according to claim 1, wherein the conductive body (105c) is provided inside a trench (105 – Fig. 2 – [0028] – “trench gates 105”) having an opening at a surface of the semiconductor part (Fig. 2 annotated, see below – hereinafter ‘10’) at the first electrode side (106 – Fig. 2 – [0034] – “contact strip 106”), and the first insulating film (111) covers an inner surface of the trench (105), and is provided between the conductive body (105c) and the first semiconductor layer (108 – Fig. 2 – [0024] – “layer 108”). PNG media_image4.png 589 709 media_image4.png Greyscale Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the conductive body structure as taught by Kim into Ina and Zeng. An ordinary artisan would have been motivated to use the known technique of Kim in the manner set forth above to produce the predictable result of an insulated conductive body that limits the possibility of unwanted current flow from other components outside the trench. To do so would have merely been to apply a known technique to a known device ready for improvement to yield predictable results, KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 82 USPQ2d 1385 (2007), MPEP 2143 I. D. Regarding claim 10, Ina, as modified by Kim and Zeng, teaches claim 9 from which claim 10 depends. Ina and Zeng do not expressly disclose the limitations of claim 10. However, in an analogous art, Kim teaches (Original) The device according to claim 9, wherein the first part (105a – Fig. 2 annotated, see above – hereinafter ‘Ga’) of the control electrode (105a – Fig. 2) is provided on the surface of the semiconductor part (Fig. 2 annotated, see above– hereinafter ‘10’) with the second insulating film (105d – Fig. 2 – [0029] – “gate dielectric layer 105d” – this is an insulating film) interposed, and the second part 105a – Fig. 2, annotated, see above) of the control electrode (105a) is provided inside the trench (105). Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to substitute the control electrode structure as taught by Kim into Ina and Zeng. An ordinary artisan would have been motivated to use the known technique of Kim in the manner set forth above to produce the predictable result of increasing the cross sectional contact area of the electrode thus reducing the on-resistance. To do so would have merely been to apply a known technique to a known device ready for improvement to yield predictable results, KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 82 USPQ2d 1385 (2007), MPEP 2143 I. D. Regarding claim 11, Ina, as modified by Kim and Zeng, teaches claim 10 from which claim 11 depends. Ina and Zeng do not expressly disclose the limitations of claim 11. However, in an analogous art, Kim teaches (Original) The device according to claim 10, wherein a distance in the first direction from the conductive body (105c) to the second electrode (109 – Fig. 2 – [0032] – “109 which may function as the cathode contact”) is less than a distance in the first direction from the control electrode (105a) to the second electrode (109). Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the distance structure as taught by Kim into Ina and Zeng. An ordinary artisan would have been motivated to use the known technique of Kim in the manner set forth above to produce the predictable result of controlling the parasitic conductance between the two elements. To do so would have merely been to apply a known technique to a known device ready for improvement to yield predictable results, KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 82 USPQ2d 1385 (2007), MPEP 2143 I. D. Regarding claim 12, Ina, as modified by Kim and Zeng, teaches claim 1 from which claim 12 depends. Ina and Kim do not expressly disclose the limitations of claim 12. However, in an analogous art, Zeng teaches (Original) The device according to claim 1, wherein the control electrode (56) further includes a curved portion linking the first (56a) and second parts (Fig. 20 annotated and enlarged, see below, shows this). PNG media_image2.png 386 507 media_image2.png Greyscale Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the semiconductor curved structure as taught by Zeng into Ina and Kim. An ordinary artisan would have been motivated to use the known technique of Zeng in the manner set forth above to produce the predictable result as stated above in claim 1. Regarding claim 14, Ina, as modified by Kim and Zeng, teaches claim 1 from which claim 14 depends. Ina and Kim do not expressly disclose the limitations of claim 14. However, in an analogous art, Zeng teaches (Original) The device according to claim 1, wherein the second part (56b) of the control electrode (56) is provided in the first insulating film (36), and the first part (56a) of the control electrode (56) extends in the second direction over the first insulating film (36), the second part (56b), and the second semiconductor layer (20), the first part (56a) being connected to an upper end of the second part (56b). Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the semiconductor curved structure as taught by Zeng into Ina and Kim. An ordinary artisan would have been motivated to use the known technique of Zeng in the manner set forth above to produce the predictable result as stated above I claim 1. Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Ina in view of Kim, Zeng, and Matsuura et al. (US 6194273 B1 - hereinafter Matsuura). Regarding claim 13, Ina, as modified by Kim and Zeng, teaches claim 12 from which claim 13 depends. Ina, Kim, and Zeng do not expressly disclose the limitations of claim 13. However, in an analogous art, Matsuura teaches (Original) The device according to claim 12, wherein a curvature (Fig. 3 - [4:50-51] – “radius of curvature”) of the curved portion of the control electrode (29 – Fig. 3 – [4:53] – “gate electrode 29” – this functions as a control electrode) is greater than a film thickness in the first direction of the second insulating film (28 – Fig. 3 – [4:51] – “gate oxide film 28” – Fig. 3 shows this). Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the curvature radius of the control electrode as taught by Matsuura into Ina, Kim, and Zeng. An ordinary artisan would have been motivated to use the known technique of Matsuura in the manner set forth above to produce the predictable result of creating a curved surface without damaging the layer on it. To do so would have merely been to apply a known technique to a known device ready for improvement to yield predictable results, KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 82 USPQ2d 1385 (2007), MPEP 2143 I. D. Pertinent Art For the benefits of the Applicant, US 20170263768 A1, US 20030042517 A1, DE 4219854 A1 are cited on the record as being pertinent to significant disclosure through some but not all claimed features of the defined invention. These references fail to disclose the combination of limitations including "the control electrode including a first part and a second part linked to the first part, a first part facing the second semiconductor layer via a second insulating film, the second part facing the second semiconductor layer via the second insulating film along a second direction, the second direction being orthogonal to the first direction". Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to GARY ABEL whose telephone number is (571) 272-0246. The examiner can normally be reached Monday - Friday 8:00 am - 5:00 pm (Eastern). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, CHAD M DICKE can be reached at (571) 270-7996. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and ttps://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /GRA/ Examiner, Art Unit 2897 /CHAD M DICKE/Supervisory Patent Examiner, Art Unit 2897
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Prosecution Timeline

Aug 03, 2022
Application Filed
Apr 10, 2025
Non-Final Rejection — §103
Jul 01, 2025
Examiner Interview Summary
Jul 01, 2025
Applicant Interview (Telephonic)
Jul 10, 2025
Response Filed
Jul 27, 2025
Final Rejection — §103
Nov 04, 2025
Response after Non-Final Action
Nov 06, 2025
Final Rejection — §103
Feb 05, 2026
Request for Continued Examination
Feb 15, 2026
Response after Non-Final Action
Mar 18, 2026
Final Rejection — §103 (current)

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