DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
The Amendment filed 1/29/2026 has been entered. Claims 54-73 remain pending in the application, and claims 1-53 have been canceled. Applicant’s amendments to the Claims have overcome every claim objection and 102 and 103 rejection previously set forth in the Non-Final Office Action mailed 11/7/2025. The new grounds of rejection presented below are necessitated by the amendments. Accordingly, this Office Action is made Final.
Response to Arguments
Applicant’s arguments with respect to independent claim 54 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 54-57 and 72-73 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Spee (US 6841971 B1, published 2005-01-11).
Regarding independent claim 54, Spee teaches a balancing circuitry (Fig. 9: cell balancing circuitry 320) for balancing cells in first and second modules (first, second, third, and fourth batteries, 324a-d) of a battery pack, wherein the first module comprises a first plurality of cells and the second module comprises a second plurality of cells, and wherein the second plurality of cells of the second module (third and fourth batteries 324c-d) is different from the first plurality of cells of the first module(first and second batteries 324a-b), the balancing circuitry comprising:
a first cell balancing circuitry (322a) operative to balance the first plurality of cells of the first module (324a and 324b); and
a second cell balancing circuitry (322b and 322c) operative to balance the second plurality of cells of the second module (324c and 324d),
wherein the second cell balancing circuitry (322b) is further operative to balance at least one cell (324b) of the first plurality of cells of the first module with at least one cell (324c) of the second plurality of cells of the second module (Fig.9 and col 7 ll 56—col 8 ll 5: balancing circuits 322 have overlapping control of balancing cells 324).
Regarding claim 55, Spee teaches the balancing circuitry according to claim 54, wherein the first and second cell balancing circuitry each comprise switched capacitor based cell balancing circuitry (Figs. 9 and 1: each of the balancing circuits 322a, 322b, 322c in Fig. 9 comprises a capacitor 30 in charge balancing system 20 as shown in Fig. 1).
Regarding claim 56, Spee teaches the balancing circuitry according to claim 55, wherein the switched capacitor based cell balancing circuitry comprises:
a switch network (Fig. 1: 40 and 42); and
a capacitor (30),
wherein the switch network is controllable such that:
in a first phase of operation of the switched capacitor based cell balancing circuitry, the capacitor is coupled in parallel with a cell of the first module; and
in a second phase of operation of the switched capacitor based cell balancing circuitry, the capacitor is coupled in parallel with a different cell of the first module or with a cell of the second module.
(Fig. 1 and col 4 ll 61—col 5 ll 6: closing the switches, 40 and 42, alternately couples one battery at a time, 24a or 24b, to the capacitor C1. Each distinct coupling is interpreted as corresponding to a first phase or second phase)
Regarding claim 57, Spee teaches the balancing circuitry according to claim 54, wherein the first and second cell balancing circuitry each comprise switched inductor based cell balancing circuitry (Fig. 1: inductors 32 and 34 in charge balancing system 20).
Regarding independent claim 72, Spee teaches an integrated circuit comprising a switch network (Fig. 9 and col 7 ll 66—col 8 ll 5: isolation circuits 330) for each of the first and second cell balancing circuitry (charge balancing circuits 322a-c) of the balancing circuitry according to claim 54 and, optionally, control circuitry (controller circuit 332) for controlling the switch networks (col 7 ll 66—col 8 ll 5).
Regarding independent claim 73, Spee teaches a host device comprising the balancing circuitry of claim 54, wherein the host device comprises an electric vehicle, an electric bicycle, an electric scooter, a cordless power tool, a computing device, a laptop, notebook or tablet computer, a portable battery powered device, a mobile telephone or an accessory device for such a host device (Col 2 ll 10-16: invention is applied to computers or electric vehicles).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 58 is rejected under 35 U.S.C. 103 as being unpatentable over Spee in view of Van Lammeren (US 20110316344 A1, published 2011-12-29), hereinafter referred to as Lammeren.
Regarding claim 58, Spee teaches the balancing circuitry according to claim 57, wherein the switched inductor based cell balancing circuitry comprises:
a switch network (Fig. 1: 40 and 42); and
an inductor (32 and 34);
Spee does not teach wherein the switch network is controllable such that:
in a first phase of operation of the switched inductor based cell balancing circuitry, the inductor is coupled in parallel with a cell of the first module; and
in a second phase of operation of the switched inductor based cell balancing circuitry, the inductor is coupled in parallel with a different cell of the first module or with a cell of the second module.
Lammeren teaches a switch network (Fig. 6: switches 62) controllable such that:
in a first phase of operation of the switched inductor based cell balancing circuitry, the inductor is coupled in parallel with a cell of the first module; and
in a second phase of operation of the switched inductor based cell balancing circuitry, the inductor is coupled in parallel with a different cell of the first module or with a cell of the second module.
(Fig. 6 and ¶0067: the inductor taking energy from one cell and giving the energy to another cell is interpreted as analogous to a first phase and second phase.)
Spee and Lammeren both teach cell balancing circuits. It would have been obvious to a person with ordinary skill in the art before the effective filing date to incorporate the inductor based system of Lammeren into Spee to improve energy transfer efficiency as compared to using a capacitor (¶0067).
Claims 59-65 and 68-71 are rejected under 35 U.S.C. 103 as being unpatentable over Spee in view of Morita (US 20040246635 A1, published 2004-12-09).
Regarding claim 59, Spee teaches the balancing circuitry according to claim 54, wherein the first and second cell balancing circuitry each comprise:
a switch network (Fig. 1: 40 and 42); and a capacitor (30),
Spee does not teach each balancing circuit comprising a set of capacitors coupled in parallel between the switch network and a common node;
wherein the switch network is controllable such that: during a first phase of operation of the cell balancing circuitry the set of capacitors is coupled to a first portion of the first plurality of cells; and
during a second phase of operation of the cell balancing circuitry the set of capacitors is coupled to a second portion of the first plurality of cells and to a first portion of the second plurality of cells, wherein the first and second portions of the first plurality of cells comprise at least one different cell of the first plurality of cells.
Morita teaches a balancing circuit comprising (Fig. 5: voltage detection circuit 60)
a set of capacitors (67-69) coupled in parallel between the switch network (61-66) and a common node (connecting node N4);
wherein the switch network is controllable such that: during a first phase of operation of the cell balancing circuitry the set of capacitors is coupled to a first portion (B1-B2) of the first plurality of cells (B1-B3) (Fig. 5 has structure capable of performing the balancing process as described in ¶0015 and Fig. 1); and
during a second phase of operation of the cell balancing circuitry the set of capacitors is coupled to a second portion of the first plurality of cells and to a first portion of the second plurality of cells, wherein the first and second portions of the first plurality of cells comprise at least one different cell of the first plurality of cells (B2-B3) (¶0015 and Fig. 1).
Both Spee and Morita teach cell balancing circuits. It would have been obvious to a person with ordinary skill in the art before the effective filing date to incorporate the plurality of capacitors and the common node in the circuit of Morita into the circuit of Spee. Using a plurality of capacitors would enable the balancing of multiple cells at a time. Having a common node would allow normalized cells to be bypassed and achieve direct balancing between an overcharged cell and an undercharged cell.
Balancing between the capacitor and a second portion of the second plurality of cells, and a first portion of the second plurality of cells fits within the scope of Spee.
Regarding claim 60, Spee in view of Morita does not specifically teach the balancing circuitry according to claim 59, wherein the first cell balancing circuitry is coupled to the second cell balancing circuitry by a coupling capacitor that couples the common node of the first cell balancing circuitry to the common node of the second cell balancing circuitry.
However, as Morita has a common node in parallel with the battery cells and capacitors to allow an overcharged cell to more directly transfer energy to an undercharged cell, it would have been obvious to a person with ordinary skill in the art before the effective filing date to incorporate the same principle across the first and second cell balancing circuits of Spee to accommodate over- or undercharged cells across first and second pluralities of cells.
Regarding claim 61, Spee in view of Morita teaches the balancing circuitry according to claim 59.
Spee in view of Morita does not teach wherein the balancing circuitry comprises:
a first coupling capacitor coupled between the common node of the first cell balancing circuitry and a balancer common node; and
a second coupling capacitor coupled between the common node of the second cell balancing circuitry and the balancer common node.
However, Spee and Morita use capacitors for transferring charge between cells. It would have been obvious to a person with ordinary skill in the art before the effective filing date to incorporate an additional capacitor for transferring charge between first and second balancing circuitries, which the examiner interprets as analogous to the process of balancing the cells.
Regarding claim 62, Spee in view of Morita teaches the balancing circuitry according to claim 61, wherein Morita further teaches, in use of the balancer circuitry, the balancer common node is coupled intermittently, periodically or permanently to a reference voltage (Fig. 5: N4 can receive a voltage from any of the capacitors it is connected to. Page 27, lines 5-9 in the specification mention the reference voltage at the common node can be zero volts).
Regarding claim 63, Spee in view of Morita teaches the balancing circuitry according to claim 59, wherein Morita teaches each of the first and second plurality of cells comprise N cells, wherein N is at least 3 (Fig. 1: three cells B1-B3).
Regarding claim 64, Spee in view of Morita teaches the balancing circuitry according to claim 63, wherein:
the set of capacitors comprises N capacitors and the switch network comprises a single tier of switching modules (61, 62, 63, 64, 65, 66); or
the set of capacitors comprises N−2 capacitors and the switch network comprises first and second tiers of switching modules (alternative claim language used).
Regarding claim 65, Spee in view of Morita teaches the balancing circuitry according to claim 64, wherein Spee teaches the balancing circuitry comprises one capacitor and one switching module per cell of the battery pack (Figs. 1 and 9: each balancing circuit has capacitor 30).
Regarding claim 68, Spee in view of Morita teaches the balancing circuitry according to claim 59, wherein Morita further teaches the common node is couplable to a reference voltage (Fig. 5: N4 can receive a voltage from any of the capacitors it is connected to. Page 27, lines 5-9 in the specification mention the reference voltage at the common node can be zero volts).
Regarding claim 69, Spee in view of Morita teaches the balancing circuitry according to claim 68, wherein the common node is coupled to the reference voltage during a third phase of operation of the balancing circuitry, wherein:
the third phase of operation immediately follows the first phase or the second phase of operation (Fig. 5: The examiner interprets the claim language of third phase as any time the common node N4 receives a voltage from one of the capacitors 67-69, which includes between first and second phases); or
the third phase of operation follows a plurality of cycles of the first and second phases of operation; or the third phase of operation occurs during the first or second phase of operation; or the third phase of operation coincides with the first or second phase of operation so as to occupy the same amount of time as the first or second phase of operation; or the third phase of operation occupies a portion of the period of time occupied by the first or second phase of operation; or the third phase of operation occurs during a beginning portion, a middle portion or an end portion of the first or second phase (alternative claim language used).
Regarding claim 70, Spee in view of Morita teaches the balancing circuitry according to claim 59, wherein Morita teaches the switch network is operable to connect two or more of the set of capacitors in parallel (Fig 5).
Regarding claim 71, Spee in view of Morita teaches the balancing circuitry according to claim 59, further comprising control circuitry for controlling the switch network (Fig .9 and Col 7 ll 66—col 8 ll 5: controller circuit 332).
Claims 66-67 are rejected under 35 U.S.C. 103 as being unpatentable over Spee in view of Morita, and further in view of De Vries (US 20140139184 A1, published 2014-05-22), hereinafter referred to as Vries.
Regarding claim 66, Spee in view of Morita teaches the balancing circuitry according to claim 64.
the first tier of switching modules comprises one switching module per cell of the battery pack (Spee – Fig. 1 ; Morita – Fig. 5);
Spee in view of Morita does not teach the balancing circuitry wherein,
the second tier of switching modules comprises one switching module for every two switching modules of the first tier of switching modules; and
the set of capacitors comprises one capacitor for every switching module of the second tier of switching modules.
Vries discloses a balancing circuitry wherein
the second tier of switching modules comprises one switching module for every two switching modules of the first tier of switching modules (Fig. 4 has two tiers of switches S1-Sn and S2-Sn. The examiner interprets a first tier switching module as having one switch S1-high or S1-low.); and
the set of capacitors comprises one capacitor for every switching module of the second tier of switching modules (Each pair of high and low switches is coupled to respective capacitors C1-cell-1 to C1-cell-n and C2-cell-1 to C2-cell-n).
Spee, Morita, and Vries all disclose circuits for battery balancing. It would have been obvious to a person with ordinary skill in the art before the effective filing date to incorporate the arrangement of switches and capacitors of the circuit in Vries into the circuit of Spee, modified by Morita, to manage current to flow more directly from a cell with higher charge level to a cell with a lower charge level (¶0023).
Regarding claim 67, Spee in view of Morita teaches the balancing circuitry according to claim 64.
Spee in view of Morita does not teach wherein each switching module comprises a high-side switch and a low-side switch connected in series between first and second input nodes, wherein an output node of the switching module is coupled to a node between the high-side switch and the low-side switch.
Vries teaches a balancing circuitry wherein each switching module comprises a high-side switch (Fig. 4: S1-high-n) and a low-side switch (S1-low-n) connected in series between first and second input nodes, wherein an output node of the switching module is coupled to a node between the high-side switch and the low-side switch (Fig. 4: output node leads to C1-cell-n).
Spee, Morita, and Vries all disclose circuits for battery balancing. It would have been obvious to a person with ordinary skill in the art before the effective filing date to incorporate the arrangement of switches and capacitors of the circuit in Vries into the circuit of Spee, modified by Morita, to manage current flow from a cell, specifically with the ability to control which terminal from the battery is connected so as to include or isolate batteries from the balancing process (¶0023).
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Ryu-Sung Peter Weinmann whose telephone number is (703)756-5964. The examiner can normally be reached Monday-Friday 9am-5pm ET.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Julian Huffman, can be reached at (571) 272-2147. The fax phone number for the organization where this application or proceeding is assigned is (571) 273-8300.
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/Ryu-Sung P. Weinmann/Examiner, Art Unit 2859 April 20, 2026
/JULIAN D HUFFMAN/Supervisory Patent Examiner, Art Unit 2859
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