Prosecution Insights
Last updated: April 19, 2026
Application No. 17/883,718

METHODS AND TOOLS FOR PREVENTING THE COUNTERFEITING AND TAMPERING OF SEMICONDUCTOR DEVICES

Non-Final OA §102
Filed
Aug 09, 2022
Examiner
SWEARINGEN, JEFFREY R
Art Unit
2445
Tech Center
2400 — Computer Networks
Assignee
Intel Corporation
OA Round
1 (Non-Final)
76%
Grant Probability
Favorable
1-2
OA Rounds
3y 3m
To Grant
98%
With Interview

Examiner Intelligence

Grants 76% — above average
76%
Career Allow Rate
514 granted / 676 resolved
+18.0% vs TC avg
Strong +22% interview lift
Without
With
+22.4%
Interview Lift
resolved cases with interview
Typical timeline
3y 3m
Avg Prosecution
22 currently pending
Career history
698
Total Applications
across all art units

Statute-Specific Performance

§101
12.2%
-27.8% vs TC avg
§103
45.8%
+5.8% vs TC avg
§102
18.4%
-21.6% vs TC avg
§112
15.3%
-24.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 676 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Claims 1-8 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 12 January 2026. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 9-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Sardesai et al. (US 11,558,531). 9. A method comprising: conducting a first inspection of a device using an inspection protocol at a first site; Sardesai column 2 lines 33-51 generating data from the first inspection of the device; and Sardesai column 2 lines 33-51 converting the data from the first inspection to a first set of secure values, wherein the device is delivered to a second site and the first set of secure values is used for authenticating the device. Sardesai column 2 lines 52-63 10. The method of claim 9, further comprising: conducting a second inspection of the device using the inspection protocol at a second site; Sardesai column 7 lines 1-9 generating data from the second inspection of the device; Sardesai column 7 lines 1-9 converting the data from the second inspection to a second set of secure values; and Sardesai column 7 lines 10-17 comparing the first set of secure values with the second set of secure values, wherein the comparing of the first set of secure values with the second set of secure values shows a substantial overlapping of the first and second sets of secure values when the device is authentic and untampered. Sardesai column 7 lines 14-17, lines 32-50 11. The method of claim 9, wherein the first and second inspections are conducted using one or more inspection tools that are copy exact. Image authentication device 104 is common to both inspections and is therefore “copy exact”. Sardesai Figure 1D 12. The method of claim 9, wherein the first inspection is conducted by a manufacturer of the device and the second inspection is conducted by one or more entities obtaining possession or control of the device. Sardesai Figure 1B, Figure 1D 13. The method of claim 11, wherein the first and second inspections comprise generating one or more images of selected physical features of the device using the inspection tools. Sardesai column 2 lines 33-51, column 7 lines 1-9 14. The method of claim 11, wherein the inspection tools comprise an x-ray imaging unit and/or an optical imaging unit. Sardesai column 2 lines 33-38, column 7 line 8 15. The method of claim 12, wherein the comparing the first set of secure values with the second set of secure values is conducted by the one or more entities obtaining possession or control of the device. Sardesai, Figure 1D, image authentication device 104 16. The method of claim 12, wherein the converting the data from the first and second inspections to the respective first and second sets of secure values comprises a first step of pre- processing the one or more images from the first and second inspections, respectively, and a second step of generating the first and second sets of secure values, respectively, using a hashing algorithm. Sardesai, column 4 lines 38-54, column 7 lines 10-17 17. An authentication system comprising: a first inspection tool, wherein the first inspection tool generates first images for a first inspection of a device; and Sardesai column 2 lines 33-51 a first processor for processing the first images using a hashing algorithm, wherein the first inspection tool and the first processor are sited at a first location; and Sardesai column 7 lines 10-17 a second inspection tool, wherein the second inspection tool generates second images for a second inspection of the device; and Sardesai column 7 lines 1-9 a second processor for processing the second images using the hashing algorithm, wherein the second inspection tool and the second processor are sited at a second location. Sardesai column 7 lines 10-17 18. The authentication system of claim 17, wherein the first inspection tools and second inspection tools are made copy exact using information provided by a manufacturer of the device. Image authentication device 104 is common to both inspections and is therefore “copy exact”. Sardesai Figure 1D 19. The authentication system of claim 17, wherein the processing of the first images using the hashing algorithm generates a first set of hash values and the processing of the second images using the hashing algorithm generates a second set of hash values, wherein the hashing algorithm is executed with parameters provided by the device's manufacturer. Sardesai, column 4 lines 38-54, column 7 lines 10-17 20. The authentication system of claim 19, further comprises the second processor comparing the first and second sets of hash values to authenticate the device as being authentic and untampered. Sardesai column 7 lines 14-17, lines 32-50 Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Devadas et al. US 2003/0204743 Dyne et al. US 12,321,950 Franklin et al. US 2023/0283458 U. Guin, K. Huang, D. DiMase, J. M. Carulli, M. Tehranipoor and Y. Makris, "Counterfeit Integrated Circuits: A Rising Threat in the Global Semiconductor Supply Chain," in Proceedings of the IEEE, vol. 102, no. 8, pp. 1207-1228, Aug. 2014. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Jeffrey R. Swearingen whose telephone number is (571)272-3921. The examiner can normally be reached M-F 8:00 am - 5:00 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Oscar Louie can be reached at 571-270-1684. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. Jeffrey R. Swearingen Primary Examiner Art Unit 2445 /Jeffrey R Swearingen/Primary Examiner, Art Unit 2445
Read full office action

Prosecution Timeline

Aug 09, 2022
Application Filed
Sep 22, 2022
Response after Non-Final Action
Feb 27, 2026
Non-Final Rejection — §102 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
76%
Grant Probability
98%
With Interview (+22.4%)
3y 3m
Median Time to Grant
Low
PTA Risk
Based on 676 resolved cases by this examiner. Grant probability derived from career allow rate.

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