DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant's arguments filed 5/26/2026 have been fully considered but they are not persuasive.
Applicant’s remarks pages 6-7 assert that the new limitations “the first insulating layer is configured to prevent a short circuit between the first substrate and components disposed above the first insulating layer” and “a pixel unit disposed directly on the first insulating layer and comprising a plurality of light emitting elements disposed in the plurality of sub-pixels” added to independent claim 1 (and similar limitations added to independent claim 9) are not taught or obviously suggested by prior art documents US 20180166520 A1 (Kang et al) or US 20010015256 A1 (Yamazaki et al) due to Kang’s conductive layer 114 being part of a separately fabricated set of layers 110, therefore allegedly not satisfying the limitations pertaining to having the first insulating layer prevent a short circuit between the first substrate and components disposed above the first insulating layer, citing Kang ¶ [0086, 0087, 0091]. A comparable analysis is made regarding Yamazaki ¶ [0024, 0025, 0046-0048].
The Examiner does not find these arguments persuasive because as the claims are currently written, in the context of the Kang reference, conductive layer 114 may still serve as the conductive first substrate, and adhesive layer 113 may still serve as the first insulating layer, because the insulating properties of layer 113 will protect any overlying components (e.g. the LED structure 140 or transistor 130 of Kang FIG. 2) above conductive layer 114 from shorting with it, in line with the claimed limitations. The method by which the layers of Kang are fabricated or assembled is not relevant to the properties of the final structure in the context of the claim when their final structure can perform the claimed functions.
Additionally, further search and consideration of the present application in view of the limitations of new claim 17 have found that US patent publications US 20220059806 A1 (Ko et al hereinafter Ko) and US 20180217117 A1 (Tran) are also pertinent prior art documents for consideration of patentability. Applicant’s amendment adding new claim 17 necessitated new grounds of rejection to be made for the new claim.
Claim Objections
Claim 9 is objected to because of the following informalities: in line 10 of the claim, the phrase “configured to prevent electrical an electrical short circuit” is recited. This has redundant and improper grammar, and should be amended to read as “configured to prevent an electrical short circuit” or something to similar effect. Appropriate correction is required.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim 1 is rejected under 35 U.S.C. 103 as being unpatentable over US patent publications US 20180166520 A1 (Kang et al hereinafter Kang) in view of US 20010015256 A1 (Yamazaki et al hereinafter Yamazaki).
Kang discloses a display device (display device 100, FIGS. 1-2, ¶ [0036-0037]), comprising: a first substrate (FIG. 2, complex blocking layer 114, which is part of protective substrate 110 ¶ [0087-0093]) comprising a display area (FIG. 2, portions of the substrate overlapping the pixel structures constitute an active display area, ¶ [0055]) where a plurality of sub-pixels are disposed (FIG. 2, while only one pixel structure is illustrated, Kang teaches that a plurality of pixels and sub-pixels is present ¶ [0055, 0080]) and a non-display area (FIG. 2, portions of the substrate non-overlapping the pixel structures constitute a non-display area, ¶ [0055]), wherein:
the first substrate has an upper surface (FIG. 2, complex blocking layer 114 has an upper surface), and the first substrate forms a single-continuous layer made of one of transparent conducting oxide and oxide semiconductor (complex blocking layer 114 may be a transparent conductive oxide ¶ [0092]); a first insulating layer (FIG. 2, adhesive 113 being an insulating layer disposed directly on the upper surface of layer 114 ¶ [0087, 0090]) disposed directly on the upper surface of the first substrate, wherein the first substrate is conductive (complex blocking layer 114 as a transparent conductive oxide is conductive ¶ [0092]) and the first insulating layer is configured to prevent a short circuit between the first substrate and components disposed above the first insulating layer (by virtue of being on top of complex blocking layer 114, adhesive 113 contributes to the prevention of a short circuit between layer 114 and components disposed above it such as diodes 140); a pixel unit (FIG. 2, organic light emitting substrate 120, which includes substrate 121 as a sub-layer, is directly on adhesive 113, and may be considered a pixel unit as it includes pixel structures ¶ [0053-0055]) disposed directly on the first insulating layer and comprising a plurality of light emitting elements (FIG. 2, organic light emitting diodes 140 in sub-pixels ¶ [0054]) disposed in the plurality of sub-pixels.
Kang does not disclose that the first insulating layer is composed of an inorganic material (an acrylic based adhesive is suggested as a material ¶ [0090]).
However, Yamazaki discloses a display device (the device of FIG. 2C ¶ [0015]) wherein a first insulating layer (FIG. 2C, second adhesive 131 ¶ [0048]) is composed of an inorganic material (second adhesive may be formed of an inorganic material ¶ [0048]) and disposed directly on an upper surface of a first substrate (FIG. 2C, plastic film 132 is a plastic substrate ¶ [0048]). Yamazaki also teaches that the inorganic material of the adhesive layer is interchangeable with an acrylic based adhesive (¶ [0048]).
Kang and Yamazaki both pertain to the field of display devices, placing them in the same field of endeavor as the claimed invention. Therefore, a person of ordinary skill in the art before the effective filing date of the claimed invention would have found it obvious to modify the device of Kang in view of Yamazaki such that the first insulating layer is composed of an inorganic material, because Yamazaki has demonstrated that such a material is interchangeable with the material taught by Kang, and such a modification may be done in consideration of materials costs and changing market conditions.
Claims 3 and 5 are rejected under 35 U.S.C. 103 as being unpatentable over Kang in view of Yamazaki as applied to claim 1 above, and further in view of US patent publication US 20190081090 A1 (Lee et al hereinafter Lee).
Regarding claim 3, Kang in view of Yamazaki discloses the limitations of claim 1 as detailed above, but does not further disclose a second substrate disposed between the first insulating layer and the plurality of light emitting elements and made of one of the transparent conducting oxide and the oxide semiconductor; and a second insulating layer disposed between the second substrate and the plurality of light emitting elements.
However, Lee discloses a display device (the display device of FIG. 3-4 ¶ [0030-0031]) comprising a second substrate (FIG. 4, shielding layer 143 ¶ [0117]) disposed between a first insulating layer (FIG. 4, first inorganic barrier layer 131 is a first insulating layer ¶ [0106-0109]) and a plurality of light emitting elements (FIG. 4, pixels include OLEDs 300 ¶ [0018, 0079]) and made of one of the transparent conducting oxide and the oxide semiconductor (shielding layer 143 may be transparent conductive oxide ¶ [0117]); and a second insulating layer (FIG. 4, second inorganic barrier layer 132 is a second insulating layer ¶ [0106-0109]) disposed between the second substrate and the plurality of light emitting elements (FIG. 4, barrier layer 132 is between shielding layer 143 and OLED 300). Lee also teaches that the shielding layers of their disclosure both shield the device against damage from electrostatic discharges (ESD) as well as improve the adhesiveness between neighboring layers (¶ [0116-0117]).
Kang, Yamazaki, and Lee pertain to the field of display devices, placing them in the same field of endeavor as the claimed invention. Therefore, a person of ordinary skill in the art before the effective filing date of the claimed invention would have found it obvious to modify the device of Kang in view of Yamazaki further in view of Lee to comprise a second substrate disposed between the first insulating layer and the plurality of light emitting elements and made of one of the transparent conducting oxide and the oxide semiconductor; and a second insulating layer disposed between the second substrate and the plurality of light emitting elements, in order to provide the second substrate as a shielding layer which protects the device against ESD and improves the adhesiveness between neighboring layers as taught by Lee.
Regarding claim 5, Kang in view of Yamazaki and Lee discloses the limitations of claim 3 as detailed above, and they further disclose that a plurality of second substrates is disposed to correspond to the plurality of sub-pixels (in Lee, the view of the device shown in FIG. 4 is one cross-section of one sub-pixel; the other sub-pixels in the device likewise comprise corresponding shielding layers 143 ¶ [0054, 0110, 0116-0117]).
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Kang in view of Yamazaki and Lee as applied to claim 5 above, and further in view of US patent publication US 20180006274 A1 (Kim et al hereinafter Kim 2).
Kang in view of Yamazaki and Lee discloses the limitations of claim 5 as detailed above, and further discloses a plurality of transistors (Kang FIG. 2, driving element 130 in each sub-pixel is a transistor ¶ [0054]; Lee FIG. 2 demonstrates that a plurality of transistors may be present in each sub-pixel), but does not further disclose that each of the plurality of sub-pixels includes: one or more light shielding layers disposed on the second substrate; and the plurality of transistors is disposed overlapping with the light shielding layers, wherein the light shielding layer is electrically connected to the second substrate corresponding to each of the plurality of sub-pixels.
However, Kim 2 discloses a device comprising a plurality of sub-pixels (the device of FIG. 18 includes a plurality of sub-pixels ¶ [0146]) which include a light shielding layer (FIG. 18, conductive layer 225a which is part of light shielding layer 225 ¶ [0150, 0172-0173]) disposed on a second substrate (FIG. 18, light blocking layer 225b is a second substrate formed of a transparent conductive oxide material ¶ [0173]); and a plurality of transistors (FIG. 18, gate electrode 221, and source/drain electrodes 222 and 223 form a transistor in each sub-pixel ¶ [0150]) disposed overlapping with the light shielding layers (FIG. 18, the transistors overlap the light shielding layers 225a in a direction perpendicular to the lower substrate), wherein the light shielding layer is electrically connected to the second substrate corresponding to each of the plurality of sub-pixels (FIG. 18, conductive layer 225a and light blocking layer 225b are electrically connected to each other ¶ [0173]). Kim 2 also teaches that their configuration of light shielding layers 225a and 225b causes destructive interference to occur between light reflected on different interfaces, to prevent visibility from being deteriorated due to external light (¶ [0173]).
Kang, Yamazaki, Lee, and Kim 2 all pertain to the field of display devices, placing them in the same field of endeavor as the claimed invention. Therefore, a person of ordinary skill in the art before the effective filing date of the claimed invention would have found it obvious to modify the device of Kang in view of Yamazaki and Lee further in view of Kim 2 such that each of the plurality of sub-pixels includes: one or more light shielding layers disposed on the second substrate; and the plurality of transistors is disposed overlapping with the light shielding layers, wherein the light shielding layer is electrically connected to the second substrate corresponding to each of the plurality of sub-pixels, in order to cause destructive interference to occur between light reflected on different interfaces, to prevent visibility from being deteriorated due to external light as taught by Kim 2.
Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Kang in view of Yamazaki as applied to claim 1 above, and further in view of US patent publication US 20200111978 A1 (Kim et al hereinafter Kim).
Kang in view of Yamazaki discloses the limitations of claim 1 as detailed above but does not further disclose a polarizing plate attached to the first substrate.
However, Kim discloses a display device (display device 1000 FIGS. 1A-1B ¶ [0067-0070]) wherein a polarizing plate (a non-pictured polarizing plate disposed under lower substrate 110 ¶ [0070]) is attached to a first substrate (FIG. 1B, lower substrate 110 ¶ [0070]) wherein the first substrate includes a display area where a plurality of sub-pixels are disposed (FIG. 1B, active area A/A overlapping lower substrate 110 includes a plurality of sub-pixels). Kim also teaches that the polarizing plate polarizes light traveling into the display device “so the external light reflection of the stretchable display device 1000 may be reduced”.
Kang, Yamazaki, and Kim both pertain to the field of display devices, placing them in the same field of endeavor as the claimed invention. Therefore, a person of ordinary skill in the art before the effective filing date of the claimed invention would have found it obvious to modify the device of Kang in view of Yamazaki further in view of Kim such that a polarizing plate is attached to the first substrate, in order to reduce the external light reflection of the display device.
Claims 9, 11, and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Kang in view of Yamazaki, and Kim.
Regarding claim 9, Kang discloses a display device (display device 100, FIGS. 1-2, ¶ [0036-0037]), comprising: a first transparent thin film layer (FIG. 2, complex blocking layer 114, which is part of protective substrate 110 ¶ [0087-0093]) including a display area (FIG. 2, portions of the substrate overlapping the pixel structures constitute an active area, ¶ [0055]) and a non-display area (FIG. 2, portions of the substrate non-overlapping the pixel structures constitute a non-display area, ¶ [0055]) wherein: the first transparent thin film layer has an upper surface (FIG. 2, complex blocking layer 114 has an upper surface), and the first transparent thin film layer is a single, continuous layer (FIG. 2, complex blocking layer 114, which is part of protective substrate 110, is a single continuous layer disposed as a substrate in the device ¶ [0096]) made of one of a transparent conducting oxide and oxide semiconductor (complex blocking layer 114 may be a transparent conductive oxide ¶ [0092]); a first insulating layer (FIG. 2, adhesive 113 being an insulating layer disposed directly on the upper surface of layer 114 ¶ [0087, 0090]) disposed directly on the upper surface of the first transparent thin film layer (FIG. 2, adhesive 113 is directly on the upper surface of complex blocking layer 114), wherein the first insulating layer is configured to prevent electrical an electrical short circuit between the first transparent thin film layer and components disposed above the first insulating layer (by virtue of being on top of complex blocking layer 114, adhesive 113 contributes to the prevention of a short circuit between layer 114 and components disposed above it such as diodes 140), and a pixel unit (FIG. 2 illustrates a sub-pixel of a pixel unit ¶ [0055, 0080], which may be formed of organic light emitting substrate 120, which includes substrate 121 as a sub-layer and is directly on adhesive 113, as organic light emitting substrate 120 includes pixel structures ¶ [0053-0055]) disposed in the display area and including a plurality of sub-pixels (while only one sub-pixel structure is illustrated in FIG. 2, it is explained that each pixel comprises a plurality of sub-pixels to separately emit red, green, and blue light ¶ [0080]), wherein the pixel unit is disposed directly on the first insulating layer (FIG. 2, organic light emitting substrate 120 is directly on adhesive 113).
Kang does not further disclose that the first insulating layer is composed of an inorganic material (an acrylic based adhesive is suggested as a material ¶ [0090]), or a polarizing plate disposed under the first transparent thin film layer.
However, Yamazaki discloses a display device (the device of FIG. 2C ¶ [0015]) wherein a first insulating layer (FIG. 2C, second adhesive 131 ¶ [0048]) is composed of an inorganic material (second adhesive may be formed of an inorganic material ¶ [0048]) and disposed directly on an upper surface of a first substrate (FIG. 2C, plastic film 132 is a plastic substrate ¶ [0048]). Yamazaki also teaches that the inorganic material of the adhesive layer is interchangeable with an acrylic based adhesive (¶ [0048]).
Kang and Yamazaki both pertain to the field of display devices. Therefore, a person of ordinary skill in the art before the effective filing date of the claimed invention would have found it obvious to modify the device of Kang in view of Yamazaki such that the first insulating layer is composed of an inorganic material, because Yamazaki has demonstrated that such a material is interchangeable with the material taught by Kang, and such a modification may be done in consideration of materials costs and changing market conditions.
Further, Kim discloses a display device (display device 1000 FIGS. 1A-1B ¶ [0067-0070]) wherein a polarizing plate (a non-pictured polarizing plate disposed under lower substrate 110 ¶ [0070]) is disposed under a first transparent thin film layer (FIG. 1B, lower substrate 110 ¶ [0070], which may be formed of transparent materials such as silicon rubber and epoxy resin ¶ [0071, 0076-0077]) wherein the first transparent thin film layer includes a display area where a plurality of sub-pixels are disposed (FIG. 1B, active area A/A overlapping lower substrate 110 includes a plurality of sub-pixels). Kim also teaches that the polarizing plate polarizes light traveling into the display device “so the external light reflection of the stretchable display device 1000 may be reduced”.
Kang, Yamazaki, and Kim all pertain to the field of display devices, placing them in the same field of endeavor as the claimed invention. Therefore, a person of ordinary skill in the art before the effective filing date of the claimed invention would have found it obvious to modify the device of Kang in view of Yamazaki further in view of Kim such that a polarizing plate is disposed under the first transparent thin film layer, in order to reduce the external light reflection of the display device.
Regarding claim 11, Kang in view of Yamazaki and Kim discloses the limitations of claim 9 as detailed above. Further, the display device of Lee discloses one or more second transparent thin film layers (FIG. 4, shielding layer 143 ¶ [0117]) made of one of the transparent conducting oxide and the oxide semiconductor (shielding layer 143 may be transparent conductive oxide ¶ [0117]) and disposed between a first insulating layer (FIG. 4, first inorganic barrier layer 131 is a first insulating layer ¶ [0106-0109]) and a pixel unit (FIG. 4, pixels include OLEDs 300 ¶ [0018, 0079]); and a second insulating layer (FIG. 4, second inorganic barrier layer 132 is a second insulating layer ¶ [0106-0109]) disposed between the second transparent thin film layers and the pixel unit (FIG. 4, barrier layer 132 is between shielding layer 143 and OLED 300). Lee also teaches that the shielding layers of their disclosure both shield the device against damage from electrostatic discharges (ESD) as well as improve the adhesiveness between neighboring layers (¶ [0116-0117]).
Therefore, a person of ordinary skill in the art before the effective filing date of the claimed invention would have found it obvious to modify the device of Kang in view of Yamazaki, Kim, and Lee further in view of Lee to include one or more second transparent thin film layers made of one of the transparent conducting oxide and the oxide semiconductor and disposed between the first insulating layer and the pixel unit; and a second insulating layer disposed between the second transparent thin film layers and the pixel unit, in order to provide the second substrate as a shielding layer which protects the device against ESD and improves the adhesiveness between neighboring layers as taught by Lee.
Regarding claim 13, Kang in view of Yamazaki and Kim discloses the limitations of claim 11 as detailed above, and they further disclose that the second transparent thin film layers are divided into a plurality of second transparent thin film layers in the display area (in Lee, the view of the device shown in FIG. 4 is one cross-section of one sub-pixel; the other sub-pixels in the device likewise comprise corresponding shielding layers 143 ¶ [0054, 0110, 0116-0117]), and wherein the plurality of second transparent thin film layers overlap with the plurality of sub-pixels (Lee FIG. 4, OLED 300 is overlapped along the Z-direction by shielding layers 143).
Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Kang in view of Yamazaki and Kim as applied to claim 13 above, and further in view of Kim 2.
Kang in view of Yamazaki and Kim disclose the limitations of claim 13 as detailed above, and they further disclose that each of the plurality of sub-pixels includes: a plurality of transistors (Kang FIG. 2, driving element 130 in each sub-pixel is a transistor ¶ [0054]; Lee FIG. 2 demonstrates that a plurality of transistors may be present in each sub-pixel) disposed on the second insulating layer (Lee FIG. 4, second inorganic barrier layer 132 being the second insulating layer is below the transistors T1, T2 ¶ [0057]). They do not further disclose a light shielding layer disposed between the plurality of transistors and the second insulating layer and overlapping with at least one of the plurality of transistors, and wherein the light shielding layers in the plurality of sub-pixels are electrically connected to the plurality of second transparent thin film layers.
However, Kim 2 discloses a device comprising a plurality of sub-pixels (the device of FIG. 18 includes a plurality of sub-pixels ¶ [0146]) which include a light shielding layer (FIG. 18, conductive layer 225a which is part of light shielding layer 225 ¶ [0150, 0172-0173]) disposed between a plurality of transistors (FIG. 18, gate electrode 221, and source/drain electrodes 222 and 223 form a transistor in each sub-pixel ¶ [0150]; Kim 2 FIG. 4 indicates that multiple transistors are present in each sub-pixel) and a second insulating layer (FIG. 18, layer 225a is between a lower portion of buffer layer 215a, understood to represent the second insulating layer, and the transistors when viewed from a non-vertical angle) and overlapping with at least one of the plurality of transistors (FIG. 18, layer 225a overlaps the transistor), and wherein the light shielding layers in the plurality of sub-pixels are electrically connected to the plurality of second transparent thin film layers (FIG. 18, conductive layer 225a and light blocking layer 225b are electrically connected to each other ¶ [0173]; light blocking layer 225b is formed of transparent conductive oxide material and thus considered a second transparent thin film layer). Kim 2 also teaches that their configuration of light shielding layers 225a and 225b causes destructive interference to occur between light reflected on different interfaces, to prevent visibility from being deteriorated due to external light (¶ [0173]).
Kang, Yamazaki, Kim, and Kim 2 all pertain to the field of display devices, placing them in the same field of endeavor as the claimed invention. Therefore, a person of ordinary skill in the art before the effective filing date of the claimed invention would have found it obvious to modify the device of Kang in view of Yamazaki, Kim, and Lee further in view of Kim 2 such that a light shielding layer is disposed between the plurality of transistors and the second insulating layer and overlapping with at least one of the plurality of transistors, and wherein the light shielding layers in the plurality of sub-pixels are electrically connected to the plurality of second transparent thin film layers, in order to cause destructive interference to occur between light reflected on different interfaces, to prevent visibility from being deteriorated due to external light as taught by Kim 2.
Claims 1 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over US patent publications US 20220059806 A1 (Ko et al hereinafter Ko) in view of US 20180217117 A1 (Tran).
Regarding claim 1, Ko discloses a display device (electronic device DD, which includes display panel DP ¶ [0094-0095, 0102]), comprising: a first substrate (FIG. 17, base layer BL ¶ [0155]) comprising a display area (FIG. 12, display region AA ¶ [0100]) where a plurality of sub-pixels (FIGS. 15-17, pixel units AR1’ are in display region AA, specifically the BB’ sub-region ¶ [0180-0182]) are disposed and a non-display area (FIG. 12, non-display peripheral region NAA ¶ [0100]), wherein: the first substrate has an upper surface (FIG. 17, upper-facing surface of base layer BL), and the first substrate forms a single, continuous layer (FIG. 17, base layer BL is a single continuous layer ¶ [0155]) made of a conductive material (base layer BL can be a metal substrate ¶ [0155]); a first insulating layer (FIG. 17, first buffer layer BFL1 ¶ [0200]) composed of an inorganic material (inorganic insulating materials are listed for first buffer layer BFL1 ¶ [0200], and FIG. 17 illustrates that buffer BFL1 is directly on upper surface of base layer BL) and disposed directly on the upper surface of the first substrate, wherein the first substrate is conductive (BL may be a metal substrate ¶ [0155]) and the first insulating layer is configured to prevent a short circuit between the first substrate and components disposed above the first insulating layer (FIG. 17, by virtue of its position BFL1 prevents metal BL from short circuiting any of the overlying components e.g. transistor TR or light emitting element ED ¶ [0157, 0165]); and a pixel unit (FIG. 17, layers directly atop first buffer layer BFL1 and those above form a pixel unit) disposed directly on the first insulating layer and comprising a plurality of light emitting elements (FIG. 17, light emitting elements ED are included in sub-pixel regions AR1’ ¶ [0173]) disposed in the plurality of sub-pixels.
Ko did not explicitly state that the first substrate is made of one of a transparent conducting oxide and oxide semiconductor.
However, Tran discloses a display device (a nano display device ¶ [0137]), and further discusses that ITO, a transparent conducting oxide, is interchangeable with other metal substrate materials such as gold (¶ [0047, 0136]).
Ko and Tran both pertain to the field of display devices, placing them in the same field of endeavor as the claimed invention. Therefore, a person of ordinary skill in the art before the effective filing date of the claimed invention would have found it obvious to modify the device of Ko in view of Tran such that the metal substrate of Ko is formed of ITO, a transparent conducting oxide, in order to provide a metal substrate material which may prove beneficial in consideration of materials costs and changing market conditions.
Regarding claim 17, Ko in view of Tran discloses the limitations of claim 1 as detailed above, and Ko further discloses that the first substrate is a bottommost layer of the display device above any polarizing plate disposed under the first substrate (Ko FIG. 17, aside from polarizing plate PM, base layer BL is the lowest layer in the device ¶ [0133]); and no intermediate layer is disposed between the first substrate and the first insulating layer (FIG. 17, base layer BL and first buffer layer BFL1 directly contact each other with no intervening layers separating them).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/E.R.C./Examiner, Art Unit 2813
/STEVEN B GAUTHIER/Supervisory Patent Examiner, Art Unit 2813
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