Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-5, 7-8, 10-17 are rejected under 35 U.S.C. 102 as being unpatentable in view of Chen et al. (TW I654726 B).
Regarding claim 1, Chen et al. disclose a substrate (400, FIG. 29) for a semiconductor device assembly (500) comprising:
A core layer (based on package substrate 400, insulating core) having an outer surface (dummy connectors 316);
A metallization layer (302) formed on the outer surface (interconnect structure 320), the metallization layer including at least one bond pad (bonding pad 303, 304) and a trace (303, FIG. 29) electrically coupled to the bond pad,
A solder mask (318) formed over the metallization layer and the outer surface, wherein the solder mask includes:
A first opening (opening 320) exposing the bond pad and immediately surrounded by a bonding region of the solder mask;
One or more second opening (Solder Mask Opening 320A) adjacent the first opening, wherein each of the one or more second openings is configured to provide space for the bonding region of the solder mask to expand into during a thermal expansion of a solder ball formed on the bond pad.
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Regarding claim 2, Chen et al. disclose a first opening (320B, D5) having a first cross-sectional area, wherein the second opening (320A, D6) has a second cross-sectional area smaller than or equal to the first cross-sectional area.
“The diameter D5 of the SRO 320B below the dummy connector 316 may be greater than or equal to the diameter D6 of the SRO 320A below the functional connector 314. E.g, In an embodiment in which the diameter D6 of the SRO 320A below the functional connector 314 is about 190 .Math.m, The diameter D5 of the SRO 320B under the dummy connector 316 may be about 190 .Math.m or more.”
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Regarding claim 3, Chen et al. disclose a first opening (320) having a first longitudinal footprint, and wherein each of the one or more second openings (320A) has a second longitudinal footprint (Fig. 24F) different from the first longitudinal footprint.
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Regarding claim 4, Chen et al. disclose a second opening (320A) wherein at least a portion is vertically aligned with the solder ball formed on at least one bond pad.
Regarding claim 5, Chen et al. disclose a second opening (320A) wherein at least one of the second openings exposes the outer surface of the core layer.
Regarding claim 7, Chen et al. disclose a second opening exposing a non-bond pad portion of the metallization layer (106, Fig. 24D).
Regarding claim 8, Chen et al. disclose a surface finishing material covering the bond pad exposed by the first opening (320) in the solder mask (318) and the non-bond pad portion exposed by the second opening (320A) in the solder mask.
Regarding claim 10, Chen et al. disclose a solder mask further including a third opening (Fig. 24D) adjacent to the second opening (D2), wherein the third opening exposes a second bond pad of the metallization layer.
“The dielectric layer 108 is patterned to form openings to expose portions of the metallized pattern 106.”
“The opening penetrates the passivation film 124 to the pad 122.”
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Regarding claim 11, Chen et al. disclose a substrate (400, FIG. 29) for a semiconductor device assembly (500) comprising:
A core layer (based on package substrate 400, insulating core) having an upper surface (dummy connectors 316);
A metallization layer (302) formed on the upper surface (interconnect structure 320), the metallization layer including a plurality of bond pads (bonding pad 303, 304),
A solder mask (318) formed over the metallization layer and the upper surface, wherein the solder mask includes:
A plurality of openings (opening 320, Fig. 22) exposing the bond pad and immediately surrounded by a bonding region of the solder mask;
A plurality of second openings (Solder Mask Opening 320A) adjacent the first openings, wherein each of the one or more second openings is configured to provide space for the bonding region of the solder mask to expand into during a thermal expansion of a solder ball formed on the bond pad.
A plurality of solder structures is electrically coupled to the individual bond pad exposed by the individual first opening.
“The through via 306 extends through the substrate 302 and couples at least one bonding pad 303 to at least one bonding pad 304.”
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Regarding claim 12, Chen et al. disclose a substrate (400, FIG. 29) which includes a central region (300, Fig. 22), wherein each of the plurality of bond pads in the metallization layer is carried by the central region.
Regarding claim 13, Chen et al. disclose a substrate wherein a plurality of second openings in the solder mask form a grid, and wherein each of the plurality of first openings is positioned surrounded by two or more corresponding second openings in the grid (Fig. 24C).
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Regarding claim 14, Chen et al. disclose a substrate wherein a plurality of first openings has a first footprint, wherein each of the plurality of second opening has a second footprint smaller than the first footprint (Fig. 24F).
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Regarding claim 15, Chen et al. disclose a substrate (302) wherein a plurality of second openings (320A) exposes the upper surface of the substrate (Fig. 26).
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Regarding claim 16, Chen et al. disclose a substrate (302) wherein the structure has a longitudinal footprint defining a peripheral edge, wherein a point on the peripheral edge is spaced longitudinally apart from the first opening by a first distance, and wherein the each of the second openings is at least partially within a second distance from the first opening that is twice the first distance (Fig. 24G).
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Regarding claim 17, Chen et al. disclose a substrate (302) which further includes a plurality of vias (306) extending through the substrate, wherein the metallization layer is electrically coupled to each of the plurality of vias (Fig. 3).
“The through via 306 extends through the substrate 302 and couples at least one bonding pad 303 to at least one bonding pad 304.”
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Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 6 and 9 are rejected under 35 U.S.C. 103 as being unpatentable in view of Chen et al. (TW I654726 B).
Regarding claim 6, Chen et al. disclose a first opening having a first depth, and a second opening has a second depth but does not disclose the second depth as greater than the first depth specifically. However, it would be obvious to one ordinarily skilled in the art before the effective filing date of the application to routinely modify opening depths as needed for thermal expansion, mechanical spacing, and clearance.
Regarding claim 9, Chen et al. does not disclose a surface finishing material is an organic solderability preservative, however, it would be obvious to one ordinarily skilled in the art before the effective filing date of the application to utilize an organic solderability preservative which is regularly used in industrial application to improve solderability on fine-pitch components and as a cost-effective process.
Response to Arguments
Applicants' arguments filed November 3, 2025 have been fully considered but they are not persuasive.
Applicant argues that “Chen fails to disclose or suggest each and every feature of claim 1 including, among other features, "one or more second openings" that are "adjacent the first opening" and "provide space for the bonding region of the solder mask to expand into during a thermal expansion of a solder ball formed on the at least one bond pad." Applicants do not claim an array of first openings adjacent to an array of second openings in claim 1, and Applicants do not claim any shape or size of the first and second openings. Rather, Applicants claim "a first opening" and "one or more second openings", which can be a single second opening, in claim 1. Therefore, the plurality of openings disclosed by Chen et al. read on claim 1.
Applicant further argues “Each of the openings 320, however, is always filled with either the functional connectors 314 or the dummy connectors 316.” Respectfully it is submitted that openings are present (Fig. 28A and Fig. 28B) as 606 and above 602 in the figures below, while Merriam-Webster defines adjacent as “adjacent, adjoining, contiguous, juxtaposed mean being in close proximity. adjacent may or may not imply contact”.
Please note that an opening does not necessarily suggest an empty opening, and can be a filled opening. If arguendo Applicant’s arguments are correct, it is not clear whether Applicant suggests that the claimed first and second openings are in a state of vacuum, and not a single air molecule is present inside the claimed first and second openings.
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Conclusion
Applicants' amendment did not necessitate a new ground of rejection in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicants are reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Joshua S Wyatt whose telephone number is (703) 756-1937. The examiner can normally be reached 7:00 AM - 5:00 PM EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Joshua Benitez can be reached on (571) 270-1435. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JOSHUA SCOTT WYATT/Examiner, Art Unit 2815
/JAY C KIM/Primary Examiner, Art Unit 2815
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