Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Applicant is advised that should claim 2 be found allowable, claim 3 will be objected to under 37 CFR 1.75 as being a substantial duplicate thereof. When two claims in an application are duplicates or else are so close in content that they both cover the same thing, despite a slight difference in wording, it is proper after allowing one claim to object to the other as being a substantial duplicate of the allowed claim. See MPEP § 608.01(m).
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-4, 5-17 and 19-22 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more.
For step 1, claims 1-4, 5-17 and 19-22 are directed towards statutory categories, which is a machine for claims 1-4, 5-17 and 21-22 and a process for claims 19 and 20, respectively.
Regarding claim 1, for Step 2A Prong One, the claim recites “a first update of a first vector, a second update of a second vector, and a third update of a third vector” which is a mathematical concept, in this case mathematical calculations. Per Charu C. Aggarwal’s textbook Linear Algebra and Optimization for Machine Learning, “vectors” are defined as “arrays of numerical values” (“Linear Algebra and Optimization: An Introduction”, Page 2). The updating of vectors requires performing a mathematical calculation that would modify or change the numerical values.
For Step 2A Prong Two, additional elements consist “a calculation device” and “a processing device”. These elements are merely an “apply it” scenario using generically recited computer components to perform the mathematical calculations. See MPEP 2106.05(f).
Even when viewed in combination, these additional elements do not integrate the recited judicial exception into a practical application and the claim is directed to the judicial exception.
For Step 2B, the additional elements do not amount, alone or in combination, to significantly more than the abstract idea. The additional elements merely link the mathematical calculations to a generic processing device in a manner that merely recites “apply it”.
Even when considered in combination, these additional elements do not integrate the recited judicial exception into a practical application, and represent insignificant extra-solution activity and mere instructions to apply an exception, which do not provide an inventive concept. The claim is not eligible.
Regarding claims 2-4 and 6-7, they all merely further limit the mathematical calculations in claim 1. For Step 2A Prong One are themselves either mathematical calculations (Claims 2-4) or mathematical relationships (Claims 6-7). Even when viewed in combination, none of the
limitations integrate the recited judicial exception into a practical application and the claim is
directed to the judicial exception. The claims are not eligible.
Regarding claims 8-10, the additional elements are a “processing device”, “processor”, and “memory part”. For Step 2A Prong Two and 2B, these additional elements are merely generic computer components claimed at a high level, and amount to mere instructions to apply the mathematical calculations disclosed in claim 1.
Even when considered in combination, these additional elements do not integrate the recited judicial exception into a practical application, and represent mere instructions to apply an exception, which do not provide an inventive concept. The claims are not eligible.
Regarding claim 11, the claim merely describes a memory that is configured to store the result of the mathematical calculations of claim 1. This is insignificant extra-solution activity that for Step 2B is well-understood, routine and conventional per MPEP 2106.05(d)(II)(iv).
Even when considered in combination, this additional element does not integrate the recited judicial exception into a practical application, and represents insignificant extra-solution activity, which does not provide an inventive concept. The claim is not eligible.
Regarding claims 12-14, the additional elements of a “processing device”, “processor”, and “memory part”. For Step 2A Prong Two and 2B, these additional elements are merely generic computer components claimed at a high level, and amount to mere instructions to apply the mathematical calculations disclosed in claim 1. Additionally, the memory part additionally merely stores and retrieves the results of the mathematical calculations of claim 1, and for Step 2B is regarded as insignificant extra-solution activity that is well-understood, routine and conventional per MPEP 2106.05(d)(II)(iv).
Even when considered in combination, these additional elements do not integrate the recited judicial exception into a practical application, and represent insignificant extra-solution activity and mere instructions to apply an exception, which do not provide an inventive concept. The claims are not eligible.
Regarding claims 15-17, the additional elements are a “processing portion”, which for Step 2A Prong Two and 2B is merely a generic computer component claimed at a high level and amount to mere instructions to apply the mathematical calculations disclosed in claim 1, and performing portions of the updates at the same time, which for Step 2B is insignificant extra-solution material that is well-understood, routine and conventional per Steven Brawer’s Introduction to Parallel Programming: “In addition to running completely isolated programs, parallel processing is useful for calculations involving a number of nearly independent but communicating calculations” (“Introduction”, page 2).
Even when considered in combination, these additional elements do not integrate the recited judicial exception into a practical application, and represent insignificant extra-solution activity and mere instructions to apply an exception, which do not provide an inventive concept. The claims are not eligible.
Regarding claim 19, it is a computer-readable media claim that recites the same abstract idea as claim 1 and is not eligible for the same reasons.
Regarding claim 20, it is a method claim that recites the same abstract idea as claim 1 and is not eligible for the same reasons.
Regarding claim 21, the additional elements are a “processing device” and a “memory part”. For Step 2A Prong Two and 2B, these additional elements are merely generic computer components claimed at a high level, and amount to mere instructions to apply the mathematical calculations disclosed in claim 1. Additionally, the memory part additionally merely stores and retrieves the results of the mathematical calculations of claim 1, and for Step 2B is regarded as insignificant extra-solution activity that is well-understood, routine and conventional per MPEP 2106.05(d)(II)(iv).
Even when considered in combination, these additional elements do not integrate the recited judicial exception into a practical application, and represent insignificant extra-solution activity and mere instructions to apply an exception, which do not provide an inventive concept. The claim is not eligible.
Regarding claim 22, the additional elements are a “processing device” and a “memory part”, which for Step 2A Prong Two and 2B, these additional elements are merely generic computer components claimed at a high level, and amount to mere instructions to apply the mathematical calculations disclosed in claim 1. Additionally, the memory part additionally merely stores and retrieves the results of the mathematical calculations of claim 1, and for Step 2B is regarded as insignificant extra-solution activity that is well-understood, routine and conventional per MPEP 2106.05(d)(II)(iv); and “update[s] performed in parallel”, which for Step 2B is insignificant extra-solution material that is well-understood, routine and conventional per Steven Brawer’s Introduction to Parallel Programming: “In addition to running completely isolated programs, parallel processing is useful for calculations involving a number of nearly independent but communicating calculations” (“Introduction”, page 2).
Even when considered in combination, these additional elements do not integrate the recited judicial exception into a practical application, and represent insignificant extra-solution activity and mere instructions to apply an exception, which do not provide an inventive concept. The claims are not eligible.
Allowable Subject Matter
Claims 1-4, 6-17 and 19-22 would be allowable if rewritten to overcome the rejections under 35 U.S.C. 101.
Regarding claim 1, the prior art of record does not teach or suggest a combination as claimed including “wherein a variable of the first vector includes an ith entry of a first variable xi, a variable of the second vector includes the nth entry of a second variable y-i, the i is an integer not less than 1 and not more than n, the n is a integer not less than 1, a variable of the third vector includes a qth entry of a third variable uq, the q is an integer not less than 1 and not more than m, and the m is an integer not less than 1”. Sun discloses a three-vector optimization algorithm (Algorithm 1), but both the second and third vectors are both of size 1. There is no evidence that the second or third vector in Sun’s algorithm can be of a size greater than 1.
Nedic discloses a multi-agent optimization solver system that updates vectors to solve optimization problems (Section II, Equation 3), but does not teach or suggest updating more than two vectors.
Bagherbeik discloses a three-matrix system (Figure 1A) for solving optimization problems, but only the third matrix is the matrix gets updated (Figure 3), while the first two matrices are used exclusively as input values.
Ohzeki (US 12,608,438) discloses an annealing unit that solves optimization problems by updating vectors (Figure 5), but uses a quantum computer instead of a simulated annealing device, and only updates two variables.
Claims 2-4, 6-17 and 21-22 would be allowable by virtue of their dependency on claim 1.
Regarding claim 19, it is a computer-readable media claim corresponding to apparatus claim 1, and would be allowable for the same reasons.
Regarding claim 20, it is a method claim corresponding to apparatus claim 1, and would be allowable for the same reasons.
Response to Arguments
Applicant’s arguments and amendments, see pp. 24-25, filed 06/17/2026, with respect to claims 1-4, 8-17 and 19-20 have been fully considered and are persuasive. The rejection of claims 1-4, 8-17 and 19-20 under 35 U.S.C. 102 and the rejection of claim 11 under 35 U.S.C. 103 has been withdrawn.
The objections to claims 2, 3 and 7 have been withdrawn due to the claims being amended. The duplicate claim warning for claims 2 and 3 remains.
The rejection of claim 5 under 35 U.S.C. 101 has been withdrawn due to the claim being cancelled.
The rejections of claim 18 under 35 U.S.C. 101 and 102 have been withdrawn due to the claim being cancelled.
The rejection of claim 19 under 35 U.S.C. 101 for being directed to non-statutory subject matter has been withdrawn due to the claims being amended.
Applicant's arguments regarding the 35 U.S.C. 101 rejection of claims 1-4, 6-17 and 19-20 for being directed to an abstract idea have been fully considered but they are not persuasive.
Applicant asserts that the claims are not directed to an abstract idea but rather a specific processing procedure under which an optimization problem is solved under inequality constraints via vector updates and a parallel execution architecture (Remarks, p. 18, ¶ 1).
Examiner respectfully disagrees. The claim recites updating solving optimization problems via updating vectors, which recites a mathematical concept. The procedure that the calculation device performs to update the vectors is done by doing math to them.
Applicant asserts that claims 11-17 citing specific processing portions and memory portions are directed to a coordinated data transfer between processing portions and not a mathematical concept (Remarks, p. 19, ¶ 1).
Examiner respectfully disagrees. With regard to the processing portion, it is an additional element that does no more than generally link the to the mathematical concept in a matter than equates to “apply it” using generic computer components. The specification supports this assertion: “[t]he calculation device according to the embodiment may function as software of a general-purpose processor” (Specification, p. 11, lines 30-31, emphasis added). With regards to the memory portion, they are claimed at a high level of generality, and are thus insignificant extra-solution material. Storing and retrieving information in memory when claimed at a high level of generality has been recognized as well-understood, routine and conventional per MPEP § 2106.05(d)(II)(iv).
Applicant further asserts that similar to Ex Parte Desjardins the claims recite additional elements that amount to a technological improvement in the field of solving optimization problems using calculation devices, because the specification provides sufficient detail for a PHOSITA to recognize the claimed invention as offering an improvement (Remarks, pp. 20-21, ¶ 3). Applicant asserts that “the calculation device according to amended claim 1 performs ‘a processing procedure for solving an optimization problem including an objective function and a plurality of inequality constraints,’ including ‘a first update of a first vector, a second update of a second vector, and a third update of a third vector,’ in which ‘the third update includ[es] updating the third vector using at least the first vector to adjust an influence in the plurality of inequality constraints.’ As a result, ‘it is not necessary to calculate the Hessian matrix or the inverse matrix of the Hessian matrix,’ thereby reducing computational burden, and ‘the capacity of the memory part 70M may be smaller than that of the Newton method’, which allows handling of large-scale optimization. Applicant's Published Application at ¶ [0067]” (Remarks, p. 21, ¶ 1).
Examiner respectfully disagrees. The section of the specification cited, and the elements of the claim do not point to an improvement in technology, but an improvement to the mathematical concept. “[I]t is important to keep in mind that an improvement in the abstract idea itself (e.g. a recited fundamental economic concept) is not an improvement in technology” (MPEP § 2106.05(a)(II)).
Applicant asserts that when viewed as a whole, independent claim 1 recites a particular manner of improving the technology of solving an optimization problem, rather than merely involving a mathematical concept as implemented by a computer (Remarks, p. 21, ¶ 3).
Examiner respectfully disagrees. As discussed above, the claims a mathematical concept and the additional elements, even when viewed in common, do not integrate the recited judicial exception into a practical application.
Applicant further asserts that the claims recite an inventive concept that is not well-understood, routine or conventional in the field (Remarks, p. 23, ¶ 1).
Examiner respectfully disagrees. The part that is arguably not well-understood, routine and conventional is the abstract idea itself, the mathematical concept. What is left is a generically recited processor, which is just an “apply it” scenario; generically recited memory; and executing parts of the process in parallel, which is well-understood, routine and conventional.
Regarding newly presented claims 21 and 22, they have been addressed in the rejection above.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/M.S./
Matthew StrappExaminer, Art Unit 2182
(571) 272-9343
/ANDREW CALDWELL/Supervisory Patent Examiner, Art Unit 2182
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