DETAILED ACTION
1. Claims 1-21 are pending in the application.
Notice of Pre-AIA or AIA Status
2. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 101
3. 35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
4. Claims 1-21 are rejected under 35 U.S.C. 101 as being directed to non-statutory subject matter.
Claim 13 is rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more. As analyzed under the current 2019 Revised Patent Subject Matter Eligibility Guidance; first, the claim is directed to a proper statutory category. Second, under step 2A prong 1, the claim is directed to abstract ideas; specifically mathematical concepts such as mathematical calculations and/or mental processes or done by pen and paper. They are highlighted below (underlined, italicized):
13. A processor-implemented method with parallel processing, the method comprising:
determining first operation result data using an operation process by a first processor module in a first time interval;
transmitting the first operation result data to a second processor module by the first processor module;
determining second operation result data using the operation process by the first processor module in a second time interval;
determining whether to transmit the second operation result data to the second processor module by the first processor module; and
determining second prediction result data corresponding to the second operation result data based on the first operation result data received from the first processor module by the second processor module and a prediction process without transmitting the second operation result data to the second processor module by the first processor module in response to the first processor module determining not to transmit the second operation result data to the second processor module.
As currently recited, under the broadest reasonable interpretation, these highlighted limitations can be interpreted as mathematical concepts and/or mental processes or done by pen and paper.
Next, under step 2A prong 2, are there additional elements or combination of elements that apply or integrate the judicial exception into a practical application? The additional limitations of “first processor module” “second processor module” are recited at a high-level of generality (i.e., generic machine) such that they amount to no more than mere instructions to apply the exception using a generic computer component.
Accordingly, these additional elements do not integrate the abstract idea into a practical application because they do not impose any meaningful limits on practicing the abstract idea. Further the claim recites “transmitting the first operation result data to a second processor module by the first processor module;” “determining whether to transmit the second operation result data to the second processor module by the first processor module;” and “ … without transmitting the second operation result data to the second processor module by the first processor module in response to the first processor module determining not to transmit the second operation result data to the second processor module.” However, these steps are recited as a general means of transmitting data for use by the abstract idea, and thus fails to impose a meaningful limit on the remaining steps. Such data transmitting operations could be attached to any calculation and is necessary for use of the judicial exception, amounting to mere gathering and/or insignificant extra-solution activity.
Lastly, under step 2B are there limitations indicative of an inventive concept (i.e. significantly more)? No, the additional limitations do not include additional elements that are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, the additional elements are no more than mere instructions to apply the exception using a generic computer component. Mere instructions to apply an exception using a generic computer component cannot provide an inventive concept. See MPEP 2106.05(f).
Furthermore, transmitting data that is necessary for use of the recited judicial exception represents insignificant extra solution activity. The courts have found limitations directed transmitting information electronically, recited at a high level of generality, to be well-understood, routine, and conventional. See MPEPE 2106.05(d)(II). The claim is not patent eligible.
5. Claim 1 is rejected for similar reasons as presented above with reference to claim 13 as the recite the similar abstract ideas found in claim 13 above. Claim 1 is the apparatus of method claim 13. Thus, the claim is directed to the same abstract ideas without reciting meaningful limitations that are sufficient to ensure that the claim amounts to significantly more than the abstract idea itself.
6. Dependent claims 2-12 and 14-21 are rejected under 35 U.S.C. 101 as non- statutory for at least the reason stated above, as they do not add any feature or subject matter that would solve the non-statutory deficiencies of the independent claims from which they depend. The claims depend from claims 1 and 13, but fail to include any additional elements sufficient to amount to significantly more than the judicial exception. The claims recite further limitations that abstract mathematical concepts and/or mental steps without reciting any additional limitations that make the claim any less abstract or that impose meaningful limits on practicing the abstract idea. Accordingly, the claims are not patent-eligible under 35 U.S.C. 101.
For example:
7. Claim 2 recites the abstract idea of “the determining of whether to transmit the second operation result data, the first processor module is configured to determine not to transmit the second operation result data to the second processor module in response to a difference between the second operation result data and the first operation result data being less than a threshold,” and thus similarly rejected as claim 1 above for failing to recite additional limitations that integrate the abstract idea into a practical application and impose meaningful limits on practicing the abstract idea and for failing to include additional elements that are sufficient to amount to significantly more than the judicial exception.
8. Claim 3 recites the abstract idea of “wherein, for the determining of whether to transmit the second operation result data, the first processor module is configured to: determine the second prediction result data based on the first operation result data and the prediction process; and determine not to transmit the second operation result data to the second processor module in response to a difference between the second operation result data and the second prediction result data determined by the first processor module being less than a threshold,” and thus similarly rejected as claim 1 above for failing to recite additional limitations that integrate the abstract idea into a practical application and impose meaningful limits on practicing the abstract idea and for failing to include additional elements that are sufficient to amount to significantly more than the judicial exception.
9. Claim 4 recites the abstract idea of “wherein, for the determining of whether to transmit the second operation result data, the first processor module is configured to determine to transmit the second operation result data to the second processor module in response to a current number of transmissions to the second processor module satisfying a set condition,” and thus similarly rejected as claim 1 above for failing to recite additional limitations that integrate the abstract idea into a practical application and impose meaningful limits on practicing the abstract idea and for failing to include additional elements that are sufficient to amount to significantly more than the judicial exception.
10. Claim 5 recites the abstract idea of “wherein the first operation result data and the second operation result data are data in a floating point type, and the first processor module is configured to transmit a mantissa part excluding an exponent part of the second operation result data to the second processor module in response to determining to transmit the second operation result data to the second processor module,” and thus similarly rejected as claim 1 above for failing to recite additional limitations that integrate the abstract idea into a practical application and impose meaningful limits on practicing the abstract idea and for failing to include additional elements that are sufficient to amount to significantly more than the judicial exception.
11. Claim 6 recites the abstract idea of “wherein the first operation result data and the second operation result data correspond to time series data, and the prediction process comprises determining prediction result data using a Taylor series approximation technique approximating the time series data with a polynomial function,” and thus similarly rejected as claim 1 above for failing to recite additional limitations that integrate the abstract idea into a practical application and impose meaningful limits on practicing the abstract idea and for failing to include additional elements that are sufficient to amount to significantly more than the judicial exception.
Allowable Subject Matter
12. Claims 1-21 would be allowable if rewritten or amended to overcome the rejection(s) under 35 U.S.C. 101, set forth in this Office action.
The following is a statement of reasons for the indication of allowable subject matter:
The claims recite at least wherein the first processor module is configured to: determine first operation result data using an operation process in a first time interval; transmit the first operation result data to the second processor module; determine second operation result data using the operation process in a second time interval; and determine whether to transmit the second operation result data to the second processor module, and wherein the second processor module is configured to determine second prediction result data corresponding to the second operation result data based on the first operation result data received from the first processor module and a prediction process in response to the first processor module determining not to transmit the second operation result data to the second processor module.
The closet prior art of record US Pub. 2021/0255896 teaches a method for processing tasks in parallel, a device and a storage medium, and relate to a field of artificial intelligent technologies. The method includes: determining at least one parallel computing graph of a target task; determining a parallel computing graph and an operator scheduling scheme based on a hardware execution cost of each operator task of each of the at least one parallel computing graph in a cluster, in which the cluster includes a plurality of nodes for executing the plurality of operator tasks, and each parallel computing graph corresponds to at least one operator scheduling scheme; and scheduling and executing the plurality of operator tasks of the determined parallel computing graph in the cluster based on the determined parallel computing graph and the determined operator scheduling scheme.
The prior art of record does not teach or suggest at least at least wherein the first processor module is configured to: determine first operation result data using an operation process in a first time interval; transmit the first operation result data to the second processor module; determine second operation result data using the operation process in a second time interval; and determine whether to transmit the second operation result data to the second processor module, and wherein the second processor module is configured to determine second prediction result data corresponding to the second operation result data based on the first operation result data received from the first processor module and a prediction process in response to the first processor module determining not to transmit the second operation result data to the second processor module.
Conclusion
13. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
US Pub. 2020/0310800 – related to the field of computer processor architecture; and more specifically, to perform approximation using polynomials in a computer.
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/MICHAEL D. YAARY/ Primary Examiner, Art Unit 2151