Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
(g)(1) during the course of an interference conducted under section 135 or section 291, another inventor involved therein establishes, to the extent permitted in section 104, that before such person’s invention thereof the invention was made by such other inventor and not abandoned, suppressed, or concealed, or (2) before such person’s invention thereof, the invention was made in this country by another inventor who had not abandoned, suppressed, or concealed it. In determining priority of invention under this subsection, there shall be considered not only the respective dates of conception and reduction to practice of the invention, but also the reasonable diligence of one who was first to conceive and last to reduce to practice, from a time prior to conception by the other.
Claim 1-3, 5-8, 10-12 are rejected under 35 U.S.C. 102 as anticipated by Wu et al (Doc. ID 424528).
Regarding Claim 1, Wu et al. discloses a semiconductor device (standard LED structure) comprising:
A first semiconductor structure comprising a first semiconductor layer (Si-doped n-GaN layer) including a first dopant and a second dopant (magnesium is a p-type dopant and silicon is an n-type dopant in GaN-based semiconductor materials.).
A second semiconductor structure located on the first semiconductor structure and including the first dopant, emitting light (electromagnetic radiation) and an active region located between the first semiconductor structure and the second semiconductor structure and including the first dopant;
Because the transitional phrase "including" or "comprising" does not preclude presence of other dopants, the claimed first and second semiconductor structure, and the active region can all include the first and second dopants. Magnesium is a p-type dopant and silicon is an n-type dopant in GaN-based semiconductor materials. The structure at the depth of about 800 nm down to about 1000 nm is the superlattice layer that includes both the Mg and Si to a certain degree (Fig. 1 below). And the plateau adjacent to the superlattice layer is the MQW region or active region.
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Applicants do not specifically claim what the wavelength of light is, how the active layer emits light, i.e. the operating condition of the claimed semiconductor device, etc., and therefore the active region disclosed by the prior art reference corresponds to the claimed active region since light would be emitted when an electrical bias is applied to the semiconductor device/structure of the prior art reference, and in addition, when the semiconductor device/structure disclosed by the prior art reference is illuminated with light, the semiconductor device/structure of the prior art reference would emit light via a photoluminescence process. Furthermore, the claim limitation “active” specifies an intended use or field of use, and is treated as non-limiting since it has been held that in device claims, intended use must result in a structural difference between the claimed invention and the prior art in order to patentably distinguish the claimed invention from the prior art. Applicants do not specifically claim what "the active region" does, and MPEP 2111.01 stipulates that it is improper to import claim limitations. If the prior art structure is capable of performing the intended use, then it meets the claim. In re Casey, 152 USPQ 235 (CCPA 1967); In re Otto, 136 USPQ 458, 459 (CCPA 1963). A claim containing a “recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus” if the prior art apparatus teaches all the structural limitations of the claim. Ex Parte Masham, 2 USPQ 2d 1647 (Bd. Pat. App. & Inter. 1987).
Regarding Claim 2, Wu et al. discloses a semiconductor device wherein the first dopant has a first maximum concentration and the second dopant has a second maximum concentration wherein the second maximum concentration is greater than the first maximum concentration (Fig. f):
“The concentrations of silicon and magnesium in the n__-GaN and p__-GaN TJ layers were 1.08 × 1020 cm−3 and 1.16 ×1020 cm−3, respectively, while in the n_-GaN and p_-GaN layer were 3.42 × 1019 cm−3 and 1.01 × 1020 cm−3, respectively.”
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Regarding Claim 3, Wu et al. discloses a semiconductor device wherein the concentration of the second dopant is greater than the concentration of the first dopant throughout the first semiconductor structure.
“The concentrations of silicon and magnesium in the n__-GaN and p__-GaN TJ layers were 1.08 × 1020 cm−3 and 1.16 ×1020 cm−3, respectively, while in the n_-GaN and p_-GaN layer were 3.42 × 1019 cm−3 and 1.01 × 1020 cm−3, respectively.”
Regarding Claim 5, Wu et al. discloses a semiconductor device wherein the first layer has an upper surface with a roughened structure. Because Applicants do not specifically claim the roughness of the roughened structure, what the surface roughness of the first semiconductor layer was before the unspecified roughening process, what constitutes the roughened structure, i.e. whether the roughened structure is constituted of an atomic scale roughness on the upper surface, steps and terraces on the upper surface, or macroscopic features such as mounds or islands on the upper surface, and how the roughened structure is generated, technically any upper surface of a semiconductor layer can be referred to be as having "a roughened structure. " For example, a semiconductor layer whose upper surface has a roughness of 0.2 nm can be obtained from an initial semiconductor layer whose surface roughness was originally 0.1 nm.
Regarding Claim 6, Wu et al. discloses a semiconductor device wherein the first dopant can be an n-type dopant or a p-type dopant while the second dopant is a p-type or n-type dopant (Magnesium is a p-type dopant and silicon is an n-type dopant in GaN-based semiconductor materials).
Regarding Claim 7, Wu et al. discloses a semiconductor device wherein the first semiconductor layer includes a binary group III-V material using a gallium and nitrogen containing material.
Regarding Claim 8, Wu et al. discloses a semiconductor device wherein the first dopant comprises magnesium:
“the concentration of Mg dopant decreased sharply at the side of the n__-GaN layer owing to the avoidance of the Mg memory effect with the PA-MBE regrowth processes, which guaranteed the high electron and hole concentration distributed at the n__-GaN and p__-GaN layer, respectively.”
Regarding Claim 10, Wu et al. discloses a second semiconductor layer and a first semiconductor layer having different conductivity types.
Regarding Claim 11, Wu et al. discloses a first semiconductor structure which includes a super lattice structure (structure at the depth of about 800 nm down to about 1000 nm is the superlattice layer that includes both the Mg and Si to a certain degree (Fig. 1).
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Regarding Claim 12, Wu et al. discloses an active region including a plurality of semiconductor stacks, and each semiconductor stack includes a well layer (InGaN quantum well) and a barrier layer (GaN quantum Barrier).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AlA) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed
invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 4, 9, 13-20 are rejected under 35 U.S.C. 103(a) as obvious over Wu et al (Doc. ID 424528).
Regarding Claim 4, Wu et al. discloses a first dopant in the active region but does not disclose the dopant maximum concentrations explicitly. However, it would obvious to one ordinarily skilled in the art to experiment with differing dopant amounts in the interlayer components to increase conductivity, thermal/chemical stability, and reliability of the semiconductor layer as needed.
Regarding Claim 9, Wu et al. discloses a second semiconductor structure comprising a second semiconductor layer and a first dopant in the second semiconductor layer. Wu does not disclose the maximum dopant concentration amounts. However, it would be obvious to one ordinarily skilled in the art to experiment with differing dopant amounts in the interlayer components to increase conductivity, thermal/chemical stability, and reliability of the second semiconductor layer as needed.
Regarding Claim 13, Wu et al. discloses a well layer having a first aluminum content percentage and a barrier layer having a second aluminum content percentage. However, it would be obvious to one ordinarily skilled in the art to experiment with differing aluminum amounts in the interlayer components to increase wafer adhesiveness, thermal/chemical stability, and reliability of the barrier layer as needed.
Regarding Claim 14, Wu et al. discloses a barrier layer having a first thickness and a well layer having a second thickness but does not disclose the exact thickness dimensions of the individual well layers. However, it would be obvious to one ordinarily skilled in the art before the effective filing date of the application to modify thickness dimensions of well layers as needed to control energy levels and density of states for confined particles.
Regarding Claim 15, Wu et al. discloses an active region further comprising a first confinement layer and a second confinement layer, and the plurality of semiconductor stacks is located between the first confinement layer and the second confinement layer.
Regarding Claim 16, Wu et al. discloses a barrier layer having a first thickness and the first confinement layer having a third thickness but the explicit dimensions are not specified. However, it would be obvious to one ordinarily skilled in the art before the effective filing date of the application to modify layer thickness amounts of the barrier and confinement layers as needed to prevent electron movement and exchange between layers.
Regarding Claim 17, Wu et al. discloses a well layer with a first aluminum content and a first confinement layer. Wu does not disclose the aluminum content percentage of the well layer or the third aluminum content percentage of the confinement layer. However, it would obvious to one ordinarily skilled in the art to experiment with differing aluminum amounts in the interlayer components to increase wafer adhesiveness, thermal/chemical stability, and reliability of the first confinement layer as needed.
Regarding Claim 18, Wu et al. discloses a second semiconductor structure further including a first and second dopant but does not disclose a third dopant. However, it would obvious to one ordinarily skilled in the art before the effective filing date of the application to increase or decrease the amount of dopants as needed to alter the conductivity and create a surplus of electrons or holes throughout the second structure.
Regarding Claim 19, Wu et al. discloses a first semiconductor layer further including a first and second dopant but does not disclose a fourth dopant. However, it would obvious to one ordinarily skilled in the art before the effective filing date of the application to increase or decrease the number of dopants as needed to alter the conductivity and create a surplus of electrons or holes throughout the semiconductor layer.
Regarding Claim 20, Wu et al. discloses a first semiconductor layer further including a first and second dopant but does not disclose a third and fourth dopant. However, it would obvious to one ordinarily skilled in the art before the effective filing date of the application to increase or decrease the number of dopants as needed to alter the conductivity and create a surplus of electrons or holes throughout the semiconductor layer.
Response to Arguments
Applicants amendment with regards to Claim 1 " and an active region located between the first semiconductor structure and the second semiconductor structure, emitting light and including the first dopant; wherein the first dopant and the second dopant have different conductivity types.” has been acknowledged.
Applicant argues that “In the field of optoelectronics, an "active region" is a term of art that defines a specific, discrete structural component of a semiconductor device, namely, the region where radiative recombination occurs to produce photons. The Specification explicitly defines the active region 108 as a structural stack that may include "a barrier layer 108 c 1 and a well layer 108 c 2" (Specification at paragraph [0027]). This structural definition is distinct from the surrounding cladding or contact layers.” Applicants do not specifically claim what "the active region" does, and MPEP 2111.01 stipulates that it is improper to import claim limitations.
However, applicants do not specifically claim what the wavelength of light is, how the active layer emits light, i.e. the operating condition of the claimed semiconductor device, etc., and therefore the active region disclosed by the prior art reference corresponds to the claimed active region since light would be emitted when an electrical bias is applied to the semiconductor device/structure of the prior art reference, and in addition, when the semiconductor device/structure disclosed by the prior art reference is illuminated with light, the semiconductor device/structure of the prior art reference would emit light via a photoluminescence process. Furthermore, the claim limitation “active” specifies an intended use or field of use, and is treated as non-limiting since it has been held that in device claims, intended use must result in a structural difference between the claimed invention and the prior art in order to patentably distinguish the claimed invention from the prior art. If the prior art structure is capable of performing the intended use, then it meets the claim. In re Casey, 152 USPQ 235 (CCPA 1967); In re Otto, 136 USPQ 458, 459 (CCPA 1963). A claim containing a “recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus” if the prior art apparatus teaches all the structural limitations of the claim. Ex Parte Masham, 2 USPQ 2d 1647 (Bd. Pat. App. & Inter. 1987).
Applicant further argues regarding claim 1 that “Cheng's device utilizes Silicon (Si) or Silicon-Germanium (SiGe) for the channel layers (Cheng at paragraph [0050]). Silicon and SiGe are well-known indirect bandgap materials. In an indirect bandgap material, the recombination of electrons and holes primarily generates heat (phonons) rather than light (photons). Structurally, these materials are incapable of efficient light emission (electroluminescence) as recited in the claims.
In contrast, the Specification describes an active region composed of materials such as InGaN, AlGaN, or InGaAsP (Specification at paragraph [0026]). These are direct bandgap (III- V) materials specifically selected for their physical structure, which allows for radiative recombination and the emission of light. Because Cheng's material structure is physically and fundamentally incapable of the function defined in the claims, Cheng does not inherently or suggestively disclose the claimed "active region... emitting light." A person of ordinary skill in the art (POSITA) would not look to a silicon-based FinFET to find a structure capable of functioning as a light-emitting active region.”
Because the transitional phrase "including" or "comprising" does not preclude presence of other dopants, the claimed first and second semiconductor structure, and the active region can all include the first and second dopants. Referring to Wu et al. magnesium is a p-type dopant and silicon is an n-type dopant in GaN-based semiconductor materials. The structure at the depth of about 800 nm down to about 1000 nm is the superlattice layer that includes both the Mg and Si to a certain degree (Fig. 1 below). And the plateau adjacent to the superlattice layer is the MQW region or active region.
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Applicants further argue that “However, as established above, Cheng's interface layer (112A) is not a semiconductor "active region" designed for light emission, and the gate dielectric is an insulator, not a "second semiconductor structure." The claimed sequence describes a semiconductor-on-semiconductor- on-semiconductor stack (e.g., p-cladding / active / n-cladding). Cheng describes a semiconductor channel / oxide interface / dielectric gate stack. These are fundamentally different structural architectures serving different physical purposes. It is agreed that Cheng describes a semiconductor channel / oxide interface / dielectric gate stack, however, Wu in fact discloses a semiconductor-on-semiconductor- on-semiconductor stack (e.g., p-cladding / active / n-cladding) in Fig. a, b, and c shown below:
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Conclusion
Any inquiry concerning this communication should be directed to JOSHUA SCOTT WYATT at telephone number (703)756-1937.
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/JOSHUA SCOTT WYATT/Examiner, Art Unit 2815
/JAY C KIM/Primary Examiner, Art Unit 2815