DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of the Application
This Office Action is in response to Applicant’s application 17/892,930 filed on April 15 2026 in which claims 1 to 25 are pending.
Drawings
The drawings submitted on August 22, 2022 have been reviewed and accepted by the Examiner.
Notation
References to patents will be in the form of (C: L) where C is the column number and L is the line number. References to pre-grant patent publications will be to the paragraph number in the form of (¶ XXXX).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1-3 and 5-9 are rejected under 35 U.S.C. 103 as being unpatentable over Stamper (US 2012/0261787 A1; hereinafter “Stamper”) in view of Sundaram et al. (US 2016/0111380 A1; hereinafter “Sundaram”).
Regarding claim 1, Stamper teaches a core, comprising:
a substrate (10, Fig.6; ¶ 0021) with a first surface (top surface of substate 10, Fig.6) and a second surface opposite from the first surface (bottom surface of substrate 10, Fig. 6), wherein the substrate comprises glass (¶ 0021);
through glass via (TGV) (36, Fig.6; TWV same as TGV, since the wafer is made from glass; ¶0042), through the substrate (10).
Stamper does not explicitly teach notches into the first surface and the second surface of the substrate, and through glass vias (TGVs), wherein the TGVS are laterally between a first subset of the notches (16, Fig.6) and a second subset of the notches;
However, Stamper teaches alignment marks (22 and 12; Fig.6; ¶ 0029) and crackstops (16, and 20 Fig.6; ¶ 0029) formed into the first surface (top surface of 10) and the second surface (bottom surface of 10) of the substrate, wherein the TGVS (36) are laterally between a first subset of the notches (16, Fig.6) and a second subset of the notches (20, Fig.6);
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the invention, to recognize that the alignment marks and crackstops in the device of Stamper can be treated as notches into the first surface and the second surface of the substrate since notches are equivalent to alignment marks.
However, Sundaram teaches multiple TGVS (210, Fig.2; ¶ 0065) formed in the glass substrate (218, Fig.2).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the invention, to have multiple TGVs in the device of Stamper as taught by Sundaram to have multiple electrical communication pathway in a semiconductor package (¶ 0065).
Regarding claim 2, Stamper teaches wherein the notches are provided proximate to the edges of the substrate (22 and 12 are provided on the edge of the substrate, 10).
Regarding claim 3, Stamper teaches wherein the notches comprise first notches (12 and 22) into the first surface of the substrate (top surface of 10), wherein the first notches are adjacent (very broad limitations; all the layers are adjacent to each other) to a first edge of the substrate (left side surface of the substrate 10) and a second edge of the substrate (right side surface of substrate 10), and wherein the notches further comprise second notches into the second surface of the substrate (12 formed in the second surface), wherein the second notches are adjacent to the first edge of the substrate and the second edge of the substrate (12 is adjacent to the right side of the substrate and left side of the substrate).
Regarding claim 5, Stamper teaches wherein the notches have a flat bottom surface (22 and 12 have flat bottom surfaces; Fig.6).
Regarding claim 6, Stamper teaches wherein the notches comprise four two or more notches (12, 22 and 16 comprises four).
Regarding claim 7, Stamper teaches wherein the notches comprise four or more notches (12, 22 and 16 comprise at least two notices).
Regarding claim 8, Stamper does not explicitly teach wherein the TGVs have hourglass shaped cross-sections.
However, Stamper teaches the through via in Figure 5 different embodiment the TGV can have hourglass shaped cross-section (32, Fig.5).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the invention, to have the TGVs have hourglass shaped cross-sections in the device of Stamper since such modification would have involved a mere change in size/shape of a component. A change in shape is generally recognized as being with the level of ordinary skill in the art MPEP § 2144.04 IV B.
Regarding claim 9, Stamper teaches wherein a width of the notches is smaller than a width of the TGVs (22 has a smaller width than 36; Fig.6).
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Stamper (US 2012/0261787 A1; hereinafter “Stamper”) in view of Sundaram et al. (US 2016/0111380 A1; hereinafter “Sundaram”) as applied to claim 1 above, and further in view of Chu et al. (US 2014/0197423 A1; hereinafter “Chu”).
Regarding claim 4, Stamper as modified by Sundaram does not teach the notches are triangular notches into the substrate.
However, Chu teaches the notches are triangular notches into the substrate (212, Fig.2D; ¶ 0026).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the invention, to form have notches that are triangular notches into the substrate in the device of Stamper and Sundaram as taught by Chu since such modification would have involved a mere change in size/shape of a component. A change in shape is generally recognized as being with the level of ordinary skill in the art MPEP § 2144.04 IV B.
Claims 23-25 are rejected under 35 U.S.C. 103 as being unpatentable over Stamper (US 2012/0261787 A1; hereinafter “Stamper”) in view of Sundaram et al. (US 2016/0111380 A1; hereinafter “Sundaram”) and further in view of Chu et al. (US 2014/0197423 A1; hereinafter “Chu”).
Regarding claim 23, Stamper teaches an electronic system (¶ 0018) a package substrate (Fig.6) comprising a core (10, Fig.6; ¶ 0021), wherein the core comprises glass (¶ 0042); through glass vias (TGVs) through the core ( 36, Fig.6; TWV same as TGV, since the wafer is made from glass; ¶0042 ) and a buildup layer (26; ¶ 0038) over the top surface and the bottom surface of the core (10; 26 is formed over the bottom and top surface of the core 10).
Stamper does not explicitly teach a board; a package substrate coupled to the board, notches into the first surface and the second surface of the substrate; wherein the notches have sloped sidewalls, wherein the notches are adjacent to sidewalls of the buildup layers, and a die coupled to the package substrate and through glass vias (TGVs), wherein the TGVS are laterally between a first subset of the notches (16, Fig.6) and a second subset of the notches.
However, Stamper teaches alignment marks (22 and 12; Fig.6; ¶ 0029) and crackstops (16, and 20 Fig.6; ¶ 0029) formed into the first surface (top surface of 10) and the second surface (bottom surface of 10) of the substrate and alignment marks (22 and 12) and crackstops (16 and 20) are adjacent to sidewalls of the buildup layer (26, Fig.6; ¶ 0038), wherein the TGVS (36) are laterally between a first subset of the notches (16, Fig.6) and a second subset of the notches (20, Fig.6);
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the invention, to recognize that the alignment marks in the device of Stamper are notches into the first surface and the second surface of the substrate since notches are equivalent to the alignment marks.
However, Sundaram teaches a board (PWB; 102; Fig.1; ¶ 0063), a package substrate (108; Fig.1; ¶ 0063) having multiple TGVS (210, Fig.2; ¶ 0065) formed in the glass substrate (218, Fig.2), and a die (106, Fig.1; ¶ 0063) coupled to the package substrate (108).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the invention, to have a board, a package substrate coupled to the board, wherein the substrate have multiple TGVS and a die coupled to the package substrate in the device of Stamper as taught by Sundaram for the purpose of having a microelectronic package structure with a glass substrate (¶0044).
However, Chu teaches wherein the notches have sloped sidewalls (212d, Fig.2D; ¶ 0026).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the invention, to form notches that have sloped sidewalls in the device of Stamper and Sundaram as taught by Chu since such modification would have involved a mere change in size/shape of a component. A change in shape is generally recognized as being with the level of ordinary skill in the art MPEP § 2144.04 IV B.
Regarding claim 24, Stamper does not teach wherein the sidewalls of the buildup layers are tapered.
However, Sundaram teaches wherein the sidewalls of the buildup layer (600. Fig.6) layers are tapered (sidewalls of 600 are tapered as etched to formed the through via in step 602; Fig.6; ¶ 0073).
Therefore, Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the invention, to have the sidewalls of the buildup layers tapered in the device of Stamper as taught by Sundaram since such modification would have involved a mere change in size/shape of a component. A change in shape is generally recognized as being with the level of ordinary skill in the art MPEP § 2144.04 IV B.
Regarding claim 25, Stamper does not teach the notches have flat bottom surfaces.
However, Chi teaches wherein the notches have flat bottom surfaces (212a; Fig.2A; ¶0026).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the invention, to form have notches that are triangular notches into the substrate in the device of Stamper as taught by Chu since such modification would have involved a mere change in size/shape of a component. A change in shape is generally recognized as being with the level of ordinary skill in the art MPEP § 2144.04 IV B.
Allowable Subject Matter
Claims 11- 22 are allowed.
The following is a statement of reasons for the indication of allowable subject matter:
Claim 11 is allowed since the prior art reference does not teach the following limitation: “… buildup layers over the first surface and the second surface of the core, wherein a width of the buildup layers is less than a width of the core; and notches into the first surface and/or the second surface of the core, wherein the notches are outside of the buildup layers.”
Response to Arguments
Applicant's arguments filed April 15 2026 have been fully considered but they are not persuasive.
Applicant’s Argument:
The following h, Applicant does NOT understand Stamper as disclosing the through wafer via 36 as being laterally between a first subset of the alignment marks 22 and 12 and a second subset of the alignment marks 22 and 12. Thus, Stamper does not disclose a core including through glass vias (TGVs) through a substrate, and notches into a first surface and a second surface of the substrate, where the TGVs are laterally between a first subset of the notches and a second subset of the notches, as is required by Applicant's claims. As such, with respect to amended independent claims 1 and 23, Stamper fails to disclose each and every feature of Applicant's claims.
Accordingly, Applicant respectfully requests that the Examiner remove the rejections of the claims.
Examiner’s Response:
Examiner respectfully disagree with the applicant for the following reason:
The prior art reference teaches Stamper (US 2012/0261787 A1) teaches notches (12, 22 and 16, Fig.6) as indicated in the rejection above. The through via (36, Fig. 6) is formed between 16 and 22. Therefore, the following limitation is met by the prior art reference Stamper.
For at least the following reason the rejection of claims 1 35 U.S.C. 103 as being unpatentable over Stamper (US 2012/0261787 A1; hereinafter “Stamper”) in view of Sundaram et al. (US 2016/0111380 A1; hereinafter “Sundaram”) is deemed proper and maintained.
The same argument applies to claim 23.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Mounir S Amer whose telephone number is (571)270-3683. The examiner can normally be reached Monday-Friday 9:00-5:30.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eva Montalvo can be reached at (571) 270-3829. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Mounir S Amer/Primary Examiner, Art Unit 2818
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