Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of Claims
2. This is a final action on the merits in response to the reply received 11/17/2025.
Response to Arguments
Applicant’s arguments have been considered but are not persuasive.
Applicate argues that The provisional application uses the terms L! memory and L1 storage to refer to the same class of memory. The applicant also states that a person of ordinary skill in the art would have understood that the description of an L1 memory refers to a level-one memory. The terms L1 memory, L2 memory, and L3 memory were understood in the art at the time of filing Applicant's provisional application to mean level-one memory, level-two memory, and level-three memory in a memory hierarchy. Therefore, Applicant's provisional application provides support for "a level one (L1) memory," as recited in claim 1. The Examiner respectfully disagrees. Throughout the provisional application 1420CHE2014, the applicant refers to the term memory. For example, Page 2, the applicant discloses optimizing the required external memory bandwidth by 2x over IVA-HD. In addition, on page 3, The applicant discloses a shared level 2 memory which is defined as SL2 (shared level 2). However, page 4 discloses that Data was moved to a local storage L1 inside the hardware accelerator. Nowhere in the specification that it refers to a level one memory. The specification defines L! as local one not level one. Why is there a clear definition for SL2, which is shared level 2 memory, but inconsistencies or lack of a clear definition for L1? There is nothing that specifies that L1 is level one. It is the applicant’s burden to clearly define the subject matter to which patent protection is sought after. Therefore, rejection remains.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1 and 11 rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. There is nothing in the specification or the provisional that discloses a level one (l1) memory. The closes thing to the specification is a local storage called (L1). In addition, there is no support for storing unpadded reference frame in an external memory. The specification only refers to storing padded information in an external memory. Furthermore, there is no support for storing padded set of pixels in a level one memory.
Claims 1 and 11 rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the enablement requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to enable one skilled in the art to which it pertains, or with which it is most nearly connected, to make and/or use the invention. There is nothing in the specification that describes a level one memory as claimed. The closest thing in the provisional is a local (L1) storage. In addition, the specification only discloses storing padded information in an external memory not unpadded information.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 1 and 11 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. There is nothing in the specification that describes a level one memory. The closest thing of a description is a local L1 memory. However, there is no detail describing the difference between the local memory and the SL2 memory.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 5-7, 10-11, 15-17, and 20-24 are rejected under 35 U.S.C. 103 as being unpatentable over Patent 6005980 Eifrig et al (Hereinafter referred to as “Eifrig”), in view of US 20120320970 A1-Drugeon et al (Hereinafter referred to as “Drug”), in further view of US 20050013362 A1-Pearson et al (Hereinafter referred to as “Pearson”).
Regarding claim 1, Eifrig discloses a device (Fig. 2) comprising:
A memory configured to store an unpadded reference frame (column 16, lines 20-25)
a motion estimation unit (Fig. 2, element 220) configured to:
receive a current coding unit (Fig. 1, ;
define a search area around the current coding unit (Fig. 5 shows a search area of dotted lines around the current frame), The search area having multiple boundaries (Fig 5 shows a left, right, up and down boundary, which are interpreted as multiple boundaries);
receive a reference frame (Fig. 5 shows a previous frame 400, which is equivalent to a reference frame);
identify a boundary, of the multiple boundaries, of the search area that is beyond an edge of multiple edges the unpadded reference frame (Fig. 5 shows and extended previous frame (reference frame), 500, which is interpreted as the boundary beyond an edge of the reference frame 400), the reference frame including a plurality of sets of pixels ((column 17, lines 42-45, wherein pixels of reference VOP is interpreted as reference pixels included in the reference frame).
Receive from the memory of an unpadded select set of pixels, among a plurality of sets of pixels, from the unpadded reference frame, the select set of pixels based on the identified boundary and the edge beyond which the identified boundary extends (column 17, lines 42-55, wherein padding is needed for pixels of a reference frame. In other words, the pixels received from the reference VOP are used in the padding process, which is performed in each field. Column 22, lines 17-22, discloses exterior pixel as are padded by setting them to the value of the nearest boundary pixel. Column 10 lines 1-10, discloses previous frame being extended in all directions by padding the border pixels; Column 10, lines 1-5, repeating pixels is equivalent to duplicate pixels) )
select, for padding, the edge of the unpadded reference frame over which the search area extends (Column 10, lines 1-10 discloses frame being extended in all directions by padding the border pixels. The Examiner would like to note that if the border lines were to be padded, then that would include the edges).
and
pad along the selected edge of the unpadded reference frame using the unpadded select set of pixels (column 16, lines 30-45; see fig. 5; Column 10, lines 1-10 discloses frame being extended in all directions by padding the border pixels. The Examiner would like to note that if the border lines were to be padded, then that would include the edges) ; and
output motion information (column 7, lines 40-45, wherein Motion information is provided from the motion estimation function);
and a motion compensation unit (Fig. 2, element 230) configured to:
generate a predicted coding unit based on the output motion information (Column 10, lines 10-15).
Eifrige fails to explicitly disclose receive the output motion information.
However, in the same field of endeavor, Drug discloses receive a current coding unit ([0004]); define a boundary beyond an edge of the frame (fig. 4 and 9); pad a portion of the search area between the boundary and the edge (Fig 4 and 9); output motion information ([0058], motion is transmitted); receive the output motion information ([0058]); generate a predicted coding unit based on the output motion information ([0058]); select, for padding, the edge of the unpadded reference frame over which the search area extends (Drug discloses in [0110], Fig. 4 padding pixel region 540A in Fig 4. This region is the edge that’s being padded. In addition, [0154], discloses selecting based on pad_right or left and padding the edge region Fig 9).
and pad along the selected edge of the unpadded reference frame using the unpadded select set of pixels (Drug discloses in [0110], Fig. 4 padding pixel region 540A in Fig 4. This region is the edge that’s being padded. In addition, [0154], discloses selecting based on pad_right or left and padding the edge region Fig 9.)
Therefore, it would have been obvious to one of ordinary skilled in the art before the effective filing date of the claimed invention to modify the device disclosed by Eifrig to disclose receiving the output motion information as taught by Drug, to improve video coding efficiency ([003]]) by reducing prediction errors [0055]).
Eifrig and Drugeon fail to disclose wherein: motion estimation unit coupled to an external memory and an L1 memory.
However, in the same field of endeavor, Pearson discloses motion estimation unit coupled to an external memory and an L1 memory ([0028])Fig. 4, shows an motion estimation circuit, element 164, coupled to an external memory element 162 and several local internal buffers (memories) as stated in [0004]), the unpadded reference frame is stored in an external memory ([0017], wherein unpadded samples are in stored); storing the padded set of pixels to the L1 memory [40-0041], padded information is stored in internal buffers).
Therefore, it would have been obvious to one of ordinary skilled in the art before the effective filing date of the claimed invention to modify the device disclosed by Eifrig and Drug to disclose wherein: motion estimation unit coupled to an external memory and an L1 memory as taught by Pearson, to improve processing speed ([0253]]).
Regarding claim 5, Eifrig in view of Drug discloses the device of claim 1, wherein: the motion compensation unit receives the current coding unit from the motion estimation unit (Eifrig, column 17, lines 25-40; Drug [0058]. The motivation is the same as for claim 1).
Regarding claim 6, Drug discloses the device of claim 1, wherein: the outputted motion information includes the current coding unit ([0004], [0058]); and the motion compensation unit is configured to: receive the current coding unit; determine a motion vector based on the current coding unit ([0058]); determine a motion referenced coding unit based on the motion vector ([0058]), wherein the motion referenced coding unit includes a second boundary ([0160], left is the second boundary); and in response to the second boundary being beyond the unpaddedreference frame, pad an area between the second boundary and the unpadded reference frame (Pad_left. The motivation is the same as for claim 1).
Regarding claim 7, Drug discloses the device of claim 6, wherein: the motion compensation unit is configured to receive a set of reference pixels associated with the motion reference coding unit ([0058]. The motivation is the same as claim 6).
Regarding claim 10, Eifrig discloses the device of claim 1, wherein: the search area includes a top horizontal edge, a bottom horizontal edge, a right vertical edge, and a left vertical edge (Fig. 5).
Regarding claim 11, analyses are analogous to those presented for claim 1 and are applicable for claim 11.
Regarding claim 15, analyses are analogous to those presented for claim 5 and are applicable for claim 15.
Regarding claim 16, analyses are analogous to those presented for claim 6 and are applicable for claim 16.
Regarding claim 17, analyses are analogous to those presented for claim 7 and are applicable for claim 17.
Regarding claim 20, analyses are analogous to those presented for claim 10 and are applicable for claim 20.
Regarding claim 21, Eifrig discloses the device of claim 1, further comprising: a calculation engine configured to: receive the predicted coding unit (Fig. 1); inversely quantize the predicted coding unit (Fig. 14, dquantize); and perform a transform on the inversely quantized predicted coding unit to generate a processed predicted coding unit (Fig. 13, element 1346 performs inverse DCT).
Regarding claim 22, Drug discloses the device of claim 21, further comprising: a filter configured to: receive the processed predicted coding unit (Fig 1); filter the processed predicted coding unit (Filter 1); and generate a reconstructed coding unit ([0054]).
Regarding claim 23, analyses are analogous to those presented for claim 21 and are applicable for claim 23.
Regarding claim 24, analyses are analogous to those presented for claim 22 and are applicable for claim 24.
Claim(s) 8 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Patent 6005980 Eifrig et al (Hereinafter referred to as “Eifrig”), in view of US 20120320970 A1-Drugeon et al (Hereinafter referred to as “Drug”), in further view of US 20050013362 A1-Pearson et al (Hereinafter referred to as “Pearson”), in view of US 20110080959 A1-Bjorklund (Hereinafter referred to as “Bj”).
Regarding claim 8, Eifrig discloses the device of claim 7 (See claim 26)
Eifrig and Drug fail to disclose wherein the motion compensation unit configures a video direct memory access engine for access to the set of reference pixels associated with the motion reference coding unit.
However, in the same field of endeavor, Bj discloses wherein the motion compensation unit configures a video direct memory access engine for access to the set of reference pixels associated with the motion reference coding unit (Fig. 2, [0040]).
Therefore, it would have been obvious to one of ordinary skilled in the art before the effective filing date of the claimed invention to modify device disclosed by Eifrig and Drug to disclose the wherein the motion compensation unit configures a video direct memory access engine for access to the set of reference pixels associated with the motion reference coding unit.as taught by BJ, to efficiently move significant quantities of video data ([0006]).
Regarding claim 18, analyses are analogous to those presented for claim 8 and are applicable for claim 18.
Claim(s) 9 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Patent 6005980 Eifrig et al (Hereinafter referred to as “Eifrig”), in view of US 20120320970 A1-Drugeon et al (Hereinafter referred to as “Drug”), in further view of US 20050013362 A1-Pearson et al (Hereinafter referred to as “Pearson”), in further view of US 20080240240 A1-Kodama.
Regarding claim 9, Eifrig discloses the device of claim 1 (see claim 1),
Eifrig and Drug fail to disclose wherein: the current coding unit is a center of the search area around the current coding unit.
However, in the same field of endeavor, Kodama discloses wherein: the current coding unit is a center of the search area around the current coding unit (fig. 9).
Therefore, it would have been obvious to one of ordinary skilled in the art before the effective filing date of the claimed invention to modify the device disclosed by Eifrig and Drug to disclose wherein: the current coding unit is a center of the search area around the current coding unit as taught by Kodama, to reduce the coding distortion, allowing the perceptual degradation of the quality of reconstructed pictures to be suppressed ([0059]).
Regarding claim 19, analyses are analogous to those presented for claim 9 and are applicable for claim 19.
Claim(s) 25 and 26 are rejected under 35 U.S.C. 103 as being unpatentable over Patent 6005980 Eifrig et al (Hereinafter referred to as “Eifrig”), in view of US 20120320970 A1-Drugeon et al (Hereinafter referred to as “Drug”), in further view of US 20050013362 A1-Pearson et al (Hereinafter referred to as “Pearson”), in further view of US 20090219446 A1-Beric et al (Hereinafter referred to as “Beric”).
Regarding claim 25, Pearson discloses the device of claim 1, further comprising a level two (L2) memory coupled to the motion estimation unit and motion compensation unit, wherein the motion estimation unit is configurable to store data from the unpadded reference frame to the L2 memory ([0028]) Fig. 4, shows an motion estimation circuit, element 164, coupled to an external memory element 162 and several local internal buffers (memories) as stated in [0004]).
Eifrig, Drug, and Pearson fail to disclose wherein the L2 memory is shared by the motion estimation unit and the motion compensation unit.
However, in the same field of endeavor, Beric discloses wherein the L2 memory is shared by the motion estimation unit and the motion compensation unit ([0008], wherein two level memory hierarchy system for motion estimation is shown. A L0 scratchpad serves to hold the search area of the motion estimator; where the communication has to be shared among the particular processing units)
Therefore, it would have been obvious to one of ordinary skilled in the art before the effective filing date of the claimed invention to modify the device disclosed by Eifrig, Drug, and Pearson to disclose wherein the L2 memory is shared by the motion estimation unit and the motion compensation unit as taught by Beric, to educe the bandwidth of a communication with the main memory as this communication may also be used by other processing units such that the bandwidth of the communication has to be shared among the particular processing units ([0008], Beric).
Regarding claim 26, analyses are analogous to those presented for claim 25. and are applicable for claim 26.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to LERON BECK whose telephone number is (571)270-1175. The examiner can normally be reached M-F 8 am-5pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, David Czekaj can be reached at (571) 272-7327. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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LERON . BECK
Examiner
Art Unit 2487
/LERON BECK/Primary Examiner, Art Unit 2487