DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . The amendment filed 04/20/2026 has been received and considered. Claims 43-50 and 61-72 are presented for examination.
Claim Rejections -35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 43-50 and 61-72 are rejected because the claimed invention is directed to a judicial exception without significantly more.
Independent claim 43, Step 1: a method (process = 2019 PEG Step 1 = yes)
Independent claim 43, Step 2A, Prong One: claim recites:
specifying a plurality of functional circuit components for a circuit to be generated;
specifying parameters of the functional circuit component;
The limitations are substantially drawn to mental concepts: observations, evaluations, judgments, opinions. The limitations, as drafted and under their broadest reasonable interpretation, cover performance of the limitations in the mind but for the recitation of generic computer components. Information and/or data also fall within the realm of abstract ideas because information and data are intangible. See Electric Power Group1 (Electric Power hereinafter): “Information… is an intangible”.
As to the limitations “specifying a plurality of functional circuit components for a circuit to be generated", the limitations, as drafted and under their broadest reasonable interpretation, cover performance of the limitations in the mind. The specification reads (underline emphasis added):
"[0013]… a user may select a circuit design comprising a variety of functional circuit components…".
As to the limitations “specifying parameters of the functional circuit component", the limitations, as drafted and under their broadest reasonable interpretation, cover performance of the limitations in the mind. The specification reads (underline emphasis added):
"[0071]… parameters are specified for each functional circuit component… For example… a user may drag graphical representations of the functional circuit components into a circuit design canvas and enter the parameter values for each functional circuit component to form the circuit… a user may input a specification for a circuit to be generated…".
If a claim limitation, under its broadest reasonable interpretation, covers mental processes, then it falls within the "(c) Mental processes" grouping of abstract ideas (2019 PEG Step 2A, Prong One: Abstract Idea Grouping? = Yes, (c) Mental processes).
Independent claim 43, Step 2A, Prong two: As to the limitations "computer-implemented… computer"; they are recited as performing generic computer functions routinely used in computer applications.
As to the limitations "for each of one or more of the functional circuit components of the plurality of functional circuit components"; they represent no more than just “apply it” limitations, because they invoke computers or other machinery merely as a tool to perform an existing process.
As to the limitations "selecting, by a computer, based on the parameters, a predefined behavioral model corresponding to the functional circuit component having the specified parameters, wherein different parameters for a same functional circuit component result in selection of different corresponding behavioral models corresponding to different combinations of sub-circuit schematics corresponding to the functional circuit component", “executing, by the computer, a behavioral simulation of the circuit to be generated based on the selected predefined behavior models for the plurality of functional circuit components", and "generating, by the computer, a transistor level schematic from the plurality of sub-circuit schematics for the circuit", they represent no more than just “apply it” limitations, because they recite only the idea of a solution or outcome, i.e. they fail to recite details of how a solution to a problem is accomplished.
As to the limitations “selecting, by the computer, a plurality of sub-circuit schematics corresponding to the functional circuit component based on the parameters”, they describe the concept of “mere data gathering”, which corresponds to the concepts identified as abstract ideas by the courts. Data gathering, including when limited to particular content does not change its character as information, is also within the realm of abstract ideas. Data gathering has not been held by the courts to be enough to qualify as “significantly more”. See Electric Power. The specification reads (underline emphasis added):
'[0010]… when generator software 302 receives a first set of parameter values denoted here as “params_1,” a first subset of sub-circuit schematics 320-322 may be selected'
This judicial exception is not integrated into a practical application (2019 PEG Step 2A, Prong Two: Additional elements that integrate the Judicial exception/Abstract idea into a practical application? = NO).
Independent claim 43, Step 2B: As discussed with respect to Step 2A, claim recites the limitations "computer-implemented… computer", they are interpreted as drawn to a generic computer. Generic computer components recited as performing generic computer functions that are well-understood, routine and conventional activities amount to no more than implementing the abstract idea with a computerized system. The use of a computer to implement the abstract idea of a mathematical or mental algorithm has not been held by the courts to be enough to qualify as “significantly more”. The implementation on a computing system is described in the specification (underline emphasis added):
"[0080]… techniques described herein may be performed on one or more server computers… a laptop or desktop computer or other computer system that may include an input/output interface".
As to the limitations "for each of one or more of the functional circuit components of the plurality of functional circuit components", they appear to be just “apply it” limitations, because they invoke computers as a tool to perform an existing process – simply adding a general purpose computer or computer components after the fact to an abstract idea (e.g., a mathematical equation). See MPEP 2106.05 Well-Understood, Routine, Conventional Activity [R-07.2022] (d)(II): 'Performing repetitive calculations, Flook2… (recomputing or readjusting alarm limit values)'.
As discussed with respect to Step 2A, Prong two, limitations reciting only the idea of a solution or outcome are just “apply it” limitations, because these claim limitations fail to recite details of how a solution to a problem is accomplished. See MPEP 2106.05(f)(1).
As to the limitations "selecting, by a computer, based on the parameters, a predefined behavioral model corresponding to the functional circuit component having the specified parameters, wherein different parameters for a same functional circuit component result in selection of different corresponding behavioral models corresponding to different combinations of sub-circuit schematics corresponding to the functional circuit component", the limitations are so broad that little is known about how they are performed. The specification reads (underline emphasis added):
'[0071]… at 1231, parameters are specified for each functional circuit component. Functional circuit components for a circuit to be generated may be specified in a variety of ways. For example, in one embodiment, a user may drag graphical representations of the functional circuit components into a circuit design canvas and enter the parameter values for each functional circuit component to form the circuit. In other embodiments, a user may input a specification for a circuit to be generated, and a software engine (e.g., using predefined rules) may select the required functional circuit components and configure the parameters for each functional circuit component to form the circuit. At 1232, predefined behavioral models are selected based on the parameters. For instance, different parameters for a same functional circuit component (e.g., two values for amplifier gain) result in selection of different corresponding behavioral models (e.g., one model optimized for each gain value)'
As to the limitations "executing, by the computer, a behavioral simulation", they are not elaborated but merely repeated in the Specification.
As to the limitations "generating, by the computer, a transistor level schematic from the plurality of sub-circuit schematics for the circuit", the limitations are so broad that little is known about how they are performed. The specification reads:
'[0077]… user may trigger generator software to generate a transistor level schematic for the design (and a layout)'
As discussed with respect to Step 2A, claim recites data gathering, these limitations are recited at a high level of generality; and therefore, remain insignificant extra-solution activity even upon reconsideration.
Taken alone the individual additional elements do not amount to significantly more than the above-identified judicial exception (the abstract idea). Looking at the additional elements as an ordered combination adds nothing that is not already present when looking at the additional elements taken individually. There is no indication that their combination improves the functioning of a computer itself or improves any other technology (underline emphasis added). Therefore, the claim does not amount to significantly more than the abstract idea itself (2019 PEG Step 2B: NO).
Independent claims 61 and 68, Step 2A Prong One: These claims recite substantially the same elements as claim 43 and are rejected for the same reasons above. (See Independent claim 43, Step 2A Prong One above).
Independent claims 61 and 68, Step 2A Prong two and 2B: As to the further additional elements system and computer readable storage medium, they are interpreted as drawn to a generic computer. (See Independent claim 43, Step 2B above).
Dependent claims, Prong One: The claim limitations further the mental concepts of their independent claims. (See Independent claims, Step 2A, Prong One above). If a claim limitation, under its broadest reasonable interpretation, covers abstract ideas, then it falls within groupings of abstract ideas (2019 PEG Step 2A, Prong One: Abstract Idea Grouping? = Yes).
Dependent claims, Step 2A, Prong two:
As to the limitations “44/69… generating a layout for the circuit", "45/63… wherein a plurality of predefined behavioral models corresponding to particular functional circuit components having different user specified parameters are generated from characterization data from one or more automatically generated circuits comprising said functional circuit components", "46/64… modifying one or more behavioral models corresponding to particular functional circuit components having particular specified parameters based on at least a portion of the data", "47… wherein the parameters are generated", and "62… automatically generating a layout for the circuit", they represent no more than just “apply it” limitations, because they recite only the idea of a solution or outcome, i.e. they fail to recite details of how a solution to a problem is accomplished.
As to the limitations “46/64… receiving data specifying the physical behavior of at least one of the plurality of functional circuit components having particular specified parameters" and "47… user inputs”, they describe the concept of “mere data gathering”. (See Independent claim 43, Step 2A, Prong Two above).
This judicial exception is not integrated into a practical application of the exception (2019 PEG Step 2A, Prong Two: Additional elements that integrate the Judicial exception/Abstract idea into a practical application? = NO).
Dependent claims, Step 2B:
As discussed with respect to Step 2A, Prong two, limitations reciting only the idea of a solution or outcome are just “apply it” limitations, because they fail to recite details of how a solution to a problem is accomplished. See MPEP 2106.05(f)(1). Examiner notes that the "generating a layout" and "parameters are generated" limitations are not elaborated but merely repeated in the Specification.
As discussed with respect to Step 2A, claims recite data gathering, these limitations are recited at a high level of generality; and therefore, remain insignificant extra-solution activity even upon reconsideration.
The claims do not amount to significantly more than the abstract idea itself (2019 PEG Step 2B: NO).
As to claims 68-72, the claimed invention is directed to non-statutory subject matter. Claim 68 refers to "a non-transitory computer readable storage medium, which when executed, performs a method". A computer readable storage medium storing computer executable instructions, which when executed (the "instructions" not the "medium") by a computer, should store instructions for executing method steps and not perform a method. Claim should be re-worded to avoid any possible indefiniteness issues. A computer readable storage medium should not be executed.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103(a) are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Examiner would like to point out that any reference to specific figures, columns and lines should not be considered limiting in any way, the entire reference is considered to provide disclosure relating to the claimed invention.
Claims 43-50 and 61-72 are rejected under 35 U.S.C. 103(a) as being unpatentable over Salvatore Bernardo Olivadese, (Olivadese hereinafter), "Parameterized and DC-Compliant Small-Signal Macromodels of RF Circuit Blocks" (see IDS dated 06/06/2025), taken in view of Gunar Lorenz, (Lorenz hereinafter), U.S. Patent 9015016, and further in view of Henry C. Chang, (Chang hereinafter), U.S. Pre–Grant publication 20110054875.
As to claim 43, Olivadese discloses a computer-implemented (see "construction of the macromodels for all examples was performed in the MATLAB software environment, running on a notebook (2.7-GHz clock, 16-GB RAM, Windows 7, 64 bit). All circuit simulations were instead performed on a Linux server (2.6-GHz clock, 160-GB RAM), where the required circuit simulation software and related component libraries were available" in page 514, 1st paragraph) method comprising… for each of one or more of the functional circuit components of the plurality of functional circuit components: specifying parameters of the functional circuit component (see "We consider Vdd as a parameter, since the devices of our interest are typically programmable by external digital control circuitry, that may decrease or increase the power supply, e.g., to reduce power consumption. The small-signal responses of the CB depend of course on the bias point induced by the particular value that is selected for Vdd within its admissible range [Vdd,min, Vdd,max], defined in the simulation testbench" in page 519, next to last paragraph); and selecting, by a computer, based on the parameters, a predefined behavioral model corresponding to the functional circuit component having the specified parameters (see in page 509, col. 2, A. Linear Transfer Function Models:
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, wherein different parameters for a same functional circuit component result in selection of different corresponding behavioral models (see "We processed both LDO and OA by the proposed parameterized small-signal macromodeling algorithm, producing two LTFMs" in page 518, last paragraph)… and executing, by the computer, a behavioral simulation of the circuit to be generated based on the selected predefined behavior models for the plurality of functional circuit components (see "performed a transient simulation up to 0.25 ms with a circuit solverd(t) signal around its nominal (fixed) value Vdd by means of an LTFM" in page 519, next to last paragraph)…
Olivadese does not disclose, but Lorenz discloses specifying a plurality of functional circuit components for a circuit to be generated (see "system modeling environment 200 includes a schematic editor 210, a circuit simulator 220, and a system component library 230. The schematic editor 210 is used to create and/or edit a system model 250. A user selects the MEMS device 235 and the electronic components 231 and 233 from the system component library 230 and places them in a schematic view 350" in col. 10, lines 53-59).
Therefore, it would have been obvious to one of ordinary skill in this art before the effective filing date of the claimed invention to use Lorenz with Olivadese, because Lorenz points out that his invention addresses 'shortcomings in MEMS design by enabling a user to construct a MEMS device by assembling parameterized components directly in a 3-D view in a design environment. The created MEMS device model, which is used for system modeling, is automatically created by the 3-D design environment from the behavioral models of the individual MEMS components selected by the user. The MEMS device model may be automatically transferred to the system modeling environment for simulation without requiring the model to first undergo FEM. This process of creating a 3-D schematic by assembling components in a 3-D view is called "three-dimensional schematic capture"' (see col. 6, lines 4-17), and as a result, Lorenz reports that "his 3-D approach is more natural to MEMS designers, and saves time by allowing the designers to work from one 3-D view instead of alternating between a symbolic schematic view and a 3-D view. The exported MEMS device model allows for circuit simulations involving both the created MEMS device and the associated electronic circuitry in the system modeling environment. An additional benefit provided… is that the described 3-D design environment can be used in an integrated fashion with existing system modeling environments" (see col. 6, lines 18-27).
Olivadese and Lorenz do not disclose, but Chang discloses … corresponding to different combinations of sub-circuit schematics corresponding to the functional circuit component (see “[0251]… Model templates 410 are templates for the behavioral models that are created from user provided specifications 712. Behavioral models represent integrated circuits, systems, or components of integrated circuit… Then the models may be generated or regenerated from the model templates 410 to include these results… symbol templates 415 are used to create the schematic symbol or used to create the code that generates the schematic symbol based on user specifications 712. The schematic symbol may be in a proprietary database format such as Cadence's CDB or in an open format such as OpenAccess. In addition to templates including the code or symbol data, the templates include common shapes for schematic symbols for common analog, mixed-signal, digital, and RF blocks”); selecting, by the computer, a plurality of sub-circuit schematics corresponding to the functional circuit component based on the parameters; and generating, by the computer, a transistor level schematic from the plurality of sub-circuit schematics for the circuit (see “[0250]… prepackaged transistor models 315 are predefined behavior that describe the behavior of a transistor… prepackaged passive component models 316 are predefined behavior that describe passive components in a design. Example passive components are resistors, capacitors, and inductors… All of the behavior described in the prepackaged library 218 is parameterized and may be customized by the user”; "[0246]… symbol generator 104 takes information from the database 110 and produces at least one schematic symbol that the user may use in schematic drawings"; "[0015]… code and document generator may also generate… schematic symbols).
Olivadese, Lorenz, and Chang are analogous art because they are related to behavioral modeling.
Therefore, it would have been obvious to one of ordinary skill in this art before the effective filing date of the claimed invention to use Chang with Olivadese and Lorenz, because Chang discloses that "[0274]… specifications entry and output generation is shown in FIG. 21. The start 2101 denotes the starting point of the flow which is at the point when the user is prepared to enter the specifications for a design or a component. The user enters the specifications… input is parsed 2104 by the code and document generator 102 that utilizes the user input parsers 213 and the access function parsers 212 routines", and as a result, Chang reports that "[0274]… If there is an error 2105 or if at least one message needs to be communicated to the user, the errors or messages are stored in the database 110, and the errors or messages are presented to the user utilizing the specifications editor module… outputs may be models, regression tests, netlists, connect modules, symbols, 121, simulation scripts 122, and datasheets and reports 120. Messages are then displayed to the user 2107. These messages may include warnings or suggestions to the user on how to improve the output".
As to claim 44, Lorenz discloses generating a layout for the circuit (see "exported MEMS device model allows circuit simulations involving the MEMS device and associated electronic circuitry to be conducted in the system modeling environment… user may then export a parameterized layout cell to a layout editor that can be used to directly generate a layout of the MEMS device" in col. 2, lines 17-26).
Therefore, it would have been obvious to one of ordinary skill in this art before the effective filing date of the claimed invention to use Lorenz with Olivadese, (see supra).
As to claim 45, Olivadese discloses wherein a plurality of predefined behavioral models corresponding to particular functional circuit components having different user specified parameters are generated from characterization data from one or more automatically generated circuits comprising said functional circuit components (see "strategy for the extraction of a DC-compliant and parameterized small-signal macromodel… 1) Create a suitable CB characterization test bench in the adopted circuit simulation environment and apply the desired biasing circuitry to each CB pin. 2) Extract DC bias information Yˆdc,k and small-signal frequency response ˆHν,k of the CB from a set of circuit simulations… for a set of discrete parameter values λ ∈ {ˆλk, k = 1, . . . , K} and at a discrete set of frequencies ω ∈ { ων, ν = 1, . . . , N}" in page 511, col. 1, III. DC-COMPLIANT PARAMETERIZED MACROMODELING).
As to claim 46, Olivadese discloses receiving data specifying the physical behavior of at least one of the plurality of functional circuit components having particular specified parameters (see in page 509, col. 2, 2nd paragraph:
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); and modifying one or more behavioral models corresponding to particular functional circuit components having particular specified parameters based on at least a portion of the data – see in page 509, col. 2:
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As to claim 47, Olivadese discloses wherein the parameters are generated in response to user inputs (see "Figs. 16 and 17… show for the OA and the LDO the corresponding input signals at the OA noninverting input and at the LDO Vd input (top panels" in page 518, last paragraph).
As to claim 48, Olivadese discloses wherein the functional circuit components are analog functional circuit components for generating analog circuits (see "methodology… is focused on… analog and RF CBs" in page 519, 2nd paragraph).
As to claim 49, Olivadese discloses wherein the functional circuit components have a plurality of corresponding parameters, wherein different values for each of the plurality of corresponding parameters produce functional circuit components with different characteristics – see in page 509, col. 2, 3rd paragraph:
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As to claim 50, Olivadese discloses wherein the functional circuit components are one or more of:(see "The second example is the two-stage buffer shown in Fig. 7. For this test case" in page 515, col. 1, last paragraph).
As to claims 61 and 63-72, these claims recite a system and a computer readable storage medium for performing the process of claims 43-50. Olivadese discloses "construction of the macromodels for all examples was performed in the MATLAB software environment, running on a notebook (2.7-GHz clock, 16-GB RAM, Windows 7, 64 bit). All circuit simulations were instead performed on a Linux server (2.6-GHz clock, 160-GB RAM), where the required circuit simulation software and related component libraries were available" (see page 514, 1st paragraph) for performing a process that teaches claims 43-50. Therefore, claims 61 and 63-72 are rejected for the same reasons given above.
As to claim 62, Lorenz discloses automatically generating a layout for the circuit (see "exported MEMS device model allows circuit simulations involving the MEMS device and associated electronic circuitry to be conducted in the system modeling environment… user may then export a parameterized layout cell to a layout editor that can be used to directly generate a layout of the MEMS device" in col. 2, lines 17-26).
Therefore, it would have been obvious to one of ordinary skill in this art before the effective filing date of the claimed invention to use Lorenz with Olivadese, (see supra).
Response to Arguments
Regarding the rejections under 101, Applicant's arguments have been considered, but they are not persuasive. Applicant argues, (see page 7, 7th paragraph to page 9, 1st paragraph):
‘… Executing a behavioral simulation, selection sub-circuit schematics, and generating transistor level schematics, by a computer as claimed, is not an abstract idea. Accordingly, all claims meet the requirements of 35 U.S.C. 101.
Moreover, assuming arguendo that certain claim language recites an abstract idea (which it does not), additional elements clearly integrate the claims as a whole into a practical application that is a technological improvement. The claims recite a specific process to form a circuit schematic for functional circuit components based on input parameters. Circuit specification parameters are received, and the same parameters are used to select a behavior model and sub-circuits so that the behavioral model matches the selected sub-circuits. Behavioral models can thus be used to simulate different combinations of sub-circuits and the corresponding different flavors of functional circuit components.
… even if the claims as filed recited an abstract idea, that the claims as amended render this rejection moot…’
The MPEP reads (underline emphasis added):
‘2106.04… II… A… 2. Prong Two asks does the claim recite additional elements that integrate the judicial exception into a practical application?… If the additional elements in the claim integrate the recited exception into a practical application of the exception, then the claim is not directed to the judicial exception (Step 2A: NO) and thus is eligible at Pathway B… For a claim reciting a judicial exception to be eligible, the additional elements (if any) in the claim must "transform the nature of the claim" into a patent-eligible application of the judicial exception, Alice… either at Prong Two or in Step 2B’
‘2106.05(f) Mere Instructions To Apply An Exception [R-10.2019]… (1) Whether the claim recites only the idea of a solution or outcome i.e., the claim fails to recite details of how a solution to a problem is accomplished. The recitation of claim limitations that attempt to cover any solution to an identified problem with no restriction on how the result is accomplished and no description of the mechanism for accomplishing the result, does not integrate a judicial exception into a practical application or provide significantly more because this type of recitation is equivalent to the words "apply it"…
By way of example, in Intellectual Ventures… In addition to the abstract idea, the claims also recited the additional element of modifying the underlying XML document in response to modifications made in the dynamic document.… Although the claims purported to modify the underlying XML document in response to modifications made in the dynamic document, nothing in the claims indicated what specific steps were undertaken other than merely using the abstract idea in the context of XML documents. The court thus held the claims ineligible, because the additional limitations provided only a result-oriented solution and lacked details as to how the computer performed the modifications, which was equivalent to the words "apply it"’
‘2106.07(a)… II… After identifying the judicial exception in the rejection, identify any additional elements (features/limitations/steps) recited in the claim beyond the judicial exception and explain why they do not integrate the judicial exception into a practical application and do not add significantly more to the exception’
About "additional elements", BASCOM3, (BASCOM hereinafter) reads:
“the ‘elements of each claim both individually and ‘as an ordered combination’ to determine whether the additional elements [beyond those that recite the abstract idea”.
Examiner's response: Applicant’s argument is not persuasive, because Applicant’s arguments conflate judicial exception(s) or abstract idea(s) (Step 2A, Prong One) with additional elements (Step 2A, Prong Two or Step 2B). Throughout the prosecution of this application, in accordance with the guidance set forth in MPEP (supra) and in several decisions, BASCOM (supra) for example, the Examiner does not conflate judicial exception(s) or abstract idea(s) (Step 2A, Prong One) with additional elements (Step 2A, Prong Two or Step 2B).
Applicant argues that the additional elements are not judicial exception(s) or abstract idea(s), but the additional elements were addressed in Examiner's rejection Step 2A, Prong Two and/or Step 2B. Applicant's arguments do not address these limitations as additional elements.
As to the limitations "generating, by the computer, a transistor level schematic from the plurality of sub-circuit schematics for the circuit", they are recited so generically (no details whatsoever are provided) that they represent no more than just “apply it” limitations, because they are so broad that little is known about how they are performed. These limitations recite only the idea of a solution or outcome i.e., they fail to recite details of how a solution to a problem is accomplished. There is no elaboration of any special meanings for these amended limitations in the claims and Application description. See specification paragraph [0077]. (See MPEP 2106.05(f)(1) supra and Independent claim 43, Step 2B above).
Therefore, the rejections are maintained.
As to claims 68-72, Applicant provided no arguments for the rejection under 101 that the claims are non-statutory, because a computer readable storage medium should not be executed.
Regarding the arguments with respect to the rejection under 103, Applicant’s arguments with respect to the independent claims have been fully considered, but they are not persuasive. Applicant argues that the prior art disclosures in the previous rejection fail to teach the newly added limitations. These features of Applicants' claims and arguments were newly added. The previous Office Action could not have pointed out disclosures of a limitation that was not claimed before. Claims are rejected over Olivadese taken in view of Lorenz and further in view of Chang instead of Olivadese taken in view of Lorenz, and Chang is newly cited. See rejection supra.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Examiner would like to point out that any reference to specific figures, columns and lines should not be considered limiting in any way, the entire reference is considered to provide disclosure relating to the claimed invention.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JUAN CARLOS OCHOA whose telephone number is (571)272-2625. The examiner can normally be reached Mondays, Tuesdays, Thursdays, and Fridays 9:30AM - 8:00 PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Renee Chavez can be reached at 571-270-1104. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JUAN C OCHOA/Primary Examiner, Art Unit 2186
1 Electric Power Group, LLC v. Alstom S.A., 119 USPQ2d 1739 Fed. Cir. 2016
2 Flook, 437 U.S. at 594, 198 USPQ2d at 199
3 BASCOM Global Internet Services, Inc. v. AT&T Mobility LLC, U.S. Court of Appeals for the Federal Circuit, No. 2015-1763 (June 27, 2016)
Prosecution Insights