DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . The Response to Election/Restriction filed 10/07/2025 has been received and considered. Claims 43-50 are elected with traverse and presented for examination. Claims 1-42 and 51-60 are canceled. Claims 61-72 are new. Claims 43-50 and 61-72 are presented for examination.
Examiner Yaritza H. Perez Bermudez is no longer prosecuting this application. Examiner Juan Carlos Ochoa is taking over the prosecution of this application.
Claim Rejections -35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 43-50 and 61-72 are rejected because the claimed invention is directed to a judicial exception without significantly more.
Independent claim 43, Step 1: a method (process = 2019 PEG Step 1 = yes)
Independent claim 43, Step 2A, Prong One: claim recites:
specifying a plurality of functional circuit components for a circuit to be generated;
specifying parameters of the functional circuit component;
and selecting, based on the parameters, a predefined behavioral model corresponding to the functional circuit component having the specified parameters, wherein different parameters for a same functional circuit component result in selection of different corresponding behavioral models
The limitations are substantially drawn to mental concepts. The limitations, as drafted and under their broadest reasonable interpretation, cover performance of the limitations in the mind but for the recitation of generic computer components. Information and/or data also fall within the realm of abstract ideas because information and data are intangible. See Electric Power Group1 (Electric Power hereinafter): “Information… is an intangible”.
As to the limitations “specifying a plurality of functional circuit components for a circuit to be generated", the limitations, as drafted and under their broadest reasonable interpretation, cover performance of the limitations in the mind. The specification reads (underline emphasis added):
"[0013]… a user may select a circuit design comprising a variety of functional circuit components…".
As to the limitations “specifying parameters of the functional circuit component", the limitations, as drafted and under their broadest reasonable interpretation, cover performance of the limitations in the mind. The specification reads (underline emphasis added):
"[0071]… parameters are specified for each functional circuit component… For example… a user may drag graphical representations of the functional circuit components into a circuit design canvas and enter the parameter values for each functional circuit component to form the circuit… a user may input a specification for a circuit to be generated…".
If a claim limitation, under its broadest reasonable interpretation, covers mental processes, then it falls within the "(c) Mental processes" grouping of abstract ideas (2019 PEG Step 2A, Prong One: Abstract Idea Grouping? = Yes, (c) Mental processes—concepts performed in the human mind (including an observation, evaluation, judgment, opinion).
Independent claim 43, Step 2A, Prong two: The claim recites the additional element computer-implemented; it is recited as performing generic computer functions routinely used in computer applications.
As to the limitations "for each of one or more of the functional circuit components of the plurality of functional circuit components"; these limitations represent no more than just “apply it” limitations, because they invoke computers or other machinery merely as a tool to perform an existing process.
As to the limitations “executing a behavioral simulation of the circuit to be generated based on the selected predefined behavior models for the plurality of functional circuit components", they represent no more than just “apply it” limitations, because they recite only the idea of a solution or outcome, i.e. these claim limitations fail to recite details of how a solution to a problem is accomplished.
This judicial exception is not integrated into a practical application (2019 PEG Step 2A, Prong Two: Additional elements that integrate the Judicial exception/Abstract idea into a practical application? = NO).
Independent claim 43, Step 2B: As discussed with respect to Step 2A, claim 1 recites the additional element computer-implemented, it is interpreted as drawn to a generic computer. Generic computer components recited as performing generic computer functions that are well-understood, routine and conventional activities amount to no more than implementing the abstract idea with a computerized system. The use of a computer to implement the abstract idea of a mathematical or mental algorithm has not been held by the courts to be enough to qualify as “significantly more”. The implementation on a computing system is described in the specification (underline emphasis added):
"[0080]… techniques described herein may be performed on one or more server computers… a laptop or desktop computer or other computer system that may include an input/output interface".
As to the limitations "for each of one or more of the functional circuit components of the plurality of functional circuit components", these limitations appear to be just “apply it” limitations, because they invoke computers as a tool to perform an existing process – simply adding a general purpose computer or computer components after the fact to an abstract idea (e.g., a mathematical equation). See MPEP 2106.05 Well-Understood, Routine, Conventional Activity [R-07.2022] (d)(II): 'Performing repetitive calculations, Flook2… (recomputing or readjusting alarm limit values)'.
As discussed with respect to Step 2A, Prong two, limitations reciting only the idea of a solution or outcome are just “apply it” limitations, because these claim limitations fail to recite details of how a solution to a problem is accomplished. See MPEP 2106.05(f)(1). Examiner notes that "executing a behavioral simulation" is not elaborated but merely repeated in the Specification.
Taken alone the individual additional elements do not amount to significantly more than the above-identified judicial exception (the abstract idea). Looking at the additional elements as an ordered combination adds nothing that is not already present when looking at the additional elements taken individually. There is no indication that their combination improves the functioning of a computer itself or improves any other technology (underline emphasis added). Therefore, the claim does not amount to significantly more than the abstract idea itself (2019 PEG Step 2B: NO).
Independent claims 61 and 68, Step 2A Prong two and 2B: As to the further additional elements system and computer readable storage medium, they are interpreted as drawn to a generic computer. (See Independent claim 43, Step 2B above).
Dependent claims, Prong One: The claim limitations further the mental concepts of their independent claims. (See Independent claims, Step 2A, Prong One above). If a claim limitation, under its broadest reasonable interpretation, covers abstract ideas, then it falls within groupings of abstract ideas (2019 PEG Step 2A, Prong One: Abstract Idea Grouping? = Yes).
Dependent claims, Step 2A, Prong two:
As to the limitations “44/69… generating a mask for the circuit, wherein the mask is generated based on the behavioral simulation of the circuit and not a transistor level simulation of the circuit", "45/63… wherein a plurality of predefined behavioral models corresponding to particular functional circuit components having different user specified parameters are generated from characterization data from one or more automatically generated circuits comprising said functional circuit components", "46/64… modifying one or more behavioral models corresponding to particular functional circuit components having particular specified parameters based on at least a portion of the data", "47… wherein the parameters are generated", and "62… automatically generating a transistor level schematic and a layout for the circuit based on the behavioral simulation of the circuit and not a transistor level simulation of the circuit", they represent no more than just “apply it” limitations, because they recite only the idea of a solution or outcome, i.e. these claim limitations fail to recite details of how a solution to a problem is accomplished.
As to the limitations “46/64… receiving data specifying the physical behavior of at least one of the plurality of functional circuit components having particular specified parameters" and "47… user inputs”, these limitations describe the concept of “mere data gathering”, which corresponds to the concepts identified as abstract ideas by the courts. Data gathering, including when limited to particular content does not change its character as information, is also within the realm of abstract ideas. Data gathering has not been held by the courts to be enough to qualify as “significantly more”. See Electric Power.
This judicial exception is not integrated into a practical application of the exception (2019 PEG Step 2A, Prong Two: Additional elements that integrate the Judicial exception/Abstract idea into a practical application? = NO).
Dependent claims, Step 2B:
As discussed with respect to Step 2A, Prong two, limitations reciting only the idea of a solution or outcome are just “apply it” limitations, because these claim limitations fail to recite details of how a solution to a problem is accomplished. See MPEP 2106.05(f)(1). Examiner notes that the "generating a mask", "parameters are generated", and "automatically generating a transistor level schematic and a layout for the circuit based on the behavioral simulation of the circuit and not a transistor level simulation of the circuit" limitations recite only the idea of a solution or outcome. "Generating a mask", "parameters are generated", and "automatically generating… a layout" are not elaborated but merely repeated in the Specification.
As discussed with respect to Step 2A, claims recite data gathering, these limitations are recited at a high level of generality; and therefore, remain insignificant extra-solution activity even upon reconsideration.
The claims do not amount to significantly more than the abstract idea itself (2019 PEG Step 2B: NO).
As to claims 68-72, the claimed invention is directed to non-statutory subject matter. Claim 68 refers to "a non-transitory computer readable storage medium, which when executed, performs a method". A computer readable storage medium storing computer executable instructions, which when executed (the "instructions" not the "medium") by a computer should store instructions for executing method steps and not perform a method. Claim should be re-worded to avoid any possible indefiniteness issues.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103(a) are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Examiner would like to point out that any reference to specific figures, columns and lines should not be considered limiting in any way, the entire reference is considered to provide disclosure relating to the claimed invention.
Claims 43-50 and 61-72 are rejected under 35 U.S.C. 103(a) as being unpatentable over Salvatore Bernardo Olivadese, (Olivadese hereinafter), "Parameterized and DC-Compliant Small-Signal Macromodels of RF Circuit Blocks" (see IDS dated 06/06/2025), taken in view of Gunar Lorenz, (Lorenz hereinafter), U.S. Patent 9015016.
As to claim 43, Olivadese discloses a computer-implemented (see "construction of the macromodels for all examples was performed in the MATLAB software environment, running on a notebook (2.7-GHz clock, 16-GB RAM, Windows 7, 64 bit). All circuit simulations were instead performed on a Linux server (2.6-GHz clock, 160-GB RAM), where the required circuit simulation software and related component libraries were available" in page 514, 1st paragraph) method comprising… for each of one or more of the functional circuit components of the plurality of functional circuit components: specifying parameters of the functional circuit component (see "We consider Vdd as a parameter, since the devices of our interest are typically programmable by external digital control circuitry, that may decrease or increase the power supply, e.g., to reduce power consumption. The small-signal responses of the CB depend of course on the bias point induced by the particular value that is selected for Vdd within its admissible range [Vdd,min, Vdd,max], defined in the simulation testbench" in page 519, next to last paragraph); and selecting, based on the parameters, a predefined behavioral model corresponding to the functional circuit component having the specified parameters (see in page 509, col. 2, A. Linear Transfer Function Models:
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, wherein different parameters for a same functional circuit component result in selection of different corresponding behavioral models (see "We processed both LDO and OA by the proposed parameterized small-signal macromodeling algorithm, producing two LTFMs" in page 518, last paragraph); and executing a behavioral simulation of the circuit to be generated based on the selected predefined behavior models for the plurality of functional circuit components (see "We then performed a transient simulation up to 0.25 ms with a circuit solverd(t) signal around its nominal (fixed) value Vdd by means of an LTFM" in page 519, next to last paragraph).
Olivadese does not disclose, but Lorenz discloses specifying a plurality of functional circuit components for a circuit to be generated (see "system modeling environment 200 includes a schematic editor 210, a circuit simulator 220, and a system component library 230. The schematic editor 210 is used to create and/or edit a system model 250. A user selects the MEMS device 235 and the electronic components 231 and 233 from the system component library 230 and places them in a schematic view 350" in col. 10, lines 53-59).
Olivadese and Lorenz are analogous art because they are related to behavioral modeling.
Therefore, it would have been obvious to one of ordinary skill in this art before the effective filing date of the claimed invention to use Lorenz with Olivadese, because Lorenz points out that his invention addresses 'shortcomings in MEMS design by enabling a user to construct a MEMS device by assembling parameterized components directly in a 3-D view in a design environment. The created MEMS device model, which is used for system modeling, is automatically created by the 3-D design environment from the behavioral models of the individual MEMS components selected by the user. The MEMS device model may be automatically transferred to the system modeling environment for simulation without requiring the model to first undergo FEM. This process of creating a 3-D schematic by assembling components in a 3-D view is called "three-dimensional schematic capture"' (see col. 6, lines 4-17), and as a result, Lorenz reports that "his 3-D approach is more natural to MEMS designers, and saves time by allowing the designers to work from one 3-D view instead of alternating between a symbolic schematic view and a 3-D view. The exported MEMS device model allows for circuit simulations involving both the created MEMS device and the associated electronic circuitry in the system modeling environment. An additional benefit provided… is that the described 3-D design environment can be used in an integrated fashion with existing system modeling environments" (see col. 6, lines 18-27).
As to claim 44, Lorenz discloses generating a mask for the circuit, wherein the mask is generated based on the behavioral simulation of the circuit and not a transistor level simulation of the circuit (see "exported MEMS device model allows circuit simulations involving the MEMS device and associated electronic circuitry to be conducted in the system modeling environment… user may then export a parameterized layout cell to a layout editor that can be used to directly generate a layout of the MEMS device" in col. 2, lines 17-26).
As to claim 45, Olivadese discloses wherein a plurality of predefined behavioral models corresponding to particular functional circuit components having different user specified parameters are generated from characterization data from one or more automatically generated circuits comprising said functional circuit components (see "strategy for the extraction of a DC-compliant and parameterized small-signal macromodel… 1) Create a suitable CB characterization test bench in the adopted circuit simulation environment and apply the desired biasing circuitry to each CB pin. 2) Extract DC bias information Yˆdc,k and small-signal frequency response ˆHν,k of the CB from a set of circuit simulations… for a set of discrete parameter values λ ∈ {ˆλk, k = 1, . . . , K} and at a discrete set of frequencies ω ∈ { ων, ν = 1, . . . , N}" in page 511, col. 1, III. DC-COMPLIANT PARAMETERIZED MACROMODELING).
As to claim 46, Olivadese discloses receiving data specifying the physical behavior of at least one of the plurality of functional circuit components having particular specified parameters (see in page 509, col. 2, 2nd paragraph:
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); and modifying one or more behavioral models corresponding to particular functional circuit components having particular specified parameters based on at least a portion of the data – see in page 509, col. 2:
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As to claim 47, Olivadese discloses wherein the parameters are generated in response to user inputs (see "Figs. 16 and 17. These figures show for the OA and the LDO the corresponding input signals at the OA noninverting input and at the LDO Vd input (top panels" in page 518, last paragraph).
As to claim 48, Olivadese discloses wherein the functional circuit components are analog functional circuit components for generating analog circuits (see "methodology… is focused on… analog and RF CBs" in page 519, 2nd paragraph).
As to claim 49, Olivadese discloses wherein the functional circuit components have a plurality of corresponding parameters, wherein different values for each of the plurality of corresponding parameters produce functional circuit components with different characteristics – see in page 509, col. 2, 3rd paragraph:
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As to claim 50, Olivadese discloses wherein the functional circuit components are one or more of:(see "The second example is the two-stage buffer shown in Fig. 7. For this test case" in page 515, col. 1, last paragraph).
As to claims 61 and 63-72, these claims recite a system and a computer readable storage medium for performing the process of claims 43-50. Olivadese discloses "construction of the macromodels for all examples was performed in the MATLAB software environment, running on a notebook (2.7-GHz clock, 16-GB RAM, Windows 7, 64 bit). All circuit simulations were instead performed on a Linux server (2.6-GHz clock, 160-GB RAM), where the required circuit simulation software and related component libraries were available" (see page 514, 1st paragraph) for performing a process that teaches claims 43-50. Therefore, claims 61 and 63-72 are rejected for the same reasons given above.
As to claim 62, Lorenz discloses automatically generating a transistor level schematic (see "a user in the 3-D MEMS design environment may request a simulation and the symbol representing the MEMS device may be automatically exported, connected in a schematic… without additional user action" in col. 11, lines 17-21) and a layout for the circuit based on the behavioral simulation of the circuit and not a transistor level simulation of the circuit (see "exported MEMS device model allows circuit simulations involving the MEMS device and associated electronic circuitry to be conducted in the system modeling environment… user may then export a parameterized layout cell to a layout editor that can be used to directly generate a layout of the MEMS device" in col. 2, lines 17-26).
Response to Arguments
Regarding the Election/Restrictions, Applicant affirms election with traverse to prosecute Group V. Applicant provided no arguments. The requirement is still deemed proper and is therefore made FINAL.
Conclusion
Examiner would like to point out that any reference to specific figures, columns and lines should not be considered limiting in any way, the entire reference is considered to provide disclosure relating to the claimed invention.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JUAN CARLOS OCHOA whose telephone number is (571)272-2625. The examiner can normally be reached Mondays, Tuesdays, Thursdays, and Fridays 9:30AM - 7:00 PM.
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/JUAN C OCHOA/Primary Examiner, Art Unit 2186
1 Electric Power Group, LLC v. Alstom S.A., 119 USPQ2d 1739 Fed. Cir. 2016
2 Flook, 437 U.S. at 594, 198 USPQ2d at 199