DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-26 are pending in this application; claims 1, 3-19 and 20 are currently amended; claims 2 and 19 are original; claims 21-26 are new.
Specification
The specification is objected to as failing to provide proper antecedent basis for the claimed subject matter. See 37 CFR 1.75(d)(1) and MPEP § 608.01(o). See the rejection under 35 U.S.C. 112 below.
Claim Objections
Claims 7-12 are objected to under 37 C.F.R. 1.71(a) which requires “full, clear, concise, and exact terms” as to enable any person skilled in the art or science to which the invention or discovery appertains, or with which it is most nearly connected, to make and use the same. The following should be corrected.
A. Claim 7 line 5 includes excessive parentheses that are unnecessary because there are no additional variables in between the parentheses and only serve to create confusion.
B. Claim 8 line 16 includes excessive parentheses that are unnecessary because there are no additional variables in between the parentheses and only serve to create confusion. Claims 9-12 inherit the same deficiency as claim 8 by reason of dependence.
Applicant is advised that should claims 23 and 25 be found allowable, claims 24 and 26 respectively will be objected to under 37 CFR 1.75 as being a substantial duplicate thereof. When two claims in an application are duplicates or else are so close in content that they both cover the same thing, despite a slight difference in wording, it is proper after allowing one claim to object to the other as being a substantial duplicate of the allowed claim. See MPEP § 608.01(m).
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1-26 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Claim 1 recites “one or more calculation circuits configured to: calculate a penalty component for each of the N particles based on the first variables stored in the first memory and the M constrained solutions stored in the constrained solution memory; set the M constrained solutions in the constrained solution memory; update, for each of the N virtual particles, the first variable and the second variable sequentially and alternately every unit time from a start time to an end time; output a solution for the 0-1 optimization problem based on the first variable of each of the N particles at the end time, wherein the N binary variables are 0 or 1,each of the M constrained solutions includes N constrained values, the N constrained values correspond to the N binary variables, each of the N constrained values is 0 or 1,the N particles correspond to the N binary variables, the one or more calculation circuits are configured to, for each of the N particles in an updating process of the every unit time, update the first variable based on the second variable, change the first variable to a first value when the first variable is smaller than the first value, and change the first variable to a second value when the first variable is greater than the second value, the second value being greater than the first value, and update the second variable based on the first variable of each of the N particles and a penalty component of the target particle, and the penalty component of the target particle represents momentum per unit time for shifting the position of the target particle toward an opposite polarity, and indicates a value that is greater as the first variable corresponding to the target particle is closer to the M constrained solutions”. These limitations lack written description support because the specification fails to disclose a calculation circuit configured to perform all the recited functions. Applicant cited Fig. 1 and corresponding description for the support for the amendments; however, a review of Fig. 1 and corresponding description discloses that the claimed functions are performed by different circuits (i.e., four different circuits circuit 26, 27, 28 and 29). See page 14 line 24 to page 16 line 22. Therefore, the specification fails to disclose one (or two or three) calculation circuits configured to perform all the recited functions. Claim 21 recites substantially the same limitations and is rejected for the same reason.
Claim 22 recites “A computer program product comprising a non-transitory computer- readable medium including programmed instructions, the instructions causing a computer to function as an information processing apparatus for solving a 0-1 optimization problem”. These limitations lack written description support because the specification fails to disclose a computer program product comprising a non-transitory computer- readable medium including programmed instructions, the instructions causing a computer to function as an information processing apparatus for solving a 0-1 optimization problem. The specification does not mention any computer program product or any non-transitory computer- readable medium storing instructions. Claims 23 and 25 recite substantially the same limitations and are rejected for the same reason. Claims 24 and 26 recite a server comprising: the computer program product according to claims 23 and 25 respectively and are also rejected for the same reason.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-26 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more.
Under Step 1, claims 1-20 recite a device and, therefore, is a machine; claim 21 recites a series of steps and, therefore is a process; claims 22, 23 and 25 recites a computer program product and, therefore, is an article of manufacture; claims 24 and 26 recites a server and therefore, is a machine.
Under Step 2A prong 1, claim 1 recites
A calculation device for solving a 0-1 optimization problem in which a quadratic function containing N binary variables is an objective function, N being an integer equal to or greater than 2, the calculation device comprising:
an interaction coefficient memory configured to store an interaction matrix including coupling coefficients of the quadratic function;
a constrained solution memory configured to store M constrained solutions, M being an integer equal to or greater than 1;
a first memory configured to store, for each of virtual N particles, a first variable representing a position of a target particle;
a second memory configured to store, for each of the N particles, a second variable representing a momentum of the target particle;
one or more calculation circuits configured to:
calculate a penalty component for each of the N particles based on the first variables stored in the first memory and the M constrained solutions stored in the constrained solution memory
set the M constrained solutions in the constrained solution memory;
update, for each of the N virtual particles, the first variable and the second variable sequentially and alternately every unit time from a start time to an end time; and
output a solution for the 0-1 optimization problem on based on the first variable of each of the N particles at the end time,
wherein
the N binary variables are 0 or 1,
each of the M constrained solutions includes N constrained values,
the N constrained values correspond to the N binary variables,
each of the N constrained values is 0 or 1,
the N particles correspond to the N binary variables,
the one or more calculation circuits are configured to, for each of the N particles in an updating process of the every unit time,
update the first variable on based on the second variable,
change the first variable to a first value when the first variable is smaller than the first value, and change the first variable to a second value when the first variable is greater than the second value, the second value being greater than the first value, and
update the second variable on based on the first variable of each of the N particles and a penalty component of the target particle, and
the penalty component of the target particle
represents momentum per unit time for shifting the position of the target particle toward an opposite polarity, and
indicates a value that is greater as the first variable corresponding to the target particle is closer to the M constrained solutions.
The above underlined limitations of calculating a solution to a binary optimization problem amounts to processing mathematical relationships/calculations and falls within the “Mathematical Concepts” grouping of abstract ideas. See at least page 9 lines 12-15 including Equations (7-1) and (7-2) that are repeatedly calculated to update the first variable and the second variable from the start time to the end time. Accordingly, the claim is directed to recite an abstract idea.
Under step 2A prong 2, the claim recites the following additional elements: an interaction coefficient memory configured to store an interaction matrix including coupling coefficients of the quadratic function; a constrained solution memory configured to store M constrained solutions, M being an integer equal to or greater than 1; a first memory configured to store, for each of virtual N particles, a first variable representing a position of a target particle; a second memory configured to store, for each of the N particles, a second variable representing a momentum of the target particle; one or more calculation circuits configured to: set the M constrained solutions in the constrained solution memory; output a solution for the 0-1 optimization problem on based on the first variable of each of the N particles at the end time. However, the additional elements of “an interaction coefficient memory”, “a constrained solution memory”, “a first memory”, “a second memory” and “one or more calculation circuits” are recited at a high-level of generality (i.e., as generic memories for storing input/output data for the calculations; and as a generic calculation circuit for performing calculations on input data to generate output data) such that they amount to no more than merely reciting the words “apply it” (or an equivalent) with the judicial exception or merely as tools to implement the abstract idea. Use of a computer or other machinery in its ordinary capacity for economic or other tasks (e.g., to receive, store, or transmit data) or simply adding a general purpose computer or computer components after the fact to an abstract idea (e.g., a fundamental economic practice or mathematical equation) does not integrate a judicial exception into a practical application or provide significantly more. See MPEP 2106.05(f) for more information. The additional elements of “store an interaction matrix including coupling coefficients of the quadratic function”, “store M constrained solutions, M being an integer equal to or greater than 1”, “store, for each of virtual N particles, a first variable representing a position of a target particle”, “store, for each of the N particles, a second variable representing a momentum of the target particle”, “set the M constrained solutions” and “output a solution for the 0-1 optimization problem on based on the first variable of each of the N particles at the end time” are merely adding insignificant extra-solution activities. The additional elements do not, individually or in combination, integrate the exception into a practical application. Accordingly, the claim is not integrated into a practical application.
Under step 2B, claim 1 does not include additional elements that, individually or in combination, are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, the additional elements of “an interaction coefficient memory”, “a constrained solution memory”, “a first memory”, “a second memory” and “one or more calculation circuits” are recited at a high-level of generality (i.e., as generic memories for storing input/output data for the calculations; and as a generic calculation circuit for performing calculations on input data to generate output data) such that they amount to no more than merely reciting the words “apply it” (or an equivalent) with the judicial exception or merely as tools to implement the abstract idea. Use of a computer or other machinery in its ordinary capacity for economic or other tasks (e.g., to receive, store, or transmit data) or simply adding a general purpose computer or computer components after the fact to an abstract idea (e.g., a fundamental economic practice or mathematical equation) does not integrate a judicial exception into a practical application or provide significantly more. See MPEP 2106.05(f) for more information. The additional elements of “store an interaction matrix including coupling coefficients of the quadratic function”, “store M constrained solutions, M being an integer equal to or greater than 1”, “store, for each of virtual N particles, a first variable representing a position of a target particle”, “store, for each of the N particles, a second variable representing a momentum of the target particle”, “set the M constrained solutions” and “output a solution for the 0-1 optimization problem on based on the first variable of each of the N particles at the end time” are merely adding insignificant extra-solution activities. See MPEP 2106.05(d)(II) which states that the courts have recognized computer functions such as “Receiving or transmitting data over a network”, “Electronic recordkeeping”, and “Storing and retrieving information in memory” as well‐understood, routine, and conventional functions when they are claimed in a merely generic manner (e.g., at a high level of generality) or as insignificant extra-solution activity. The claim does not recite additional elements that alone or in combination amount to an inventive concept. Accordingly, the claim does not amount to significantly more than the abstract idea.
Under step 2A prong 1, claims 2-20 recite the same abstract idea as claim 1 by reason of dependence. Further, claim 2 recites further details of the abstract idea of the penalty component and how the penalty component is calculated; claim 3 recites further details of the abstract idea of changing the value of the first variable to a first or second value based on a threshold value; claim 4 recites further details of the abstract idea of how to calculate the first variable; claim 5 recites further details of the abstract idea of how to calculate the second variable; claim 6 recites further details of the abstract idea of how to calculate the penalty component corresponding to the i-th particle at the target time; claim 7 recites further details of the abstract idea of how to calculate the penalty component corresponding to the i-th particle at the previous time; claims 8-12 recites further details of the abstract idea of how to calculate the penalty component; claim 13 recites further abstract idea of performing a calculation process multiple times; claim 14 recites further details when the calculation process is performed; claim 15 recites further abstract ideas and further details when the optimization problem is changed; claim 16 recites further details of the abstract idea of how the second variable is updated; claims 17-19 recites further details of the abstract idea of how the calculation process is executed; claim 20 recites further abstract idea of how to derive the optimization problem which falls within the “Mathematical Concepts” grouping of abstract ideas. In particular claims 2-8, 13, and 16 do not include additional elements that would require further analysis under step 2A prong 2 and step 2B. Accordingly, the claims are directed to recite an abstract idea.
Under step 2A prong 2, claim 9 recites the following additional elements: M first partial circuits; claim 10 recites the following additional elements: N second partial circuits, and a total multiplier circuit; claim 11 recites the following additional elements: M third partial circuits, a total adder circuit, and a coefficient multiplier circuit; claim 12 recites the following additional elements: N fourth partial circuits; claim 14 recites the following additional elements: add the calculated solution for the 0-1 optimization problem as one of the M constrained solutions; claim 15 recites the following additional elements: erase the M constrained solutions when the 0-1 optimization problem is changed, and set the penalty component of the target particle to 0 in a calculation process initially performed after the 0-1 optimization problem is updated; claim 17 recites the following additional elements: a host device configured as an information processing device including a memory configured to store the M constrained solutions, and a calculation instruction circuit configured to give an execution instruction, transmit the M constrained solutions stored in the memory, and cause to internally set the transmitted M constrained solutions, and give an execution instruction; claim 18 recites the following additional elements: give the calculation device an instruction; claim 19 recites the following additional elements: the memory is configured to store the 0-1 optimization problem, to clear the internally set M constrained solutions, and transmit the updated 0-1 optimization problem and give the calculation device an execution instruction; claim 20 recites the following additional elements: a receiving circuit configured to receive input data from an external device via a network; an input conversion circuit; an output conversion circuit configured to generate output data; and a transmitting circuit configured to transmit the output data generated by the output conversion circuit to the external device via the network. However, the additional elements of “M first partial circuits” in claim 9; “N second partial circuits” and “a total multiplier circuit” in claim 10; “M third partial circuits”, “a total adder circuit” and “a coefficient multiplier circuit” in claim 11; “N fourth partial circuits” in claim 12; “a host device”, “a memory” and “a calculation instruction circuit” in claim 17; and “a receiving circuit”, “an input conversion circuit”, “an output conversion circuit” and “a transmitting circuit” in claim 20 are recited at a high-level of generality (i.e., as first partial circuits for each calculating portion of Equation 109; as second partial circuits for each calculating the term inside the parentheses in Equation 109; as a multiplier for performing a multiplication; as third partial circuits for performing a portion of Equation 110; as an adder for adding; as a multiplier for multiplying; as third partial circuits for performing a portion of Equations 110-111; as a host device including a memory for storing data and an instruction circuit for transmitting data and instructions; as a receiving circuit for receiving data; as a conversion circuit for converting data; and as a transmitting circuit for transmitting data) such that they amount to no more than merely reciting the words “apply it” (or an equivalent) with the judicial exception or merely as tools to implement the abstract idea or mere instructions using a generic computer component. Use of a computer or other machinery in its ordinary capacity for economic or other tasks (e.g., to receive, store, or transmit data) or simply adding a general purpose computer or computer components after the fact to an abstract idea (e.g., a fundamental economic practice or mathematical equation) does not integrate a judicial exception into a practical application or provide significantly more. Furthermore, the circuit components in claims 9-12 merely follow from the Equations recited in the claims such that they amount to no more than merely as objects in which the mathematical calculations operates. Integral use of a machine to achieve performance of a method may integrate the recited judicial exception into a practical application or provide significantly more, in contrast to where the machine is merely an object on which the method operates, which does not integrate the exception into a practical application or provide significantly more. See MPEP 2106.05(b) for more information. The additional elements of “to add the calculated solution for the 0-1 optimization problem as one of the M constrained solutions” in claim 14; “erase the M constrained solutions when the 0-1 optimization problem is changed” and “set the penalty component of the target particle to 0 in a calculation process initially performed after the 0-1 optimization problem is updated” in claim 15; “store the M constrained solutions”, “give an execution instruction”, “transmit the M constrained solutions”, “internally set the transmitted M constrained solutions” and “give an execution instruction” in claim 17; “give an instruction” in claim 18; “store the 0-1 optimization problem”, ”clear the internally set M constrained solutions”, “transmit the updated 0-1 optimization problem” and “give an execution instruction” in claim 19; and “receive input data from an external device via a network”, “generate output data” and “transmit the output data generated to the external device via the network” in claim 20 are merely adding insignificant extra-solution activities. Further, the additional elements of “give an execution instruction” to the calculation device, “transmit the M constrained solutions” to the calculation device, cause the calculation device to “internally set the transmitted M constrained solutions” and “give an execution instruction” to the calculation device in claim 17; “give an instruction” to the calculation device in claim 18; “transmit the updated 0-1 optimization problem” to the calculation device and “give an execution instruction” to the calculation device in claim 19; and “receive input data from an external device via a network”, “generate output data” to be applied to the external device and “transmit the output data generated to the external device via the network” in claim 20 are merely generally linking the use of a judicial exception to a particular technological environment or field of use that includes a host device sending data and/or instructions to be executed to the calculation device and by limiting the insignificant extra-solution activities to a particular data source and/or particular data type. See MPEP 2106.05(h) for more information. The additional elements do not, individually or in combination, integrate the exception into a practical application. Accordingly, the claims are not integrated into a practical application.
Under step 2B, claims 9-12, 14-15 and 17-20 a do not include additional elements that, individually or in combination, are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, the additional elements of “M first partial circuits” in claim 9; “N second partial circuits” and “a total multiplier circuit” in claim 10; “M third partial circuits”, “a total adder circuit” and “a coefficient multiplier circuit” in claim 11; “N fourth partial circuits” in claim 12; “a host device”, “a memory” and “a calculation instruction circuit” in claim 17; and “a receiving circuit”, “an input conversion circuit”, “an output conversion circuit” and “a transmitting circuit” in claim 20 are recited at a high-level of generality (i.e., as first partial circuits for each calculating portion of Equation 109; as second partial circuits for each calculating the term inside the parentheses in Equation 109; as a multiplier for performing a multiplication; as third partial circuits for performing a portion of Equation 110; as an adder for adding; as a multiplier for multiplying; as third partial circuits for performing a portion of Equations 110-111; as a host device including a memory for storing data and an instruction circuit for transmitting data and instructions; as a receiving circuit for receiving data; as a conversion circuit for converting data; and as a transmitting circuit for transmitting data) such that they amount to no more than merely reciting the words “apply it” (or an equivalent) with the judicial exception or merely as tools to implement the abstract idea or mere instructions using a generic computer component. Use of a computer or other machinery in its ordinary capacity for economic or other tasks (e.g., to receive, store, or transmit data) or simply adding a general purpose computer or computer components after the fact to an abstract idea (e.g., a fundamental economic practice or mathematical equation) does not integrate a judicial exception into a practical application or provide significantly more. Furthermore, the circuit components in claims 9-12 merely follow from the Equations recited in the claims such that they amount to no more than merely as objects in which the mathematical calculations operates. Integral use of a machine to achieve performance of a method may integrate the recited judicial exception into a practical application or provide significantly more, in contrast to where the machine is merely an object on which the method operates, which does not integrate the exception into a practical application or provide significantly more. See MPEP 2106.05(b) for more information. The additional elements of “to add the calculated solution for the 0-1 optimization problem as one of the M constrained solutions” in claim 14; “erase the M constrained solutions when the 0-1 optimization problem is changed” and “set the penalty component of the target particle to 0 in a calculation process initially performed after the 0-1 optimization problem is updated” in claim 15; “store the M constrained solutions”, “give an execution instruction”, “transmit the M constrained solutions”, “internally set the transmitted M constrained solutions” and “give an execution instruction” in claim 17; “give an instruction” in claim 18; “store the 0-1 optimization problem”, ”clear the internally set M constrained solutions”, “transmit the updated 0-1 optimization problem” and “give an execution instruction” in claim 19; and “receive input data from an external device via a network”, “generate output data” and “transmit the output data generated to the external device via the network” in claim 20 are merely adding insignificant extra-solution activities. See MPEP 2106.05(d)(II) which states that the courts have recognized computer functions such as “Receiving or transmitting data over a network”, “Electronic recordkeeping”, and “Storing and retrieving information in memory” as well‐understood, routine, and conventional functions when they are claimed in a merely generic manner (e.g., at a high level of generality) or as insignificant extra-solution activity. Further, the additional elements of “give an execution instruction” to the calculation device, “transmit the M constrained solutions” to the calculation device, cause the calculation device to “internally set the transmitted M constrained solutions” and “give an execution instruction” to the calculation device in claim 17; “give an instruction” to the calculation device in claim 18; “transmit the updated 0-1 optimization problem” to the calculation device and “give an execution instruction” to the calculation device in claim 19; and “receive input data from an external device via a network”, “generate output data” to be applied to the external device and “transmit the output data generated to the external device via the network” in claim 20 are merely generally linking the use of a judicial exception to a particular technological environment or field of use that includes a host device sending data and/or instructions to be executed to the calculation device and by limiting the insignificant extra-solution activities to a particular data source and/or particular data type. See MPEP 2106.05(h) for more information. The claims do not recite additional elements that alone or in combination amount to an inventive concept. Accordingly, the claims do not amount to significantly more than the abstract idea.
Regarding claim 21, it is directed to a method practiced by the device of claim 1. All steps performed by the method of claim 21 would be practiced by the device of claim 1. Claim 1 analysis applies equally to claim 21.
Regarding claim 22, it is directed to a computer program product comprising a non-transitory computer readable medium including programmed instructions, the instructions causing a computer to function as the device of claim 1. Claim 1 analysis applies equally to claim 22.
Regarding claim 23, it is directed to a computer program product comprising a non-transitory computer readable medium including circuit information described in a hardware description language and representing a configuration of a circuit, the circuit information causes the circuit to function as the device of claim 1. Claim 1 analysis applies equally to claim 23.
Regarding claim 25, it is directed to a computer program product comprising a non-transitory computer readable medium including circuit information written in a reconfigurable semiconductor apparatus for operating the reconfigurable semiconductor apparatus, wherein the circuit information causes the reconfigurable semiconductor apparatus to function as the device of claim 1. Claim 1 analysis applies equally to claim 25.
Regarding claims 24 and 26, they are directed to a server comprising the computer program product of claims 23 and 25 respectively. Claim 1 analysis applies equally to claims 24 and 26.
Allowable Subject Matter
Claims 1-26 would be allowable if rewritten to overcome the 35 U.S.C. 101 rejection discussed above, and if claims 5-12 and 14-15 are rewritten to overcome the 35 U.S.C. 112(b) rejections discussed above.
The following is a statement of reasons for the indication of allowable subject matter:
The reasons for the indication of allowable subject matter are the same reasons provided in the non-final office action submitted on 03/25/2026.
Response to Arguments
Applicant's arguments filed 06/22/2026, see remarks page 26-35, with respect to the 35 U.S.C. 101 rejection discussed above, have been fully considered but they are not persuasive.
Applicant argues the following:
1.) claim 1 recites a particular machine comprising multiple interacting memories and calculation circuits as a hardware implementation of the process. Further, claims 9-12 recite particular circuit arrangements.
Response: Examiner respectfully disagrees. The memories are merely being used for their normal purposes or ordinary capacity or storing data. Further, the one or more calculation circuits is recited at a high-level of generality (i.e., as a generic calculation circuit for performing calculations on input data to generate output data) such that it amounts to no more than merely reciting the words “apply it” (or an equivalent) with the judicial exception. Use of a computer or other machinery in its ordinary capacity for economic or other tasks (e.g., to receive, store, or transmit data) or simply adding a general purpose computer or computer components after the fact to an abstract idea (e.g., a fundamental economic practice or mathematical equation) does not integrate a judicial exception into a practical application or provide significantly more. See MPEP 2106.05(f) for more information. Furthermore, the circuit components in claims 9-12 merely follow from the Equations recited in the claims such that they amount to no more than merely as objects in which the mathematical calculations operates. Integral use of a machine to achieve performance of a method may integrate the recited judicial exception into a practical application or provide significantly more, in contrast to where the machine is merely an object on which the method operates, which does not integrate the exception into a practical application or provide significantly more. See MPEP 2106.05(b) for more information.
2.) under step 2A prong Two and step 2B, the claims provide an improvement because the claims provide specific technical solutions to problems in the field of artificial intelligence and machine learning. Specifically, the Specification explains that the invention "adds a penalty (P) to the equations of motion ... so that the same solutions as M constrained solutions are not calculated", and that the penalty component "represents the momentum per unit time for shifting the position of the i-th particle toward the opposite polarity from the current position," and "indicates a value that is greater as the position of the i-th particle is closer to M constrained solutions". This improvement enables the device to "efficiently calculate multiple solutions ... with a small computational cost" as cited paragraphs [0045, 0050 and 0092] of Applicant's published Application (US 2023/0315801 A1). Furthermore, the alleged improvement is reflected in the claim by reciting one or more calculation circuits configured to "calculate a penalty component for each of the N particles based on the first variables stored in the first memory and the M constrained solutions stored in the constrained solution memory," and "update the second variable based on the first variable of each of the N particles and a penalty component of the target particle."
Response: Examiner respectfully disagrees. The features of “calculate a penalty component for each of the N particles based on the first variables and the M constrained solutions” and “update the second variable based on the first variable of each of the N particles and a penalty component of the target particle, and the penalty component of the target particle represents momentum per unit time for shifting the position of the target particle toward an opposite polarity, and indicates a value that is greater as the first variable corresponding to the target particle is closer to the M constrained solutions” is part of the abstract idea. Therefore, any alleged improvement is provided by the abstract idea. See MPEP 2106.05(a): “It is important to note, the judicial exception alone cannot provide the improvement”. See also MPEP 2106.05 subsection I: An inventive concept "cannot be furnished by the unpatentable law of nature (or natural phenomenon or abstract idea) itself." Further, the alleged improvement is an improvement to the abstract idea itself (i.e., the addition of the penalty (P) to the equations of motion enables a more efficient calculations) rather than an improvement in the functioning of a computer or in technology. MPEP 2106.05(a) subsection II: “However, it is important to keep in mind that an improvement in the abstract idea itself (e.g. a recited fundamental economic concept) is not an improvement in technology.”
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Carlo Waje whose telephone number is (571)272-5767. The examiner can normally be reached 9:00-6:00 M-F.
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/Carlo Waje/Examiner, Art Unit 2151 (571)272-5767
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