DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
The present application, 17900132, filed 08/31/2022 claims foreign priority to 2022-021303, filed 02/15/2022.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 08/31/2022, 07/28/2023 and 01/27/2025 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The following title is suggested: Improved Simulated Bifurcation Algorithm that Adds a Penalty Term to the Equations of Momentum.
Claim Objections
Claims 1-20 are objected to under 37 C.F.R. 1.71(a) which requires “full, clear, concise, and exact terms” as to enable any person skilled in the art or science to which the invention or discovery appertains, or with which it is most nearly connected, to make and use the same. The following should be corrected.
A. Claim 1 recites “the basis” in lines 11, 19 and 23. There is insufficient antecedent basis for this limitation in the claim. For purposes of examination, each instance is interpreted as a basis instead. Claim 20 recites a similar limitation in lines 5 and 7 and are objected to for the same reason. Claims 2-20 inherit the same deficiency as claim 1 by reason of dependence.
B. In claim 5 line 18, “
x
j
(
t
Δ
t
)
” should read “
x
j
(
t
+
Δ
t
)
” because
x
j
(
t
Δ
t
)
is not included in any of the recited Equations. Claims 6-12 inherit the same deficiency as claim 5 by reason of dependence.
C. In claim 17 line 12, “an execution instruction” should read “the execution instruction” instead because an execution instruction in line 6. Claim 19 recites a similar limitation in line 8 and is objected to for the same reason. Claims 18-20 inherit the same deficiency as claim 17 by reason of dependence.
D. In claim 18 line 4, “the set M constrained solutions” should read “the M constrained solutions” instead for consistency of claim terminologies.
E. In claim 20 line 7, “a solution” should “the solution” instead.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 5-12 and 14-15 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 5 recites “p(t) is a predetermined function with t as a variable, increases as t increases, becomes 0 when t is the start time, and becomes 1 when t is the end time” in lines 19-20. This limitation is defining a term that is not recited in any of the recited equations. Equations 103-106 do not include any p(t) component. Therefore, it is unclear what p(t) is supposed to be referring to. Further, clarification is required. Perhaps Applicant may want to move this limitation in claims 6-7 which recite
p
k
(
t
)
. Claims 6-12 inherit the same deficiency as claim 5 by reason of dependence.
Claim 10 recites “in Equation (119)” in line 11. There is insufficient antecedent basis for this limitation in the claim. There is no previous recitation of Equation (119). For purposes of examination, this is interpreted as in Equation (109) instead.
Claim 14 recites “the calculated solution” in line 2. There is insufficient antecedent basis for this limitation in the claim. There is no previous recitation of a calculated solution. For purposes of examination, this is interpreted as a calculated solution. Claim 15 inherit the same deficiency as claim 14 by reason of dependence.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more.
Under Step 1, claims 1-20 recite a device and, therefore, is a machine.
Under Step 2A prong 1, claim 1 recites
A calculation device for solving a 0-1 optimization problem in which a quadratic function containing N binary variables is an objective function, N being an integer equal to or greater than 2, the calculation device comprising:
a setting circuit configured to set M constrained solutions, M being an integer equal to or greater than 1;
an updating circuit configured to update, for each of virtual N particles, a first variable representing a position of a target particle and a second variable representing a momentum of the target particle sequentially and alternately every unit time from a start time to an end time; and
an output circuit configured to output a solution for the 0-1 optimization problem on the basis of the first variable of each of the N particles at the end time,
wherein the N binary variables are 0 or 1,
each of the M constrained solutions includes N constrained values,
the N constrained values correspond to the N binary variables,
each of the N constrained values is 0 or 1,
the N particles correspond to the N binary variables,
the updating circuit is configured to, for each of the N particles in an updating process of the every unit time,
update the first variable on the basis of the second variable,
change the first variable to a first value when the first variable is smaller than the first value, and change the first variable to a second value when the first variable is greater than the second value, the second value being greater than the first value, and
update the second variable on the basis of the first variable of each of the N particles and a penalty component of the target particle, and
the penalty component of the target particle
represents momentum per unit time for shifting the position of the target particle toward an opposite polarity, and
indicates a value that is greater as the first variable corresponding to the target particle is closer to the M constrained solutions.
The above underlined limitations of calculating a solution to a binary optimization problem amounts to processing mathematical relationships/calculations and falls within the “Mathematical Concepts” grouping of abstract ideas. See at least page 9 lines 12-15 including Equations (7-1) and (7-2) that are repeatedly calculated to update the first variable and the second variable from the start time to the end time. Accordingly, the claim is directed to recite an abstract idea.
Under step 2A prong 2, the claim recites the following additional elements: a setting circuit configured to set M constrained solutions, M being an integer equal to or greater than 1; an updating circuit; and an output circuit configured to output a solution for the 0-1 optimization problem. However, the additional elements of “a setting circuit”, “an updating circuit” and “an output circuit” are recited at a high-level of generality (i.e., as a setting circuit for setting solutions; as an updating circuit for updating; and as an output circuit for outputting in a manner that merely restates a circuit that performs the function being formed and does not limit the mathematical calculations to a particular circuit implementation with specific structure) such that they amount to no more than merely reciting the words “apply it” (or an equivalent) with the judicial exception or merely as tools to implement the abstract idea. Use of a computer or other machinery in its ordinary capacity for economic or other tasks (e.g., to receive, store, or transmit data) or simply adding a general purpose computer or computer components after the fact to an abstract idea (e.g., a fundamental economic practice or mathematical equation) does not integrate a judicial exception into a practical application or provide significantly more. See MPEP 2106.05(f) for more information. The additional elements of “set M constrained solutions” and “output a solution for the 0-1 optimization problem” are merely adding insignificant extra-solution activities. The additional elements do not, individually or in combination, integrate the exception into a practical application. Accordingly, the claim is not integrated into a practical application.
Under step 2B, claim 1 does not include additional elements that, individually or in combination, are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, the additional elements of “a setting circuit”, “an updating circuit” and “an output circuit” are recited at a high-level of generality (i.e., as a setting circuit for setting solutions; as an updating circuit for updating; and as an output circuit for outputting in a manner that merely restates a circuit that performs the function being formed and does not limit the mathematical calculations to a particular circuit implementation with specific structure) such that they amount to no more than merely reciting the words “apply it” (or an equivalent) with the judicial exception or merely as tools to implement the abstract idea. Use of a computer or other machinery in its ordinary capacity for economic or other tasks (e.g., to receive, store, or transmit data) or simply adding a general purpose computer or computer components after the fact to an abstract idea (e.g., a fundamental economic practice or mathematical equation) does not integrate a judicial exception into a practical application or provide significantly more. See MPEP 2106.05(f) for more information. The additional elements of “set M constrained solutions” and “output a solution for the 0-1 optimization problem” are merely adding insignificant extra-solution activities. See MPEP 2106.05(d)(II) which states that the courts have recognized computer functions such as “Receiving or transmitting data over a network”, “Electronic recordkeeping”, and “Storing and retrieving information in memory” as well‐understood, routine, and conventional functions when they are claimed in a merely generic manner (e.g., at a high level of generality) or as insignificant extra-solution activity. The claim does not recite additional elements that alone or in combination amount to an inventive concept. Accordingly, the claim does not amount to significantly more than the abstract idea.
Under step 2A prong 1, claims 2-20 recite the same abstract idea as claim 1 by reason of dependence. Further, claim 2 recites further details of the abstract idea of the penalty component and how the penalty component is calculated; claim 3 recites further details of the abstract idea of changing the value of the first variable to a first or second value based on a threshold value; claim 4 recites further details of the abstract idea of how to calculate the first variable; claim 5 recites further details of the abstract idea of how to calculate the second variable; claim 6 recites further details of the abstract idea of how to calculate the penalty component corresponding to the i-th particle at the target time; claim 7 recites further details of the abstract idea of how to calculate the penalty component corresponding to the i-th particle at the previous time; claims 8-12 recites further details of the abstract idea of how to calculate the penalty component; claim 13 recites further abstract idea of performing a calculation process multiple times; claim 14 recites further details when the calculation process is performed; claim 15 recites further abstract ideas and further details when the optimization problem is changed; claim 16 recites further details of the abstract idea of how the second variable is updated; claims 17-19 recites further details of the abstract idea of how the calculation process is executed; claim 20 recites further abstract idea of how to derive the optimization problem which falls within the “Mathematical Concepts” grouping of abstract ideas. In particular claims 2-7 do not include additional elements that would require further analysis under step 2A prong 2 and step 2B. Accordingly, the claims are directed to recite an abstract idea.
Under step 2A prong 2, claim 8 recites the following additional elements: a penalty calculation circuit including a preceding stage circuit and a subsequent stage circuit; claim 9 recites the following additional elements: M first partial circuits; claim 10 recites the following additional elements: N second partial circuits, and a total multiplier circuit; claim 11 recites the following additional elements: M third partial circuits, a total adder circuit, and a coefficient multiplier circuit; claim 12 recites the following additional elements: N fourth partial circuits; claim 13 recites the following additional elements: a control circuit; claim 14 recites the following additional elements: an addition circuit configured to add the calculated solution for the 0-1 optimization problem as one of the M constrained solutions; claim 15 recites the following additional elements: an erasure circuit configured to erase the M constrained solutions when the 0-1 optimization problem is changed, and set the penalty component of the target particle to 0 in a calculation process initially performed after the 0-1 optimization problem is updated; claim 16 recites the following additional elements: an enabling circuit; claim 17 recites the following additional elements: a host device configured as an information processing device including a memory configured to store the M constrained solutions, and a calculation instruction circuit configured to give an execution instruction, transmit the M constrained solutions stored in the memory, and cause to internally set the transmitted M constrained solutions, and give an execution instruction; claim 18 recites the following additional elements: give the calculation device an instruction; claim 19 recites the following additional elements: the memory is configured to store the 0-1 optimization problem, to clear the internally set M constrained solutions, and transmit the updated 0-1 optimization problem and give the calculation device an execution instruction; claim 20 recites the following additional elements: a receiving circuit configured to receive input data from an external device via a network; an input conversion circuit; an output conversion circuit configured to generate output data; and a transmitting circuit configured to transmit the output data generated by the output conversion circuit to the external device via the network. However, the additional elements of “a penalty calculation circuit”, “a preceding stage circuit” and “a subsequent stage circuit” in claim 8; “M first partial circuits” in claim 9; “N second partial circuits” and “a total multiplier circuit” in claim 10; “M third partial circuits”, “a total adder circuit” and “a coefficient multiplier circuit” in claim 11; “N fourth partial circuits” in claim 12; “a control circuit” in claim 13; “an addition circuit” in claim 14; “an erasure circuit” in claim 15; “an enabling circuit” in claim 16; “a host device”, “a memory” and “a calculation instruction circuit” in claim 17; and “a receiving circuit”, “an input conversion circuit”, “an output conversion circuit” and “a transmitting circuit” in claim 20 are recited at a high-level of generality (i.e., as a penalty calculation circuit for calculating the penalty component including a first stage circuit to calculate M penalty values using Equation 109 and a second stage circuit to calculate the penalty component of each N particle using Equations 110-111; as first partial circuits for each calculating portion of Equation 109; as second partial circuits for each calculating the term inside the parentheses in Equation 109; as a multiplier for performing a multiplication; as third partial circuits for performing a portion of Equation 110; as an adder for adding; as a multiplier for multiplying; as third partial circuits for performing a portion of Equations 110-111; as a control circuit for controlling the calculation process; as an addition circuit for adding a solution to the M constrained solutions; as an erasure circuit for erasing the M constrained solutions; as an enabling circuit for enabling when the second variable can be updated; as a host device including a memory for storing data and an instruction circuit for transmitting data and instructions; as a receiving circuit for receiving data; as a conversion circuit for converting data; and as a transmitting circuit for transmitting data) such that they amount to no more than merely reciting the words “apply it” (or an equivalent) with the judicial exception or merely as tools to implement the abstract idea or mere instructions using a generic computer component. Use of a computer or other machinery in its ordinary capacity for economic or other tasks (e.g., to receive, store, or transmit data) or simply adding a general purpose computer or computer components after the fact to an abstract idea (e.g., a fundamental economic practice or mathematical equation) does not integrate a judicial exception into a practical application or provide significantly more. Furthermore, the circuit components in claims 8-12 are merely follows from the Equations recited in the claim such that they amount to no more than merely objects in which the mathematical calculations operates. Integral use of a machine to achieve performance of a method may integrate the recited judicial exception into a practical application or provide significantly more, in contrast to where the machine is merely an object on which the method operates, which does not integrate the exception into a practical application or provide significantly more. See MPEP 2106.05(b) for more information. The additional elements of “to add the calculated solution for the 0-1 optimization problem as one of the M constrained solutions” in claim 14; “erase the M constrained solutions when the 0-1 optimization problem is changed” and “set the penalty component of the target particle to 0 in a calculation process initially performed after the 0-1 optimization problem is updated” in claim 15; “store the M constrained solutions”, “give an execution instruction”, “transmit the M constrained solutions”, “internally set the transmitted M constrained solutions” and “give an execution instruction” in claim 17; “give an instruction” in claim 18; “store the 0-1 optimization problem”, ”clear the internally set M constrained solutions”, “transmit the updated 0-1 optimization problem” and “give an execution instruction” in claim 19; and “receive input data from an external device via a network”, “generate output data” and “transmit the output data generated to the external device via the network” in claim 20 are merely adding insignificant extra-solution activities. Further, the additional elements of “give an execution instruction” to the calculation device, “transmit the M constrained solutions” to the calculation device, cause the calculation device to “internally set the transmitted M constrained solutions” and “give an execution instruction” to the calculation device in claim 17; “give an instruction” to the calculation device in claim 18; “transmit the updated 0-1 optimization problem” to the calculation device and “give an execution instruction” to the calculation device in claim 19; and “receive input data from an external device via a network”, “generate output data” to be applied to the external device and “transmit the output data generated to the external device via the network” in claim 20 are merely generally linking the use of a judicial exception to a particular technological environment or field of use that includes a host device sending data and/or instructions to be executed to the calculation device and by limiting the insignificant extra-solution activities to a particular data source and/or particular data type. See MPEP 2106.05(h) for more information. The additional elements do not, individually or in combination, integrate the exception into a practical application. Accordingly, the claims are not integrated into a practical application.
Under step 2B, claims 8-20 do not include additional elements that, individually or in combination, are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, the additional elements of “a penalty calculation circuit”, “a preceding stage circuit” and “a subsequent stage circuit” in claim 8; “M first partial circuits” in claim 9; “N second partial circuits” and “a total multiplier circuit” in claim 10; “M third partial circuits”, “a total adder circuit” and “a coefficient multiplier circuit” in claim 11; “N fourth partial circuits” in claim 12; “a control circuit” in claim 13; “an addition circuit” in claim 14; “an erasure circuit” in claim 15; “an enabling circuit” in claim 16; “a host device”, “a memory” and “a calculation instruction circuit” in claim 17; and “a receiving circuit”, “an input conversion circuit”, “an output conversion circuit” and “a transmitting circuit” in claim 20 are recited at a high-level of generality (i.e., as a penalty calculation circuit for calculating the penalty component including a first stage circuit to calculate M penalty values using Equation 109 and a second stage circuit to calculate the penalty component of each N particle using Equations 110-111; as first partial circuits for each calculating portion of Equation 109; as second partial circuits for each calculating the term inside the parentheses in Equation 109; as a multiplier for performing a multiplication; as third partial circuits for performing a portion of Equation 110; as an adder for adding; as a multiplier for multiplying; as third partial circuits for performing a portion of Equations 110-111; as a control circuit for controlling the calculation process; as an addition circuit for adding a solution to the M constrained solutions; as an erasure circuit for erasing the M constrained solutions; as an enabling circuit for enabling when the second variable can be updated; as a host device including a memory for storing data and an instruction circuit for transmitting data and instructions; as a receiving circuit for receiving data; as a conversion circuit for converting data; and as a transmitting circuit for transmitting data) such that they amount to no more than merely reciting the words “apply it” (or an equivalent) with the judicial exception or merely as tools to implement the abstract idea or mere instructions using a generic computer component. Use of a computer or other machinery in its ordinary capacity for economic or other tasks (e.g., to receive, store, or transmit data) or simply adding a general purpose computer or computer components after the fact to an abstract idea (e.g., a fundamental economic practice or mathematical equation) does not integrate a judicial exception into a practical application or provide significantly more. Furthermore, the circuit components in claims 8-12 are merely follows from the Equations recited in the claim such that they amount to no more than merely objects in which the mathematical calculations operates. Integral use of a machine to achieve performance of a method may integrate the recited judicial exception into a practical application or provide significantly more, in contrast to where the machine is merely an object on which the method operates, which does not integrate the exception into a practical application or provide significantly more. See MPEP 2106.05(b) for more information. The additional elements of “to add the calculated solution for the 0-1 optimization problem as one of the M constrained solutions” in claim 14; “erase the M constrained solutions when the 0-1 optimization problem is changed” and “set the penalty component of the target particle to 0 in a calculation process initially performed after the 0-1 optimization problem is updated” in claim 15; “store the M constrained solutions”, “give an execution instruction”, “transmit the M constrained solutions”, “internally set the transmitted M constrained solutions” and “give an execution instruction” in claim 17; “give an instruction” in claim 18; “store the 0-1 optimization problem”, ”clear the internally set M constrained solutions”, “transmit the updated 0-1 optimization problem” and “give an execution instruction” in claim 19; and “receive input data from an external device via a network”, “generate output data” and “transmit the output data generated to the external device via the network” in claim 20 are merely adding insignificant extra-solution activities. See MPEP 2106.05(d)(II) which states that the courts have recognized computer functions such as “Receiving or transmitting data over a network”, “Electronic recordkeeping”, and “Storing and retrieving information in memory” as well‐understood, routine, and conventional functions when they are claimed in a merely generic manner (e.g., at a high level of generality) or as insignificant extra-solution activity. Further, the additional elements of “give an execution instruction” to the calculation device, “transmit the M constrained solutions” to the calculation device, cause the calculation device to “internally set the transmitted M constrained solutions” and “give an execution instruction” to the calculation device in claim 17; “give an instruction” to the calculation device in claim 18; “transmit the updated 0-1 optimization problem” to the calculation device and “give an execution instruction” to the calculation device in claim 19; and “receive input data from an external device via a network”, “generate output data” to be applied to the external device and “transmit the output data generated to the external device via the network” in claim 20 are merely generally linking the use of a judicial exception to a particular technological environment or field of use that includes a host device sending data and/or instructions to be executed to the calculation device and by limiting the insignificant extra-solution activities to a particular data source and/or particular data type. See MPEP 2106.05(h) for more information. The claims do not recite additional elements that alone or in combination amount to an inventive concept. Accordingly, the claims do not amount to significantly more than the abstract idea.
Allowable Subject Matter
Claims 1-20 would be allowable if rewritten to overcome the 35 U.S.C. 101 rejection discussed above, and if claims 5-12 and 14-15 are rewritten to overcome the 35 U.S.C. 112(b) rejections discussed above.
The following is a statement of reasons for the indication of allowable subject matter:
Goto et al. (NPL – “High-performance combinatorial optimization based on classical mechanics”) is the closest prior art found. Goto et al. discloses a calculation device for solving a binary optimization problem in which a quadratic function containing N variables is an objective function comprising an updating circuit configured to update, for each of virtual N particles, a first variable representing a position of a target particle and a second variable representing a momentum of the target particle sequentially and alternately every unit time from a start time to an end time; and an output circuit configured to output a solution for the 0-1 optimization problem on the basis of the first variable of each of the N particles at the end time, wherein the N binary variables are 0 or 1, the N particles correspond to the N binary variables, the updating circuit is configured to, for each of the N particles in an updating process of the every unit time, update the first variable on the basis of the second variable, change the first variable to a first value when the first variable is smaller than the first value, and change the first variable to a second value when the first variable is greater than the second value, the second value being greater than the first value, and update the second variable on the basis of the first variable of each of the N particles. Further, Goto discloses setting M constrained solutions each including N constrained values corresponding to the N binary variables having a value of 0 or 1. (see at least Equations 1-18 and corresponding description under the “Results” and “Methods” section). However, neither Equations 15 nor 17 shows the updating rule for
y
i
includes a penalty component. Therefore, Goto fails explicitly teach or suggest the features of update the second variable on the basis of the first variable of each of the N particles and “a penalty component of the target particle, and the penalty component of the target particle represents momentum per unit time for shifting the position of the target particle toward an opposite polarity, and indicates a value that is greater as the first variable corresponding to the target particle is closer to the M constrained solutions” as recited in claim 1. Goto et al. is cited in the IDS submitted on 08/31/2022.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Kanao et al. (US 20220283780 A1) and Suzuki (US 20240095300 A1) are both related to an improved simulated bifurcation algorithm for solving a 0-1 combinatorial-optimization-problem.
Goto et al. (US 20190266212 A1) is related to a simulated bifurcation algorithm for solving a 0-1 combinatorial-optimization-problem. Goto is cited in the IDS submitted on 08/31/2022.
Steinhauser et al. (NPL – “Solving the Optimal Trading Trajectory Problem Using Simulated Bifurcation”) generally related to solving an integer portfolio and trading trajectory problem using the simulated bifurcation algorithm.
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