Prosecution Insights
Last updated: May 29, 2026
Application No. 17/900,326

METHODS AND APPARATUS TO MANAGE PROCESSOR INTERRUPTS

Final Rejection §103§OTHER
Filed
Aug 31, 2022
Examiner
PEYTON, TAMMARA R
Art Unit
2184
Tech Center
2100 — Computer Architecture & Software
Assignee
Intel Corporation
OA Round
2 (Final)
91%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
97%
With Interview

Examiner Intelligence

Grants 91% — above average
91%
Career Allowance Rate
868 granted / 956 resolved
+35.8% vs TC avg
Moderate +6% lift
Without
With
+6.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
14 currently pending
Career history
973
Total Applications
across all art units

Statute-Specific Performance

§101
2.1%
-37.9% vs TC avg
§103
75.6%
+35.6% vs TC avg
§102
8.4%
-31.6% vs TC avg
§112
0.8%
-39.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 956 resolved cases

Office Action

§103 §OTHER
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 1, 8, 15, and 22 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kasichaninula (US 2019/0121781A1) and in view of Sivakumar et al., (US 11,425,196). It has been noted that, a claimed invention is unpatentable if the differences between it and the prior art are "such that the subject matter as a whole would have been obvious at the time the invention was made to a person having ordinary skill in the art." 35 U.S.C. § 103(a) (2000); KSRInt'lr. Teleflex Inc., 127 S.Ct. 1727, 1734 (2007); Graham v.John Deere Co., 383 U.S. 1, 13-14 (1966). In Graham, the Court held that that the obviousness analysis is bottomed on several basic factual inquiries: "[(1)] the scope and content of the prior art are to be determined; [(2)] differences between the prior art and the claims at issue are to be ascertained; and [(3)] the level of ordinary skill in the pertinent art resolved." 383 U.S. at 17. See also KSR, 127 S.Ct. at 1734. "The combination of familiar elements according to known methods is likely to be obvious when it does no more; than yield predictable results." KSR, at 1739. "When a work is available in one field of endeavor, design incentives and other market forces can prompt variations of it, either in the same field or in a different one. If a person of ordinary skill in the art can implement a predictable variation, § 103 likely bars its patentability." Id. at 1740. "For the same reason, if a technique has been used to improve one device, and a person of ordinary skill in the art would recognize that it would improve similar devices in the same way, using the technique is obvious unless its actual application is beyond his or her skill." Id. "Under the correct analysis, any need or problem known in the field of endeavor at the time of invention and addressed by the patent can provide a reason for combining the elements in the manner claimed." Id. 11742. As per claim 1, Kasichainula an apparatus comprising: at least one memory; ([0011-0021] and Fig. 1 and 2) instructions; and at least one processor circuit of a network interface card (NIC) (Kasichainula: [0011-0021] and Fig. 1 and 2) to execute the instructions to: receive a packet; ([0011-0021] and Fig. 1 and 2) determine a traffic class of the packet based on a priority field in the packet; (Kasichainula teaches that the number of look-up queues can correspond to a different traffic class where each different traffic class has a differing quality of service ([0055]) whereas a data packet can be transmitted from the packet buffer for which the data packet was requested by the scheduler 424 at the pre-fetch time); route selectively delay (“Using the VLAN ID or other identification marker, the queues can be mapped to various traffic classes based on the priority to provide quality of service. For example, one queue may include packets that are to be delivered in real time, without delay, other queues may include “best effort” packets that can be delayed and are not urgent. The stratification of traffic classes can be extended to match the number of queues created within the NIC,” [0024]. Further, Kasichainula further teaches “..retrieval of a new or changing data location in memory at launch time of the data would result in delays or offsets from the time determinism the enhanced gate control list accomplished with the scheduler,” [0067]) delivery of an [[the]] interrupt based on the traffic class (Kasichainula: [0053-0054 & 0040] Fig. 2 and 4 the EGCL 426 includes a number of look-up queues, where each of the number of look-up queues includes a number of rows in which data packet information can be stored for retrieval by the scheduler 424. In an example, the number of look-up queues can correspond to a different traffic class where each different traffic class has a differing quality of service); and cause delivery of send the interrupt to a central processing unit (CPU) after the delay. (Kasichainula, [0067]) Kasichainula teaches cause delivery of send the interrupt to a central processing unit (CPU) after the delay but does not expressly teach wherein traffic class of the packet based on a priority field in the packet, but does disclose using an VLAN ID or other identification marker, the queues can be mapped to various traffic classes based on the priority to provide quality of service. For example, one queue may include packets that are to be delivered in real time, without delay, other queues may include “best effort” packets that can be delayed and are not urgent. Nonetheless, Sivakumar discloses embedding a priority code point (PCP) tag into a header of a data packet based on a specific traffic class and current bandwidth assigned to the PCP tag. (col. 5, lines 20-45, col. 7, lines 50-col. 8, lines 1-33) Note Fig. 2 of Sivakumar PNG media_image1.png 481 743 media_image1.png Greyscale Kasichainula and Sivakumar are analogous because they are from the same field of endeavor, computer network architecture and traffic packet management. Before the effective filing date of the claimed invention, it would have been obvious to one of ordinary skill in the art, having the teachings of Kasichainula before him or her, to modify Kasichainula’s device by incorporating Sivakumar’s used of a priority tag (priority code point (PCP)) based on the different classes of traffic with Kasichainula’s internal packet buffer of a NIC in concert with the scheduler 104. That in combination Sivakumar’s PCP and Kasichainula’s NIC, can be used to prioritize as desired a scheduled time interval specific to the different class types of traffic data. Therein data may have a specific time interval based on the requested quality of service identified by the PCP for that packet (Kasichainula, [0014 & 0019]) and therein minimize delays. (Sivakumar – col. 5, lines 62-66) Accordingly, a combination that only unites old elements with no change in the respective functions of those old elements, and the combination of those elements yields predictable results; absent evidence that the modifications necessary to affect the combination of elements is uniquely challenging or difficult for one of ordinary skilled in the art, the claim is unpatentable as obvious under 35 U.S.C. 103fa). Ex Parte Smith, 88 USPO.2d at 1518-19 (BPAI, 2007) (citing KSA, 127 S.Ct. at 1740, 82 USPQ2d at 1396. As per claim 8, see the rejection for claim 1. As per claim 15, see the rejection for claim 1. As per claim 22, Kasichainula teaches an apparatus (Kasichainula: para. [0011-0021] and Fig. 1 and 2) comprising: at least one memory; instructions; and processor circuitry to execute the instructions to: receive a packet (Kasichainula: para. [0053-0054 & 0040] Fig. 2 and 4 the EGCL 426 includes a number of look-up queues, where each of the number of look-up queues includes a number of rows in which data packet information can be stored for retrieval by the scheduler 424. In an example, the number of look-up queues can correspond to a different traffic class where each different traffic class has a differing quality of service); decode a priority field of the packet to associate the interrupt with a traffic class (Sivakumar discloses embedding a priority code point (PCP) tag into a header of a data packet based on a specific traffic class and current bandwidth assigned to the PCP tag. col. 5, lines 20-45, col. 7, lines 50-col. 8, lines 1-33), wherein the priority field is included in a data header of the packet (Sivakumar, Fig. 2), and the priority field is decoded into one of eight traffic classes (Kasichainula, see multiple classes in Fig.2); and perform interrupt (via scheduler in Sivakumar or Kasichainula) moderation based on the traffic class. (Sivakumar’s used of a priority tag (priority code point (PCP)) based on the different classes of traffic, (col. 5, lines 20-45, col. 7, lines 50-col. 8, lines 1-33) Allowable Subject Matter Claims 3-5, 7, 10-12, 14, 17-19, and 21 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. RELEVENT ART CITED BY THE EXAMINER The following prior art made of record and relied upon is citied to establish the level of skill in the applicant's art and those arts considered reasonably pertinent to applicant's disclosure. See MPEP 707.05(c). 3. The following references Ko et al., (US 11,824,788), Keller et al., (US 6,389,526) and Shrivastava et al. (US 11,436,040), Vaideeswaran (US 11,886,308 all teach interrupt-suppression states based on priority. (Abstract) Allowable Subject Matter Claims 2-7, 9-14, and 16-21 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. The examiner requests, in response to this office action, support be shown for language added to any original claims on amendment and any new claims. That is, indicate support for newly added claim language by specifically pointing to page(s) and line number(s) in the specification and/or drawing figure(s). This will assist the examiner in prosecuting the application. When responding to this office action, applicant is advised to clearly point out the patentable novelty which he or she thinks the claims present, in view of the state of art disclosed by the references cited or the objections made. He or she must also show how the amendments avoid such references or objections. See 37 C.F.R.I .Hi(c). In amending in reply to a rejection of claims in an application or patent under reexamination, the applicant or patent owner must clearly point out the patentable novelty which he or she thinks the claims present in view the state of the art disclosed by the references cited or the objections made. The applicant or patent owner must also show how the amendments avoid such references or objections. Any inquiry concerning this communication or earlier communications from the examiner should be directed to TAMMARA R PEYTON whose telephone number is (571)272-4157. The examiner can normally be reached on 9am-5pm, EST M-F. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Henry Tsai can be reached on 571-272-4176. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /TAMMARA R PEYTON/Primary Examiner, Art Unit 2184 April 4, 2026
Read full office action

Prosecution Timeline

Aug 31, 2022
Application Filed
Oct 24, 2022
Response after Non-Final Action
Oct 03, 2025
Non-Final Rejection mailed — §103, §OTHER
Dec 23, 2025
Applicant Interview (Telephonic)
Dec 24, 2025
Response Filed
Dec 27, 2025
Examiner Interview Summary
Apr 08, 2026
Final Rejection mailed — §103, §OTHER (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
91%
Grant Probability
97%
With Interview (+6.0%)
2y 3m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 956 resolved cases by this examiner. Grant probability derived from career allowance rate.

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