DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
This office action is responsive to amendment filed on 05/11/2026. Claims 1-15 are pending. The amendments have overcome the specification objection, claim objections and claim rejections under 35 U.S.C. 112(a) and 112(b) as set forth in the previous office action.
Response to Arguments
In respond to argument regarding rejection under 35 U.S.C. 101 on Remarks page 9, “the Applicant respectfully submits that the claims are directed to a patent eligible practical application of technology that improves the functioning of a computer rather than an abstract mathematical concept. The Examiner's characterization of the claims as mere mathematical concepts fails to account for the specific technical solution provided by the hardware architecture and the significant memory optimizations realized through the claimed bit reversal and prime number generation on the fly. The claims describe methods for performing ciphertext/modular calculations at high speed while reducing internal memory usage. While the claims involve calculations, the specific implementation of generating prime number information every cycle from base information directly addresses a known technical problem in homomorphic encryption hardware where large parameters for bootstrapping create insurmountable memory bottlenecks (see para. [182] of the specification). The claimed invention provides a specific technical improvement in computer functionality by reducing the required internal memory size by approximately 99.85 percent compared to traditional methods that require storing all prime information (see Table 3 of the specification). This reduction from O(N) bits to O(logN) bits (see para. [217] of the specification) allows for high-speed modular calculations on hardware with limited resources, such as a field programmable gate array.”
Examiner respectfully disagrees because applicant relies on features that are not recited in the rejected claim, such as prime number generation on the fly, performing modular calculations at high speed, and generating prime number information every cycle from base information. Furthermore, the specific technical solution is not provided by the hardware architecture, but rather provided by the mathematical algorithm or calculation to generate first prime number information and perform modular calculation based on the generated first prime number information as recited in the claims, wherein the hardware architecture, such as a processor and a memory are merely recited at a high level of generality and amount to no more than mere instructions to apply the judicial exception using computer components. Moreover, any arguably improvement, such as memory optimization, is a direct consequence of performing the mathematical calculation of generation of prime number and perform modular operation based on the generated number as described in algorithm figure 7 to avoid storing all prime numbers, see at least [147] describes that internal memory size are reduced based on the method of generating prime number rather than storing all of them. Thus, reducing memory size is merely a result of performing the algorithm that generate prime numbers on the fly rather than storing all me numbers. MPEP 2106.05(a) “It is important to note, the judicial exception alone cannot provide the improvement. The improvement can be provided by one or more additional elements. See the discussion of Diamond v. Diehr, 450 U.S. 175, 187 and 191-92, 209 USPQ 1, 10 (1981)) in subsection II, below. In addition, the improvement can be provided by the additional element(s) in combination with the recited judicial exception”. In other words, merely performing a novel mathematical algorithm that generate prime numbers for modular calculation (e.g., abstract idea) cannot provide the improvement.
Claim Objections
Claims 12-15 are objected to because of the following informalities:
Claim 12 line 9 “a plurality of ciphertexts” should be “the plurality of ciphertexts” as antecedently recited in claim 12 line 2.
Dependent claims are also objected for inheriting the same deficiencies in which claims they depend on.
Appropriate correction is required.
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f), is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f):
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f). The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f), is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f). The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f), is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f), except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f), except as otherwise indicated in an Office action.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f), because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are:
“A GBU including a plurality of BUs” in claims 3 and 8. Figure 12 illustrates a configuration of a GBU having a plurality of BUs, wherein [226] figure 8 illustrates a configuration of a BU having modular subtractor 810, modular adder 820, and a modular multiplier 830, [230] describes the modular subtractor 810 and modular adder 820 having the same system design as a general subtractor and adder. [231] describes the modular multiplier 830 having a configuration described above, which is [155] ModMult includes a first multiplier, a second multiplier, a third multiplier, a shift register, and a subtractor. Thus. together figures 8 and 12 [155], [226], [230], [231], provide structure for the GBU including a plurality of BUs to perform the claimed function.
Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f), it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f), applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f).
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-2 and 11-15 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more.
Claim 1 recites a calculation apparatus.
Under Prong One of Step 2A of the USPTO current eligibility guidance (MPEP 2106), the claim recites limitations cover mathematical calculations, relationship, and/or formula, such as generate first prime number information different from the predetermined base prime number information by reversing bits of the predetermined base prime number information (see at least figure 7 illustrates the step bit reverse, wherein bit reverse is mathematical operation for reversing order of bits), and perform a modular calculation for a plurality of ciphertexts by using the generated first prime number information (see at least [135] describes multiplication may be the modular calculation, the plurality of ciphertexts are merely recited as data and [83] describes modular multiplication means a modular calculation with q, wherein q element is used as illustrated in figure 5-6. Also see [150-154] describes the mathematical equation 9 for modular calculation). Therefore, the claim includes limitations that fall within the “Mathematical Concepts” grouping of abstract ideas. Accordingly, the claim recites an abstract idea.
Under Prong Two of Step 2A, this judicial exception is not integrated into a practical application. The claim additionally recites a calculation apparatus comprising: a memory configured to store at least one instruction; and a processor configured to execute the at least one instruction, wherein the processor is configured to execute the at least one instruction to store predetermined base prime number information. However, the additional elements are recited at a high level of generality, i.e., as a generic computer components performing generic computer functions of storing instructions and executing instructions to perform operation. Furthermore, the step of storing predetermined base prime number information is considered as insignificant extra solution activity because such activity is mere data gathering and well known. Moreover, the plurality of ciphertexts are merely described as data to be performed in the arithmetic operation or at most considered as mere generally linking the use of the judicial exception into a particular technological environment or field of use, such as homomorphic encryption. Such additional elements fail to provide a meaningful limitation on the judicial exception, and amount to no more than mere instructions to apply the exception using generic computer element. Thus, the claim is directed to an abstract idea.
Under Step 2B, as discussed with respect to Prong Two of Step 2A, the additional elements in the claim amount no more than mere instructions to apply the exception using a generic component. The same conclusion is reached in step 2B, i.e., mere instructions to apply an exception on a generic element cannot integrate a judicial exception into a practical application at step 2A or provide an inventive concept that is furnished by an element or combination of elements that is recited in the claim in addition to (beyond) the judicial exception. The step of storing predetermined base prime number information considered to be insignificant extra-solution activity in step 2A, and are determined to be well-understood, routine, conventional activity in the field. Court decisions cited in MPEP 2106.05(d)(II) section (iv) Storing and retrieving information in memory, is well-understood, routing, conventional function when it is claimed in a merely generic manner. Thus, the additional element fails to ensure the claim as a whole amount to significantly more than the judicial exception itself. Accordingly, the claim is not patent-eligible under 35 U.S.C. 101.
Claim 2 further recites wherein the predetermined base prime number information and the first prime number information are values obtained by addition and subtraction of three, four, or five exponentiations of 2 with different exponents. Such limitations cover mathematical calculations, relationship, and/or formula (performing addition and subtraction of exponentiations of 2 with different exponents, see at least figures 5-6). The claim does not recite additional element that would integrate the judicial exception into a practical application under step 2A prong two or ensure the claim as a whole amount to significantly more than the judicial exception itself under step 2B. Accordingly, the claim is not patent-eligible under 35 U.S.C. 101.
Claim 11 further recites wherein the processor is a field programmable gate array (FPGA). Such limitation is recited at a high level of generality, e.g., implementing the processor as an FPGA to perform the abstract idea, which amounts to no more than mere instructions to apply the judicial exception using computer component under step 2A prong two. Thus, the claim does not recite additional element that would integrate the judicial exception into a practical application under step 2A prong two or ensure the claim as a whole amount to significantly more than the judicial exception itself under step 2B. Accordingly, the claim is not patent-eligible under 35 U.S.C. 101.
Claim 12 recites a ciphertext calculation method.
Under Prong One of Step 2A of the USPTO current eligibility guidance (MPEP 2106), the claim recites limitations cover mathematical calculations, relationship, and/or formula, such as performing a module calculation for the plurality of ciphertexts by using prime number information expressed by a combination of exponentiations of 2 (see at least [135] describes multiplication may be the modular calculation, the plurality of ciphertexts are merely recited as data, figures 5-6 illustrate the prime number information expressed by combination of exponentiations of 2, which is also a mathematical expression of the prime number); wherein, in the performing of the modular calculation, bits of the stored based prime number information are reversed to generate first prime number information different from the stored base prime number information (see at least figure 7 illustrates the step bit reverse, wherein bit reverse is mathematical operation for reversing order of bits), and the modular calculation for the plurality of ciphertexts is performed by using the generated first prime number information (see at least see at least [135] describes multiplication may be the modular calculation and [83] describes modular multiplication means a modular calculation with q, wherein q element is used as illustrated in figure 5-6. Also see [150-154] describes the mathematical equation 9 for modular calculation). Therefore, the claim includes limitations that fall within the “Mathematical Concepts” grouping of abstract ideas. Accordingly, the claim recites an abstract idea.
Under Prong Two of Step 2A, this judicial exception is not integrated into a practical application. The claim additionally recites a step for receiving a modular calculation command for a plurality of ciphertext, storing base prime number information and outputting a result of the calculation. However, the additional elements are recited at a high level of generality, i.e., as a generic computer functions of receiving command, storing data to perform operation, and outputting a result of the calculation. Furthermore, the step of receiving command, storing base prime number information, and outputting a result of the calculation are also considered as insignificant extra/post solution activities because receiving, storing data, and outputting results are mere data gathering/outputting and well known. Moreover, ciphertexts are recited as mere data description or at most considered as mere generally linking the use of the judicial exception into a particular technological environment or field of use, such as homomorphic encryption. Such additional elements fail to provide a meaningful limitation on the judicial exception, and amount to no more than mere instructions to apply the exception using generic computer element. Thus, the claim is directed to an abstract idea.
Under Step 2B, as discussed with respect to Prong Two of Step 2A, the additional elements in the claim amount no more than mere instructions to apply the exception using a generic component. The same conclusion is reached in step 2B, i.e., mere instructions to apply an exception on a generic element cannot integrate a judicial exception into a practical application at step 2A or provide an inventive concept that is furnished by an element or combination of elements that is recited in the claim in addition to (beyond) the judicial exception. The step of receiving command and storing base prime number information considered to be insignificant extra-solution activity in step 2A, and are determined to be well-understood, routine, conventional activity in the field. Court decisions cited in MPEP 2106.05(d)(II) (i) receiving and transmitting data over a network and section (iv) Storing and retrieving information in memory, are well-understood, routing, conventional functions when they are claimed in a merely generic manner. Thus, the additional element fails to ensure the claim as a whole amount to significantly more than the judicial exception itself. Accordingly, the claim is not patent-eligible under 35 U.S.C. 101.
Claim 13 recites method claim that would be practiced by the apparatus claim 2. Thus, it is rejected for the same reasons.
Claim 14 further recites wherein in the performing of the modular calculation, the first prime number information is generated by converting a bit value of a k-th bit of the stored base prime number information into a log h-th bit integer. Such limitations cover mathematical calculations, relationship, and/or formula (performing bit conversion). The claim does not recite additional element that would integrate the judicial exception into a practical application under step 2A prong two or ensure the claim as a whole amount to significantly more than the judicial exception itself under step 2B. Accordingly, the claim is not patent-eligible under 35 U.S.C. 101.
Claim 15 further recites wherein in the performing of the modular calculation, the first prime number information necessary for a first cycle is generated by using the stored base prime number information, and second prime number information necessary for a second cycle is generated by using the generated first prime number information and the stored base prime number information. Such limitations cover mathematical calculations, relationship, and/or formula (generating prime number information using bit reverse in multiple cycles). The claim does not recite additional element that would integrate the judicial exception into a practical application under step 2A prong two or ensure the claim as a whole amount to significantly more than the judicial exception itself under step 2B. Accordingly, the claim is not patent-eligible under 35 U.S.C. 101.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to HUY DUONG whose telephone number is (571)272-2764. The examiner can normally be reached Mon-Friday 7:30-5:30.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Andrew Caldwell can be reached at (571) 272-3702. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/HUY DUONG/Examiner, Art Unit 2182 (571)272-2764
/ANDREW CALDWELL/ Supervisory Patent Examiner, Art Unit 2182
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