Prosecution Insights
Last updated: April 19, 2026
Application No. 17/906,918

NEURON ELEMENT, DIFFERENTIAL NEURON ELEMENT, A/D CONVERTER AND NEURAL NETWORK

Non-Final OA §102§103
Filed
Sep 21, 2022
Examiner
NGO, BRIAN
Art Unit
2851
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Soliton Systems K K
OA Round
1 (Non-Final)
88%
Grant Probability
Favorable
1-2
OA Rounds
2y 4m
To Grant
99%
With Interview

Examiner Intelligence

Grants 88% — above average
88%
Career Allow Rate
851 granted / 967 resolved
+20.0% vs TC avg
Moderate +12% lift
Without
With
+12.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
24 currently pending
Career history
991
Total Applications
across all art units

Statute-Specific Performance

§101
14.2%
-25.8% vs TC avg
§103
36.9%
-3.1% vs TC avg
§102
38.3%
-1.7% vs TC avg
§112
7.0%
-33.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 967 resolved cases

Office Action

§102 §103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION This Non-Final office is a response to the papers filed on 02/22/2023. Claims 1-10 are pending. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-2 and 5 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lee et al. (Pub. No. 20190171933 A1). Regarding claim 1, Lee discloses: A neuron element comprising: a first charge accumulating unit configured to accumulate charges by an input signal (see par [0013], one or two or more neuron circuits configured to output a firing signal according to signals input from a synapse array…..: a neuromorphic device configured to accumulate charges according to the signal input from the synapse array….); a signal processing unit which, based on a condition when the charges accumulated in the first charge accumulating unit exceed a first predetermined amount of charges (see par [0021-0023], accumulates the charges in the charge storage device connected to the fired neuron circuit so as to increase a threshold voltage of the fired neuron circuit, and the homeostatic circuit allows the firing signal to be transmitted to the common current mirror and discharges…, [wherein threshold voltage is the amount of charge], see par [0077] the charges are accumulated and exceeds the predetermined threshold value…..,[wherein global self-controller is signal processing unit]), is configured to: discharge a second predetermined amount of charges from the first charge accumulating unit (see par [0021-0023], discharges the charges accumulated in the charge storage device connected to the non-fired neuron circuit so as to decrease the threshold voltage of the non-fired neuron circuit….[wherein decrease the threshold voltage is a second predetermined amount of charges]); and generate a pulse signal, wherein the signal processing unit performs a predetermined processing in relation to the second predetermined amount of charges and the pulse signal (see par [0022-0024], a global self-control module that generates a reset pulse when the firing signal is input from one of the one or two or more neuron circuits and outputs the reset pulse…., a switch controller that generates a predetermined selection signal necessary for selecting the reset signal and outputs the selection signal). Regarding claim 2, Lee discloses: wherein the signal processing unit comprises: a pulse signal generating unit configured to generate the pulse signal, and a discharging unit which, as the predetermined processing, is configured to discharge the second predetermined amount of charges from the first charge accumulating unit based on the pulse signal generated by the pulse signal generating unit (see par [0067], the charges having the opposite polarity are accumulated in the first gate insulating film. When the voltage exceeds the threshold voltage, a current flows in the neuromorphic device. In addition, a signal having the opposite polarity of the lateral inhibition signal of the first embodiment is applied to the fired neuron circuit to discharge the accumulated charges….). Regarding claim 5, Lee discloses: wherein the signal processing unit comprises: a discharging unit configured to discharge the second predetermined amount of charges from the first charge accumulating unit (see par [0021-0023], discharges the charges accumulated in the charge storage device connected to the non-fired neuron circuit so as to decrease the threshold voltage of the non-fired neuron circuit…), and a pulse signal generating unit which, as the predetermined processing, is configured to generate the pulse signal by using a voltage signal generated based on the second predetermined amount of charges discharged from the first charge accumulating unit by the discharging unit (see par [0023], he global self-control module includes: an extended pulse generator that extends a pulse width of the input firing signal and outputs the firing signal; a voltage level shifter that generates the reset pulse by increasing a size…). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. (Pub. No. 20190171933 A1) further in view of MCGROGAN (US Patent No. 3250918 A). Regarding claim 8, Lee discloses: A differential neuron element comprising: a charge accumulating unit which accumulates charges by a first input signal (see par [0013], one or two or more neuron circuits configured to output a firing signal according to signals input from a synapse array…..: a neuromorphic device configured to accumulate charges according to the signal input from the synapse array….) a signal processing unit which, based on a condition when the charges accumulated in the charge accumulating unit exceed a first predetermined amount of charges (see par [0021-0023], accumulates the charges in the charge storage device connected to the fired neuron circuit so as to increase a threshold voltage of the fired neuron circuit, and the homeostatic circuit allows the firing signal to be transmitted to the common current mirror and discharges…, [wherein threshold voltage is the amount of charge], see par [0077] the charges are accumulated and exceeds the predetermined threshold value…..,[wherein global self-controller is signal processing unit]), is configured to: discharge a second predetermined amount of charges from the charge accumulating unit (see par [0021-0023], discharges the charges accumulated in the charge storage device connected to the non-fired neuron circuit so as to decrease the threshold voltage of the non-fired neuron circuit….[wherein decrease the threshold voltage is a second predetermined amount of charges]); and generate a first pulse signal, wherein the signal processing unit performs a predetermined processing in relation to the second predetermined amount of charges and the pulse signal (see par [0022-0024], a global self-control module that generates a reset pulse when the firing signal is input from one of the one or two or more neuron circuits and outputs the reset pulse…., a switch controller that generates a predetermined selection signal necessary for selecting the reset signal and outputs the selection signal). However Lee fails to disclose: and a second input signal, the second input signal obtained by inverting a polarity of the first input signal and a second pulse signal, the second pulse signal obtained by inverting a polarity of the first pulse signal Thus, MCGROGAN discloses: and a second input signal, the second input signal obtained by inverting a polarity of the first input signal (see claims 1 and 2, A neuron circuit responsive to excitatory and inhibitory input signals of opposite polarity…); and a second pulse signal, the second pulse signal obtained by inverting a polarity of the first pulse signal (see col. 3 lines 4-23, the excitatory pulses may be positive voltage pulses and the inhibitory pulses may be negative voltage pulses….) It would have been obvious to one of ordinary skill in the art at the time the invention was made to have modified a neuromorphic system using a neuron circuit of Lee to include a second input signal in order to improve electrical circuit neuron (see MCGROGAN col. 2, lines 14-20). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. (Pub. No. 20190171933 A1) further in view of Kim et al. (Pub No. 2014/0365416 A1). Regarding claim 9, Lee discloses: An A/D converter comprising: a charge accumulating unit which accumulates charges by an input signal (see par [0013], one or two or more neuron circuits configured to output a firing signal according to signals input from a synapse array…..: a neuromorphic device configured to accumulate charges according to the signal input from the synapse array….); a signal processing unit which, based on a condition when the charges accumulated in the charge accumulating unit exceed a first predetermined amount of charges (see par [0021-0023], accumulates the charges in the charge storage device connected to the fired neuron circuit so as to increase a threshold voltage of the fired neuron circuit, and the homeostatic circuit allows the firing signal to be transmitted to the common current mirror and discharges…, [wherein threshold voltage is the amount of charge], see par [0077] the charges are accumulated and exceeds the predetermined threshold value…..,[wherein global self-controller is signal processing unit]), is configured to: discharge a second predetermined amount of charges from the charge accumulating unit, and generate a pulse signal (see par [0021-0023], discharges the charges accumulated in the charge storage device connected to the non-fired neuron circuit so as to decrease the threshold voltage of the non-fired neuron circuit….[wherein decrease the threshold voltage is a second predetermined amount of charges]); and wherein the signal processing unit performs a predetermined processing in relation to the second predetermined amount of charges and the pulse signal (see par [0022-0024], a global self-control module that generates a reset pulse when the firing signal is input from one of the one or two or more neuron circuits and outputs the reset pulse…., a switch controller that generates a predetermined selection signal necessary for selecting the reset signal and outputs the selection signal). However, Lee fails to disclose: a digital filter configured to perform a predetermined digital processing on the pulse signal generated by the signal processing unit, Thus, Kim discloses: a digital filter configured to perform a predetermined digital processing on the pulse signal generated by the signal processing unit (see Fig. 1 and 4, see par [0017], The general aspect of the pulse shaper circuit may further include: a finite impulse response (FIR) filter comprising a 1-bit D flip flop chain configured to store the pulses; a first OR calculator configured to generate the digital pulse…, see par [0084-0087] [wherein input signal from neuron is from the signal processing unit]). It would have been obvious to one of ordinary skill in the art at the time the invention was made to have modified a neuromorphic system using a neuron circuit of Lee to include a digital filter in order to configured to store the pulses (see Kim col. Par [0086]). Allowable Subject Matter Claims 3-4. 6-7, and 10 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: The prior art of record does not teach or suggest the limitation as in the claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to BRIAN NGO whose telephone number is (571)270-7011. The examiner can normally be reached M-F 7AM-4PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jack Chiang can be reached at 5712727483. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /BRIAN NGO/ Primary Examiner, Art Unit 2851
Read full office action

Prosecution Timeline

Sep 21, 2022
Application Filed
Nov 26, 2025
Non-Final Rejection — §102, §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
88%
Grant Probability
99%
With Interview (+12.2%)
2y 4m
Median Time to Grant
Low
PTA Risk
Based on 967 resolved cases by this examiner. Grant probability derived from career allow rate.

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