Prosecution Insights
Last updated: April 19, 2026
Application No. 17/913,787

DISPLAY SUBSTRATE, MANUFACTURING METHOD, AND DISPLAY DEVICE

Non-Final OA §102§103§112
Filed
Sep 22, 2022
Examiner
ASHBAHIAN, ERIC K
Art Unit
2891
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
BOE TECHNOLOGY GROUP CO., LTD.
OA Round
3 (Non-Final)
67%
Grant Probability
Favorable
3-4
OA Rounds
2y 11m
To Grant
74%
With Interview

Examiner Intelligence

Grants 67% — above average
67%
Career Allow Rate
310 granted / 465 resolved
-1.3% vs TC avg
Moderate +7% lift
Without
With
+7.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 11m
Avg Prosecution
58 currently pending
Career history
523
Total Applications
across all art units

Statute-Specific Performance

§101
0.5%
-39.5% vs TC avg
§103
51.3%
+11.3% vs TC avg
§102
17.1%
-22.9% vs TC avg
§112
25.1%
-14.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 465 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 03/03/2026 has been entered. Drawings The Examiner acknowledges that the Applicant’s amendments to the claims resolves the previous drawings objection. Therefore, the previous drawings objection has been withdrawn. Claim Rejections - 35 USC § 112 The Examiner acknowledges that the amendment to claim 11 resolve the previous rejections of claim 11 under 35 USC 112(a) and 35 USC 112(b). Therefore, the previous rejections of claim 11 under 35 USC 112(a) and 35 USC 112(b) have been withdrawn. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1, 2, 4-6, 11-13, 16, 18, 19, 21-24 are rejected under 35 U.S.C. 102(a)(1) and 102(a)(2) as being anticipated by Ishiguro et al. (US 2008/0018243) hereinafter “Ishiguro”. Regarding claim 1, Figs. 3A-4 of Ishiguro teaches a display substrate, comprising a base substrate (Combination of all layers under and including Item 283) and pixel units (Item 3) arranged in an array form on the base substrate (Combination of all layers under and including Item 283), the base substrate comprising a pixel circuitry (Item 123) formed on a substrate (Item 2), wherein each pixel unit comprises: a first electrode (Item 23) at a side of the base substrate (Combination of all layers under and including Item 283); a light-emitting layer (Item 60) at a side of the first electrode (Item 23) away from the base substrate (Combination of all layers under and including Item 283); and a second electrode (Item 50) at a side of the light-emitting layer (Item 60) away from the first electrode (Item 23), wherein the display substrate further comprises a reflection layer (Item 27) between the first electrode (Item 23) and the base substrate (Combination of all layers under and including Item 283), the first electrode (Item 23) is insulated (via Item 25) from the reflection layer (Item 27), and the first electrode (Item 23) is coupled to the pixel circuitry (Item 123) through a first via hole (Area between portions of Item 27 in Item 70) penetrating through the reflection layer (Item 27); wherein the first via hole is provided in the reflection layer and a second via hole (Area between portions of Item 283 in Item 70) is provided in the base substrate (Combination of all layers under and including Item 283), an aperture of the first via hole in the reflection layer (Item 27) is greater than an aperture of the second via hole in the base substrate (Combination of all layers under and including Item 283), and in a direction perpendicular to the base substrate (Combination of all layers under and including Item 283), the reflective layer (Item 27) does not overlap the second via hole in the base substrate (Combination of layers under and including Item 283). Regarding claim 2, Ishiguro further teaches where a minimum distance between the first via holes (Area between portions of Item 27 in Item 70) of the adjacent pixel units is greater than a minimum distance between the first electrodes (Item 23) of the adjacent pixel units (Item 3). Regarding claim 4, Ishiguro further teaches where the reflection layers (Item 27) of different pixel units (Item 23) are connected to form one piece (Where the reflection layer extends over multiple pixels). Regarding claim 5, Ishiguro further teaches wherein a ratio of an area of the reflection layer (Item 27) to an area of a display region of the display substrate is greater than 90% (Where Item 27 covers all of the display region except for the via holes). Regarding claim 6, Ishiguro further teaches wherein the reflection layer (Item 27) is a conductive reflection layer (Paragraph 0056), and an insulation layer (Item 25) is arranged between the conductive reflection layer (Item 27) and the first electrode (Item 23). Regarding claim 11, Ishiguro further teaches a display device (Paragraph 0002), comprising the display substrate of claim 1 (See the rejection of claim 1 above; For brevity the rejection of claim 1 will not be repeated in its entirety here). Regarding claim 12, Figs. 3A-4 of Ishiguro teaches a method for manufacturing a display substrate (Paragraph 0002), the display substrate comprising a base substrate (Combination of all layers under and including Item 283) and pixel units (Items 3) arranged in an array form on the base substrate (Combination of all layers under and including Item 283), the base substrate (Combination of all layers under and including Item 283) comprising a pixel circuitry (Item 123) formed on a substrate (Item 2), wherein the method comprises: providing the base substrate (Combination of all layers under and including Item 283); forming a first electrode (Item 23) on the base substrate (Combination of all layers under and including Item 283); forming a light-emitting layer (Item 60) at a side of the first electrode (Item 23) away from the base substrate (Combination of all layers under and including Item 283); and forming a second electrode (Item 50) at a side of the light-emitting layer (Item 60) away from the first electrode (Item 23), wherein the method further comprises forming a reflection layer (Item 27) between the first electrode (Item 23) and the base substrate (Combination of all layers under and including Item 283), the first electrode (Item 23) is insulated (via Item 25) from the reflection layer (Item 27), and the first electrode (Item 23) is coupled to the pixel circuitry (Item 123) through a first via hole (Area between portions of Item 27 in Item 70) penetrating through the reflection layer (Item 27); wherein the first via hole is provided in the reflection layer and a second via hole (Area between portions of Item 283 in Item 70) is provided in the base substrate (Combination of all layers under and including Item 283), an aperture of the first via hole in the reflection layer (Item 27) is greater than an aperture of the second via hole in the base substrate (Combination of all layers under and including Item 283), and in a direction perpendicular to the base substrate (Combination of all layers under and including Item 283), the reflective layer (Item 27) does not overlap the second via hole in the base substrate (Combination of layers under and including Item 283). Regarding claim 13, Ishiguro further teaches wherein the reflection layer (Item 27) is a conductive reflection layer (Paragraph 0056), and the method further comprises forming an insulation layer (Item 25) between the conductive reflection layer (Item 27) and the first electrode (Item 23). Regarding claim 16, Ishiguro further teaches wherein a ratio of an area of the reflection layer (Item 27) to an area of a display region of the display substrate is greater than 90% (Where Item 27 covers all of the display region except for the via holes). Regarding claim 18, Ishiguro further teaches wherein a ratio of an area of the reflection layer (Item 27) to an area of a display region of the display substrate is greater than 90% (Where Item 27 covers all of the display region except for the via holes). Regarding claim 19, Ishiguro further teaches where a minimum distance between the first via holes of the adjacent pixel units (Items 3) is greater than a minimum distance between the first electrodes (Items 23) of the adjacent pixel units (Items 3). Regarding claim 21, Fig. 4 of Ishiguro further teaches where a minimum distance between an orthogonal projection of the first via hole (Area between portions of Item 27 in Item 70) onto the first electrode and an edge of the first electrode is D1, a distance between the orthogonal projection of the first via hole onto the first electrode and a center of the first electrode is D2, and D1 is less than D2. Regarding claim 22, Fig. 4 of Ishiguro further teaches where a minimum distance between an orthogonal projection of the first via hole (Area between portions of Item 27 in Item 70) onto the first electrode and an edge of the first electrode is D1, a distance between the orthogonal projection of the first via hole onto the first electrode and a center of the first electrode is D2, and D1 is less than D2. Regarding claim 23, Ishiguro further teaches wherein a ratio of an area of the reflection layer (Item 27) to an area of a display region of the display substrate is greater than 90% (Where Item 27 covers all of the display region except for the via holes). Regarding claim 24, Fig. 4 of Ishiguro further teaches where a minimum distance between an orthogonal projection of the first via hole (Area between portions of Item 27 in Item 70) onto the first electrode and an edge of the first electrode is D1, a distance between the orthogonal projection of the first via hole onto the first electrode and a center of the first electrode is D2, and D1 is less than D2. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Ishiguro et al. (US 2008/0018243) hereinafter “Ishiguro” in view of Kinoshita (US 2010/0052524) hereinafter “Kinoshita”. Regarding claim 7, Ishiguro teaches all of the elements of the claimed invention as stated above. Ishiguro does not explicitly teach where the insulation layer has a thickness of 400 angstroms to 1000 angstroms. Kinoshita teaches where an insulation layer (Item 8-1) between a reflecting electrode (Item 2) and a pixel electrode (Item 3) has a thickness of between 300 angstroms and 2000 angstroms (Paragraph 0076 where the thickness of the insulation layer is preferably 30 n m to 200 nm). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have the insulation layer have a thickness of 400 angstroms to 1000 angstroms because this allows each pixel to efficiently resonate light of specific wavelength (Kinoshita Paragraph 0076) and “In the case where the claimed ranges ‘overlap or lie inside ranges disclosed by the prior art’ a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976)”. (MPEP 2144.05). Further, Fig. 3 of Kinoshita teaches where the thickness of an insulation layer (Item 8-1) between a reflecting electrode (Item 2) and a pixel electrode (Item 3) is a result effective variable (Paragraph 0052 and 0056 where the thickness of an insulation layer between a reflecting electrode and a pixel electrode will determine the optical path length and thus attain a resonance distance such that a desired wavelength of light is output from a pixel unit). In In re Antonie, 559 F.2d 618, 195 USPQ 6 (CCPA 1977), the CCPA held that a particular parameter must first be recognized as a result-effective variable, i.e., a variable which achieves a recognized result, before the determination of the optimum or workable ranges of said variable might be characterized as routine experimentation, because "obvious to try" is not a valid rationale for an obviousness finding (MPEP 2144.05). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to optimize the thickness of the insulation layer such that the insulation layer has a thickness of 400 angstroms to 1000 angstroms because "[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955) (MPEP 2144.05). Claims 8-9 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Ishiguro et al. (US 2008/0018243) hereinafter “Ishiguro” in view of Hamaguchi et al. (US 2023/0352910) hereinafter “Hamaguchi”. Regarding claim 8, Ishiguro teaches all of the elements of the claimed invention as stated above except where the reflection layer is an insulation reflection layer, the insulation reflection layer comprises at least one silicon dioxide film layer and at least one silicon nitride film layer, and the silicon dioxide film layers and the silicon nitride film layers are alternately laminated one on another. Hamaguchi teaches where a reflection layer (Item DBR) is an insulation reflection layer (Paragraph 0114 where the DBR is a dielectric multilayer film), the insulation reflection layer comprises at least one silicon dioxide film layer and at least one silicon nitride film layer (Paragraph 0114 where a multilayer film may be SiO.sub.X/SiN.sub.Y), and the silicon dioxide film layers and the silicon nitride film layers are alternately laminated one on another (Paragraph 0114). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have the reflection layer be an insulation reflection layer, the insulation reflection layer comprises at least one silicon dioxide film layer and at least one silicon nitride film layer, and the silicon dioxide film layers and the silicon nitride film layers are alternately laminated one on another because this allows for a reflection layer having a desired reflectance (Hamaguchi Paragraph 0114). Regarding claim 9, Ishiguro teaches all of the elements of the claimed invention as stated above except where the insulation reflection layer comprises three silicon dioxide film layers and three silicon nitride film layers, and a reflectivity of the insulation reflection layer to light at a wavelength of 400nm to 700nm is greater than 80%. However, Hamaguchi further teaches where the number of layers in a reflection layer is a result effective variable (Paragraph 0114 where the desired reflectance of a reflective layer is obtained by modifying the number of laminated layers and/or the thickness of the each layer). In In re Antonie, 559 F.2d 618, 195 USPQ 6 (CCPA 1977), the CCPA held that a particular parameter must first be recognized as a result-effective variable, i.e., a variable which achieves a recognized result, before the determination of the optimum or workable ranges of said variable might be characterized as routine experimentation, because "obvious to try" is not a valid rationale for an obviousness finding (MPEP 2144.05). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to optimize the number of layers and/or the thickness of the respective SiN and SiO layers resulting in a desired reflection such that the insulation reflection layer comprise three silicon dioxide film layers and three silicon nitride film layers, and a reflectivity of the insulation reflection layer to light at a wavelength of 400nm to 700nm is greater than 80% because "[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955) (MPEP 2144.05). Regarding claim 14, Ishiguro teaches all of the elements of the claimed invention as stated above except where the reflection layer is an insulation reflection layer, the forming the reflection layer comprises forming at least one silicon dioxide film layer and at least one silicon nitride film layer, and the silicon dioxide film layers and the silicon nitride film layers are alternately laminated one on another. Hamaguchi teaches where a reflection layer (Item DBR) is an insulation reflection layer (Paragraph 0114 where the DBR is a dielectric multilayer film), the forming of the insulation reflection layer comprises forming at least one silicon dioxide film layer and at least one silicon nitride film layer (Paragraph 0114 where a multilayer film may be SiO.sub.X/SiN.sub.Y), and the silicon dioxide film layers and the silicon nitride film layers are alternately laminated one on another (Paragraph 0114). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have the reflection layer is an insulation reflection layer, the forming the reflection layer comprises forming at least one silicon dioxide film layer and at least one silicon nitride film layer, and the silicon dioxide film layers and the silicon nitride film layers are alternately laminated one on another because this allows for a reflection layer having a desired reflectance (Hamaguchi Paragraph 0114). Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Ishiguro et al. (US 2008/0018243) hereinafter “Ishiguro”. Regarding claim 10, Ishiguro teaches all of the elements of the claimed invention as stated above. Ishiguro does not explicitly teach where the first electrode has a thickness of 500 angstroms and 1200 angstroms. However, Ishiguro further teaches where the thickness of the first electrode is a result effective variable (Paragraph 0055 where the thickness of the first electrode determines the color of light emitted from each of the light emitting unit). In In re Antonie, 559 F.2d 618, 195 USPQ 6 (CCPA 1977), the CCPA held that a particular parameter must first be recognized as a result-effective variable, i.e., a variable which achieves a recognized result, before the determination of the optimum or workable ranges of said variable might be characterized as routine experimentation, because "obvious to try" is not a valid rationale for an obviousness finding (MPEP 2144.05). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to optimize the thickness of the first electrode such that first electrode has a thickness of 500 angstroms to 1200 angstroms because "[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955) (MPEP 2144.05). Response to Arguments Applicant’s arguments, see Applicant’s REMARKS, filed 03/03/2026, with respect to the rejection(s) of claim(s) 1 and 11 under 35 USC 102(a)(1) and 102(a)(2) have been fully considered and are persuasive. Therefore, the rejections have been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of an alternate interpretation of Ishiguro. The Examiner notes that the Examiner indicated the base substrate as being Item 2 in the previous rejection of claim 1 and a combination of Items 2 and 5 in the previous rejection of claim 11. Under this interpretation of Ishiguro the Applicant’s arguments are persuasive. However, when indicating the base substrate as being all of the layers under and including Item 283, as is done by the Examiner in the current rejections, the Ishiguro reference reads on the Applicant’s amended claims 1 and 11 as indicated in the current rejections of claims 1 and 11 above. Specifically the first via hole is the opening in Item 283. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIC K ASHBAHIAN whose telephone number is (571)270-5187. The examiner can normally be reached 8-5:30 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Matthew Landau can be reached at 571-272-1731. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ERIC K ASHBAHIAN/Primary Examiner, Art Unit 2891
Read full office action

Prosecution Timeline

Sep 22, 2022
Application Filed
Jun 09, 2025
Non-Final Rejection — §102, §103, §112
Sep 10, 2025
Response Filed
Dec 01, 2025
Final Rejection — §102, §103, §112
Mar 03, 2026
Request for Continued Examination
Mar 06, 2026
Response after Non-Final Action
Mar 16, 2026
Non-Final Rejection — §102, §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
67%
Grant Probability
74%
With Interview (+7.2%)
2y 11m
Median Time to Grant
High
PTA Risk
Based on 465 resolved cases by this examiner. Grant probability derived from career allow rate.

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