Prosecution Insights
Last updated: April 18, 2026
Application No. 17/914,552

QUANTUM-CASCADE LASER ELEMENT AND QUANTUM-CASCADE LASER DEVICE

Non-Final OA §103
Filed
Sep 26, 2022
Examiner
EHRLICH, ALEXANDER JOSEPH
Art Unit
2828
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Hamamatsu Photonics K K
OA Round
3 (Non-Final)
64%
Grant Probability
Moderate
3-4
OA Rounds
3y 4m
To Grant
99%
With Interview

Examiner Intelligence

Grants 64% of resolved cases
64%
Career Allow Rate
21 granted / 33 resolved
-4.4% vs TC avg
Strong +57% interview lift
Without
With
+57.1%
Interview Lift
resolved cases with interview
Typical timeline
3y 4m
Avg Prosecution
36 currently pending
Career history
69
Total Applications
across all art units

Statute-Specific Performance

§103
52.7%
+12.7% vs TC avg
§102
21.0%
-19.0% vs TC avg
§112
23.8%
-16.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 33 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendment Examiner acknowledges amending of claims 1, 9. Claim 9 112b rejection withdrawn. Response to Arguments Applicant argues Ito does not disclose the cladding layer in the first region being thicker than the cladding layer in the entire second region (Remarks pgs. 1-2 (pgs. 7-8 in “Amendment/Request…”)). Applicant argues Ito does not disclose “the embedding layer extends along the width direction of the semiconductor substrate in the second region” (Remarks pgs. 2-3 (pgs. 8-9)). Examiner agrees. Amended claim 1 rejected under USC 103 using additional teachings within Ito and updated interpretation of Ito. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-4, 9-11, 13-14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ito (US-20190074664-A1). Regarding claim 1, Ito discloses a quantum-cascade laser element (fig. 3C, 0017) comprising: a semiconductor substrate (fig. 3C 21, 0026 lines 4-7); a semiconductor mesa formed on the semiconductor substrate (fig. 3C 24+25+26 combo/”mesa” on 21, 0026 lines 7-17) to include an active layer having a quantum-cascade structure and to extend along a light waveguide direction (fig. 3C 25 has quantum-cascade structure and extends along light waveguide direction (into page fig. 3C, annotated fig. 1 WD), 0017); an embedding layer formed to interpose the semiconductor mesa along a width direction of the semiconductor substrate (fig. 3C 27 interposes mesa along a “width direction” (left to right on page in fig. 3C), 0029 lines 1-3); a cladding layer formed at least on the semiconductor mesa (fig. 3C 28 formed at least on mesa, 0030); and a metal layer formed at least on the cladding layer (fig. 3C 81+82 combo formed at least on 28, 0033 lines 16-22), wherein a thickness of the cladding layer is thinner in a second region (annotated fig. 3C 28 within SR) located outside a first region (annotated fig. 3C 28 within FR) in the width direction of the semiconductor substrate than in the first region of which at least a part overlaps the semiconductor mesa when viewed in a thickness direction of the semiconductor substrate (annotated fig. 3C thickness of 28 within SR less than thickness of 28 within FR, SR located outside FR in width direction (left to right), FR overlaps mesa in a thickness direction of 21 (top to bottom on page fig. 3C)), and the metal layer extends over the first region and the second region (annotated fig. 3C 81+82 extends over FR and SR), and the embedding layer extends along the width direction of the semiconductor substrate in the second region (annotated fig. 3c embedding layer 27 extends along width direction (left to right) in second region SR). Ito does not disclose the thickness of the entire second region cladding layer being less than the thickness of the first region cladding layer. Ito discloses a separate lower cladding layer with a smaller thickness in an entire equivalent second region than in an equivalent first region (underneath mesa structure) (annotated fig. 3x lower clad 23 thicker in first region 1R underneath mesa structure than in entire second region 2R, 0026 lines 7-10). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to make the entire second region cladding layer thickness less than the thickness of the first region cladding layer to reduce the amount of cladding layer material required for the device (smaller thickness in second region) while still maintaining appropriate thickness or increasing thickness in the first region to improve current spreading above the mesa/active layer (bigger thickness in first region). Thickness of cladding layer 28 within groove portion 51/52 in second region is 0, necessarily less than thickness of 28 within first region FR. This interpretation is reasonable, as evidenced by Applicant’s claim 10. “embedding layer” 27 now included in second region SR PNG media_image1.png 487 809 media_image1.png Greyscale Annotated fig. 3C PNG media_image2.png 637 771 media_image2.png Greyscale Annotated fig. 1 PNG media_image3.png 529 865 media_image3.png Greyscale Annotated fig. 3x Regarding claim 2, modified Ito discloses the quantum-cascade laser element according to claim 1, wherein a width of the cladding layer in the first region is more than or equal to a width of the semiconductor mesa (annotated fig. 3C width of 28 within FR more than or equal to width of mesa). Regarding claim 3, modified Ito discloses the quantum-cascade laser element according to claim 1, wherein a width of the cladding layer in the first region is less than or equal to four times a width of the semiconductor mesa (annotated fig. 3C width of 28 within FR less than or equal to 4x width of mesa). Regarding claim 4, modified Ito discloses the quantum-cascade laser element according to claim1, further comprising: a dielectric layer disposed between the cladding layer and the metal layer (fig. 3C 71 disposed between 28 and 81+82, 0032 line 1), wherein an opening that exposes the cladding layer in the first region from the dielectric layer is formed in the dielectric layer (annotated fig. 3C opening in 71 in center of figure exposes 28 in FR), and the metal layer is in contact with the cladding layer in the first region (annotated fig. 3C 81+82 in contact with 28 via 29 in FR, 0030). Presence of Ito’s “contact layer” 29 does not affect exposure of 28 or degree of contact between 28 and 81+82. 28 considered exposed and in contact with 81+82 in light of Applicant’s Specification 0050, which discusses instant application contact layer. Regarding claim 9, modified Ito discloses the quantum-cascade laser element according to claim1, wherein the thickness of the cladding layer in the second region is less than or equal to half the thickness of the cladding layer in the first region. Annotated fig. 3C thickness of 28 in SR (0 within 51/52 grooves) is less than or equal to half thickness of 28 in FR. Regarding claim 10, modified Ito discloses the quantum-cascade laser element according to claim1, wherein the thickness of the cladding layer in the second region is 0 (annotated fig. 3C thickness of 28 in SR within 51/52 grooves is 0), and the metal layer is formed over the cladding layer and the embedding layer (fig. 3C 81+82 formed over 28 and 27). Regarding claim 11, modified Ito discloses the quantum-cascade laser element according to claim1, wherein a surface of the cladding layer on a side opposite to the semiconductor substrate includes an inclined surface formed at a boundary portion between the first region and the second region (annotated fig. 3Ca surface of 28 between 28/29 and opposite to 21 includes inclined surface IS, this inclined surface is at boundary portion between annotated fig. 3C FR and right side of SR), and when viewed in the light waveguide direction (annotated fig. 3Ca into the page), the inclined surface is inclined to go outward as approaching the semiconductor substrate (annotated fig. 3Ca IS travels outward as it approaches annotated fig. 3C 21). PNG media_image4.png 475 593 media_image4.png Greyscale Annotated fig. 3Ca Regarding claim 13, modified Ito discloses the quantum-cascade laser element according to claim1, wherein the cladding layer is formed over the semiconductor mesa and the embedding layer (fig. 3C 28 over mesa and 27), a pair of groove portions extending along the light waveguide direction are formed in a surface of the cladding layer on a side opposite to the semiconductor substrate (fig. 3C 51 + 52 formed in light waveguide direction (into page, see fig. 1) in a surface of 28 opposite 21, 0031 lines 1-3), the pair of groove portions are disposed in two outer regions respectively when the cladding layer is equally divided into four regions in the width direction of the semiconductor substrate (annotated fig. 3Cb 28 equally divided into four regions in width direction, 51 + 52 disposed in the two outer regions), and the metal layer enters the pair of groove portions (fig. 3C 81+82 enters 51 + 52). PNG media_image5.png 366 808 media_image5.png Greyscale Annotated fig. 3Cb (four regions) Regarding claim 14, modified Ito discloses the quantum-cascade laser element according to claim 13, wherein the pair of groove portions reach the embedding layer (fig. 3C 51+52 reach 27). Claim(s) 5-6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ito in view of Maulini et al. (US-20170324220-A1). Regarding claim 5, modified Ito discloses the quantum-cascade laser element according to claim 4. Modified Ito does not disclose wherein the opening is formed to expose a part of the cladding layer in the second region from the dielectric layer, and the metal layer is in contact with the cladding layer in the second region through the opening. Maulini discloses increasing the contact area between two layers that are transferring heat in a quantum cascade laser (0001, 0016 final 4 lines). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to extend the opening into the second region to expose a part of the cladding layer in the second region from the dielectric layer so the metal layer is in contact with the cladding layer in the second region through the opening. One of ordinary skill in the art would have been motivated to make this modification to improve thermal conductivity and heat dissipation within the device, specifically between the metal layer and cladding layer (Maulini 0016). Regarding claim 6, modified Ito discloses the quantum-cascade laser element according to claim 4. Ito clearly discloses a non-zero opening width in the width direction and a non-zero width of the semiconductor mesa (fig. 3C). Modified Ito does not disclose wherein a width of the opening in the width direction of the semiconductor substrate is more than or equal to two times a width of the semiconductor mesa. Maulini discloses increasing the contact area between two layers that are transferring heat in a quantum cascade laser (0001, 0016 final 4 lines). Maulini discloses a general concern for minimizing heat in a quantum cascade laser (0003). It is well known to optimize values within prior art to achieve desired results (MPEP 2144.05 II A). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to make a width of the opening in the width direction of the semiconductor substrate more than or equal to two times a width of the semiconductor mesa. One of ordinary skill in the art would have been motivated to make this modification to adequately handle the heat generated within the mesa. Making the opening as large as possible and maximizing the ratio of opening width (ie metal layer contact width) to mesa width would maximize heat dissipation and thermal conductivity and prolong lifespan of device (Maulini 0003). Claim(s) 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ito in view of Maulini et al. (US-20170324220-A1) and Shigihara (US-20050121682-A1). Regarding claim 7, modified Ito discloses the quantum-cascade laser element according to claim 4. Modified Ito clearly discloses a non-zero opening width in the width direction and a non-zero thickness of the cladding layer in the first region (annotated fig. 3C). Modified Ito does not disclose wherein a width of the opening in the width direction of the semiconductor substrate is more than or equal to ten times the thickness of the cladding layer in the first region. Maulini discloses increasing the contact area between two layers that are transferring heat in a quantum cascade laser (0001, 0016 final 4 lines). Maulini discloses a general concern for minimizing heat in a quantum cascade laser (0003). Shihigara discloses decreasing cladding layer thickness in a semiconductor laser device to decrease distance between active region and a heat sink (fig. 5, 0023, 0091, 0095). It is well known to optimize values within prior art to achieve desired results (MPEP 2144.05 II A). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to make a width of the opening in the width direction of the semiconductor substrate more than or equal to ten times the thickness of the cladding layer in the first region. Making the opening as large as possible and the cladding thickness as small as possible and maximizing the ratio of opening width (ie metal layer contact width) to cladding thickness would maximize heat dissipation and thermal conductivity in certain laser setups and prolong lifespan of device (Maulini 0003, Shihigara 0091 + 0095). Claim(s) 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ito in view of Palaniswamy (US-20130294471-A1). Regarding claim 8, modified Ito discloses the quantum-cascade laser element according to claim 4. Modified Ito does not disclose further comprising: a wire made of metal, that is electrically connected to the metal layer, and wherein a connection position between the metal layer and the wire overlaps the dielectric layer when viewed in the thickness direction of the semiconductor substrate. Palaniswamy discloses a semiconductor light emitting device with a wire made of metal (fig. 6 wire connects bond pads 24, 0056 final 3 lines, 0078 lines 11-16), that is electrically connected to a layer within the semiconductor light emitter (fig. 6 wire electrically connected to 26 via 24, 0034 lines 26-29), and wherein a connection position between the layer and the wire overlaps a dielectric layer when viewed in the thickness direction of the semiconductor substrate (fig. 6 24 overlaps 12 in thickness direction, 0034 lines 1-4). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to include a wire made of metal, that is electrically connected to the metal layer, and wherein a connection position between the metal layer and the wire overlaps the dielectric layer when viewed in the thickness direction of the semiconductor substrate. One of ordinary skill in the art would have been motivated to make this modification to provide an easier method to supply the device in Ito with electrical current. Placing the connection position over the dielectric layer would help contain heat from the bond pad/wire and prevent it from flowing into critical elements of the device. Claim(s) 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ito in view of Kakimoto (US-5661741-A). Regarding claim 12, modified Ito discloses the quantum-cascade laser element according to claim 11. Modified Ito does not disclose wherein when viewed in the light waveguide direction, the inclined surface is curved to protrude toward the active layer. Kakimoto discloses a semiconductor light emitting device with current blocking layers with inclined surfaces curved to protrude toward an active layer (fig. 8 43 and 42 inclined and curved to protrude toward 32, same protrusion occurs between 41/42 interface and 42/43 interface, col. 13 lines 25 + 43-46). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to curve the inclined surface to protrude toward the active layer in Ito. One of ordinary skill in the art would have been motivated to make this modification to help evenly distribute stresses within the device and prevent fracturing due to sharp points or uneven pressure between adjacent layers. Claim(s) 15-16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ito in view of Yoshinaga et al. (US-20140348196-A1). Regarding claim 15, modified Ito discloses the quantum-cascade laser element according to claim 13. Modified Ito does not disclose further comprising: a plating layer formed on the metal layer, wherein a recessed portion is formed in a surface of the plating layer on a side opposite to the semiconductor substrate. Yoshinaga discloses a quantum cascade laser with a plating layer formed on a metal layer (Flipped fig. 2 to match orientation of Ito fig. 3C, metal plating layer 33 on metal layer 35, 0046 lines 5-6), wherein a recessed portion is formed in a surface of the plating layer on a side opposite to quantum cascade laser substrate (flipped fig. 2 two recessed portions formed in surface of 33 on side opposite to substrate 19, 0040 lines 1-2). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to add a metal plating layer formed on the metal layer, wherein a pair of recessed portions are formed in a surface of the plating layer on a side opposite to the semiconductor substrate in Ito, and those recessed portions are overlapping the pair of groove portions in the thickness direction, effectively lining the entire top surface (in fig. 3C) in the plating layer. One of ordinary skill in the art would have been motivated to make this modification to increase thermal dissipation due to the metal plating layer covering the entire top surface (in fig. 3C) of the device. Discontinuities in the metal layer would be filled by the plating layer, increasing thermal dissipation (Yoshinaga 0007+0008). Adding recessed portions in the surface of the plating layer exclusively where the grooves are located would reduce material cost and decrease required travel distance for exiting heat, while still maintaining full surface contact between the plating layer and the top surface (fig. 3C) of the device. PNG media_image6.png 532 750 media_image6.png Greyscale Yoshinaga flipped fig. 2 Regarding claim 16, modified Ito, as modified by Yoshinaga, discloses the quantum-cascade laser element according to claim 15, wherein a pair of the recessed portions are provided, and the pair of recessed portions overlap the pair of groove portions respectively when viewed in the thickness direction of the semiconductor substrate. See claim 15 modification + Yoshinaga fig. 2. Recessed portions in plating layer overlap groove portions in thickness direction. Claim(s) 17, 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ito in view of Muraviev et al. (US-20150070698-A1). Regarding claim 17, modified Ito discloses a quantum-cascade laser device comprising: the quantum-cascade laser element according to claim1 (fig. 3C). Modified Ito does not disclose a drive unit that drives the quantum-cascade laser element. Muraviev discloses a quantum cascade laser with a drive unit that drives the quantum cascade laser with a continuous current (figs. 4 QCL DRIVER drives QCL, 0019 lines 3-6 “continuous current excitation”, 0038 final 3 lines). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to add a drive unit that drives the quantum-cascade laser element to continuously oscillate laser light. One of ordinary skill in the art would have been motivated to make this modification to facilitate device operation and control of a voltage and continuous current to the quantum cascade laser (Coy 0005 lines 1-5). Using continuous current instead of pulsed current would also provide more stable operation and fewer opportunities for malfunction during an on/off cycle. Regarding claim 19, modified Ito, as modified by Muraviev, discloses the quantum-cascade laser device according to claim 17, wherein the drive unit drives the quantum-cascade laser element to continuously oscillate laser light. See claim 17 modification. Muraviev 0019 lines 3-6 + 0038 final 3 lines. “continuous current excitation” Claim(s) 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ito in view of Muraviev et al. (US-20150070698-A1), Yoshinaga, and Hashimoto (JP-2013033824-A, machine translation “Hashimoto_English” cited and included herewith). Regarding claim 18, modified Ito, as modified by Muraviev, discloses the quantum-cascade laser device according to claim 17, further comprising: a support member including an electrode pad and supporting the quantum-cascade laser element (Ito fig. 7 support member 100 includes 101+102 pads and supports laser element, 0041). Modified Ito, as modified by Muraviev, does not disclose a joining material that joins the support member and the quantum-cascade laser element, wherein the quantum-cascade laser element includes a plating layer formed on the metal layer, a recessed portion is formed in a surface of the plating layer on a side opposite to the semiconductor substrate, and the joining material joins the electrode pad and the plating layer in a state where the semiconductor mesa is located on a side of the support member with respect to the semiconductor substrate and the joining material enters the recessed portion. Yoshinaga discloses a quantum cascade laser with a plating layer formed on a metal layer (Flipped fig. 2 to match orientation of Ito fig. 3C, metal plating layer 33 on metal layer 35, 0046 lines 5-6), wherein a recessed portion is formed in a surface of the plating layer on a side opposite to quantum cascade laser substrate (flipped fig. 2 two recessed portions formed in surface of 33 on side opposite to substrate 19, 0040 lines 1-2). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to add a metal plating layer formed on the metal layer, wherein a pair of recessed portions are formed in a surface of the plating layer on a side opposite to the semiconductor substrate in Ito, and those recessed portions are overlapping the pair of groove portions in the thickness direction, effectively lining the entire top surface (in fig. 3C) in the plating layer. One of ordinary skill in the art would have been motivated to make this modification to increase thermal dissipation due to the metal plating layer covering the entire top surface (in fig. 3C) of the device. Discontinuities in the metal layer would be filled by the plating layer, increasing thermal dissipation (Yoshinaga 0007+0008). Adding recessed portions in the surface of the plating layer exclusively where the grooves are located would reduce material cost and decrease required travel distance for exiting heat, while still maintaining full surface contact between the plating layer and the top surface (fig. 3C) of the device. After modification, plating layer now between metal layer and support member electrode pad. Ito, as modified by Muraviev and Yoshinaga, does not disclose a joining material that joins the support member and the quantum-cascade laser element, the joining material joins the electrode pad and the plating layer in a state where the semiconductor mesa is located on a side of the support member with respect to the semiconductor substrate and the joining material enters the recessed portion. Hashimoto discloses a quantum cascade semiconductor laser with a joining material that joins a support member and the quantum cascade semiconductor laser (fig. 6a solder S joins support member 2 and laser 1, lines 347-348 + 357-364). Hashimoto discloses this joining material climbing up the walls of recesses/grooves in the bottommost layer of the laser between the laser and the support member (fig. 6a S climbs up walls of grooves 31). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to add a joining material that joins the support member and the quantum-cascade laser element, the joining material joins the electrode pad and the plating layer in a state where the semiconductor mesa is located on a side of the support member with respect to the semiconductor substrate and the joining material enters the recessed portion. One of ordinary skill in the art would have been motivated to make this modification to increase the bond strength between the laser and the support member. Adding joining material into the recessed portion would increasing bond strength due to increased surface contact area between joining material and laser. This increased surface area would also improve thermal dissipation. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Alex Ehrlich whose telephone number is (703)756-5716. The examiner can normally be reached M-F 8-5. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, MinSun Harvey can be reached at (571) 272-1835. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /A.E./ Examiner, Art Unit 2828 /MINSUN O HARVEY/Supervisory Patent Examiner, Art Unit 2828
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Prosecution Timeline

Sep 26, 2022
Application Filed
May 17, 2025
Non-Final Rejection — §103
Jul 31, 2025
Response Filed
Aug 06, 2025
Final Rejection — §103
Oct 06, 2025
Response after Non-Final Action
Jan 12, 2026
Request for Continued Examination
Jan 23, 2026
Response after Non-Final Action
Apr 09, 2026
Non-Final Rejection — §103 (current)

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Expected OA Rounds
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3y 4m
Median Time to Grant
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