Prosecution Insights
Last updated: April 17, 2026
Application No. 17/916,318

THERMOELECTRIC ELEMENT

Final Rejection §103
Filed
Sep 30, 2022
Examiner
AYAD, TAMIR
Art Unit
1726
Tech Center
1700 — Chemical & Materials Engineering
Assignee
LG Innotek Co., Ltd.
OA Round
4 (Final)
42%
Grant Probability
Moderate
5-6
OA Rounds
3y 8m
To Grant
91%
With Interview

Examiner Intelligence

Grants 42% of resolved cases
42%
Career Allow Rate
298 granted / 705 resolved
-22.7% vs TC avg
Strong +49% interview lift
Without
With
+48.9%
Interview Lift
resolved cases with interview
Typical timeline
3y 8m
Avg Prosecution
59 currently pending
Career history
764
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
48.9%
+8.9% vs TC avg
§102
23.4%
-16.6% vs TC avg
§112
21.6%
-18.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 705 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claims 1-4, 6-15, and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Lin et al. (US 2016/0181500) in view of Yang et al. (US 2013/0081663) and further in view of Matsushita Electric Works Ltd. (JP H11268185 A), hereinafter referred to as Matsushita, see attached machine translation. Regarding claim 1, Lin discloses a thermoelectric element (abstract) comprising: a first substrate (102 in Fig. 4); a second insulating layer disposed on the first substrate (103 in Fig. 4; [0025]); first electrodes disposed on the second insulating layer (105 in Fig. 4; [0029]); a plurality of semiconductor structures disposed on the first electrodes (106 in Fig. 4; [0033]); and second electrodes disposed on the plurality of semiconductor structures (107 in Fig. 4; [0034]), wherein an upper surface of the second insulating layer includes a concave region that does not vertically overlap the first electrodes (shown in annotated Fig. 4 below), wherein the concave region is disposed between side surface of two adjacent first electrodes (concave region in relation to side surfaces of 105 in annotated Fig. 4 below), wherein the side surfaces of the two adjacent first electrodes are surfaces disposed to face each other (side surfaces of 105 in annotated Fig. 4 below), wherein a height of the concave region is greater than heights of lower surfaces of the two adjacent first electrodes (concave region in relation to lower surfaces of adjacent first electrodes 105 in annotated Fig. 4 below) and less than heights of upper surfaces of the two adjacent first electrodes, based on an upper surface of the first substrate (concave region in relation to heights of upper surfaces of first electrodes 105 in annotated Fig. 4 below). While Lin does disclose the height of the concave region is greatest in a region where the concave region is in direct contact with a side surface of the side surfaces of the two adjacent first electrodes, based on the upper surface of the first substrate (concave region in relation to side surface of 105 in annotated Fig. 4 below), Lin does not explicitly disclose the height of the concave region is greatest in regions where the concave region is in direct contact with the side surfaces of the two adjacent first electrodes, based on the upper surface of the first substrate. It would have been obvious to one of ordinary skill in the art at the time the invention was filed to rearrange the recesses in the insulating layer of Lin such that the sides of the recesses intersect the sides of 105 such that the intersection points represent the highest point with respect to the first substrate because such a modification would amount to a rearrangement of known parts, and it has been held that rearranging parts of an invention involves only routine skill in the art while the device having the claimed dimensions would not perform differently than the prior art device, In re Japikse, 86 USPQ 70. Additionally, such a modification is an obvious matter of design choice because such modification would involve a mere change in configuration. It has been held that a change in configuration of shape of a device is obvious, absent persuasive evidence that a particular configuration is significant. In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966). With regard to the limitation “wherein a depth of the concave region of the upper surface of the second insulating layer is greater than an average depth of a surface roughness of the lower surface of the second insulating layer,” the depth of the concave region depicted in annotated Fig. 4 below is necessarily greater than an average depth of a surface roughness of the lower surface of layer 103 because the lower surface of layer 103 is not a textured surface). Additionally, if the depth of the concave region of the upper surface, depicted in annotated Fig. 4 below, is not inherently greater than an average depth of a surface roughness of the lower surface of layer 103 due to the lower surface of layer 103 being a non-textured surface, such a modification would have involved a mere change in the size (or dimension) of a component. A change in size (dimension) is generally recognized as being within the level of ordinary skill in the art. In re Rose, 220 F.2d 459, 105 USPQ 237 (CCPA 1955). Where the only difference between the prior art and the claims is a recitation of relative dimensions of the claimed device, and the device having the claimed dimensions would not perform differently than the prior art device, the claimed device is not patentably distinct from the prior art device, Gardner v. TEC Systems, Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984). Lin does not explicitly disclose a first insulating layer disposed on the first substrate, wherein the first insulating layer is disposed between the first substrate and the second insulating layer. Yang discloses a thermoelectric element (abstract) and further discloses a first insulating layer disposed on a first substrate ([0053]; 123 on 121 in Fig. 3a), wherein the first insulating layer is disposed between the first substrate and a second insulating layer ([0054]). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to include a first insulating layer, as disclosed by Yang, between the second insulating layer and the first substrate of Lin, because as taught by Yang, the metal layer and the insulating film are joined by using the roughness secured oxidation layer which secures the reliability by drastically improving the adhesion force ([0052] – [0054]). Modified Lin discloses a lower surface of the second insulating layer is in contact with the rough surface of the upper surface of the first insulating layer (Yang; [0052] – [0054]). Modified Lin does not explicitly disclose wherein a first average value of absolute values of lengths from a center line to a profile curve of a rough surface of at least part of an upper surface of the first insulating layer is in the range of 1 to 5 microns. Matsushita discloses a method of forming an insulating layer on a metal plate ([0009]). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to form the first insulating layer and the first substrate of Yang such that the first insulating layer and the first substrate have the surface roughness values disclosed by Matsushita, because as taught by Matsushita, the method improves adhesion between the metal plate and the insulating layer and suppresses peeling between the insulating layer and the metal plate ([0024], [0050]). Modified Lin discloses a first average value of absolute values of lengths from a center line to a profile curve of a rough surface of at least part of an upper surface of the first insulating layer is in the range of 1 to 5 microns (Matsushita – paragraph [0020] discloses the surface roughness of the insulating layer is in the range of 1 to 5 microns). [AltContent: textbox (concave region)][AltContent: arrow][AltContent: oval] PNG media_image1.png 305 446 media_image1.png Greyscale Regarding claim 2, modified Lin discloses all the claim limitations as set forth above. Modified Lin further discloses a second average value of absolute values of lengths from a center line to a profile curve of a rough surface for at least a part of a surface in contact with the first insulating layer among two surfaces of the first substrate is greater than the first average value (Matsushita – paragraphs [0024] and [0050] disclose the surface roughness of the metal plate is formed to be 0.1 to 50 microns). Regarding claim 3, modified Lin discloses all the claim limitations as set forth above. Modified Lin further discloses the second average value is 50 microns (Matsushita – paragraphs [0024] and [0050] disclose the surface roughness of the metal plate is formed to be 0.1 to 50 microns). Regarding claim 4, modified Lin discloses all the claim limitations as set forth above. Modified Yang further discloses a composition of the first insulating layer (Yang - oxidation layer, [0053] L8) is different from a composition of the second insulating layer (Lin – [0027]). Regarding claim 6, modified Lin discloses all the claim limitations as set forth above. Modified Lin further discloses the first insulating layer includes an Al-O bond (Yang – [0053] L8; [0056]). Modified Lin does not explicitly disclose the second insulating layer includes a resin layer formed of a resin composition including an inorganic filler and at least one of an epoxy resin and a silicon resin. Yang discloses a second insulating layer including a resin layer formed of a resin composition including an inorganic filler ([0064]) and an epoxy resin ([0060]). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to form the second insulating layer of modified Lin with a resin layer formed of a resin composition including an inorganic filler and an epoxy resin, as disclosed by Yang, because as taught by Yang, the polymer resin provides excellent electrical insulation ([0062]), and the ceramic fillers have excellent electrical insulation and have high thermal conductivity, and in the case when they are filled in the polymer resin, the efficiency of heat transfer of the thermoelectric module in accordance with the present invention can be improved further ([0064]). Regarding claim 7, modified Lin discloses all the claim limitations as set forth above. Modified Lin further discloses a third insulating layer disposed on the second electrodes (Lin – upper 103 in Fig. 4); and a second substrate disposed on the third insulating layer (Lin – upper 102 in Fig. 4). Modified Lin does not explicitly disclose the third insulating layer includes a resin layer formed of a resin composition including an inorganic filler and at least one of an epoxy resin and a silicon resin. Yang discloses an insulating layer includes a resin layer formed of a resin composition including an inorganic filler (Yang – [0068]) and an epoxy resin (Yang – [0060]). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to form the third insulating layer of modified Lin with a resin layer formed of a resin composition including an inorganic filler and an epoxy resin, as disclosed by Yang, because as taught by Yang, the polymer resin provides excellent electrical insulation ([0062]), and the ceramic fillers have excellent electrical insulation and have high thermal conductivity, and in the case when they are filled in the polymer resin, the efficiency of heat transfer of the thermoelectric module in accordance with the present invention can be improved further ([0064]). Regarding claim 8, modified Lin discloses all the claim limitations as set forth above. Modified Lin does not explicitly disclose a fourth insulating layer which is disposed between the third insulating layer and the second substrate and has a composition and elasticity which are different from a composition and elasticity of the third insulating layer, wherein a third average value of absolute values of lengths from a center line to a profile curve of a rough surface for at least a part of a surface in contact with the third insulating layer among two surfaces of the fourth insulating layer is in the range of 1 to 5 microns. Yang discloses a thermoelectric element (abstract) and further discloses an insulating layer ([0053] discloses an oxidation layer on metal layer 111; Fig. 3a), wherein the insulating layer is disposed between the substrate and another insulating layer ([0054]). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to include a fourth insulating layer, as disclosed by Yang, between the third insulating layer and the second substrate of Lin, because as taught by Yang, the metal layer and the insulating film are joined by using the roughness secured oxidation layer which secures the reliability by drastically improving the adhesion force ([0052] – [0054]). Modified Lin further discloses a fourth insulating layer which is disposed between the third insulating layer and the second substrate and has a composition and elasticity which are different from a composition and elasticity of the third insulating layer (Yang – [0053]), wherein a third average value of absolute values of lengths from a center line to a profile curve of a rough surface for at least part of a surface in contact with the third insulating layer among two surface of the fourth insulating layer is in the range of 1 to 5 (Matsushita - [0024] and [0050] disclose a surface roughness range of 0.1 to 50 microns; it would have been obvious to one of ordinary skill in the art at the time of invention to have selected the overlapping portion of the ranges disclosed by the reference because selection of overlapping portion of ranges has been held to be a prima facie case of obviousness. In re Malagari, 182 USPQ 549). Regarding claim 9, modified Lin discloses all the claim limitations as set forth above. While modified Lin does disclose the second substrate includes an aluminum substrate (Lin – [0025]), modified Lin does not explicitly disclose an aluminum oxide layer disposed between the third insulating layer and the second substrate. Yang discloses an aluminum oxide layer disposed between the third insulating layer and the second substrate ([0053], [0056]). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to include an aluminum oxide layer, as disclosed by Yang, between the third insulating layer and the second substrate of modified Lin, because as taught by Yang, the metal layer and the insulating film are joined by using the roughness secured oxidation layer which secures the reliability by drastically improving the adhesion force ([0052] – [0054]). Regarding claim 10, modified Lin discloses all the claim limitations as set forth above. Modified Lin further discloses a heat sink disposed on a substrate (Lin – [0038], fins). Regarding claim 11, modified Lin discloses all the claim limitations as set forth above. Modified Lin further discloses the first average value is in the range of 3 to 5 microns (Matsushita - paragraph [0020] discloses the surface roughness of the insulating layer is in the range of 1 to 5 microns; it is noted that it would have been obvious to one of ordinary skill in the art at the time of invention to have selected the overlapping portion of the ranges disclosed by the reference because selection of overlapping portion of ranges has been held to be a prima facie case of obviousness. In re Malagari, 182 USPQ 549). Regarding claim 12, modified Lin discloses all the claim limitations as set forth above. Modified Lin further discloses the first average value is in the range of 4 to 5 microns (Matsushita - paragraph [0020] discloses the surface roughness of the insulating layer is in the range of 1 to 5 microns; it is noted that it would have been obvious to one of ordinary skill in the art at the time of invention to have selected the overlapping portion of the ranges disclosed by the reference because selection of overlapping portion of ranges has been held to be a prima facie case of obviousness. In re Malagari, 182 USPQ 549). Regarding claim 13, modified Lin discloses all the claim limitations as set forth above. Modified Lin further discloses a thickness of the first insulating layer is 30 microns (Yang – [0081]). Regarding claim 14, modified Lin discloses all the claim limitations as set forth above. Modified Lin further discloses the aluminum oxide layer is disposed on an entire surface of the aluminum substrate (Yang - [0053], [0056]). Regarding claim 15, modified Lin discloses all the claim limitations as set forth above. Modified Lin further discloses the plurality of semiconductor structures include a first conductive semiconductor structure and a second conductive semiconductor structure (Lin – 106a and 106b in Fig. 4). Regarding claim 19, modified Lin discloses all the claim limitations as set forth above. Modified Lin further discloses the second average value (Yang - paragraphs [0024] and [0050] disclose 50 microns) is 10 times the first average value (Yang - paragraph [0020] discloses the surface roughness of the insulating layer is in the range of 1 to 5 microns). Response to Arguments Applicant’s arguments with respect to claims 1-4, 6-15, and 19 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to TAMIR AYAD whose telephone number is (313) 446-6651. The examiner can normally be reached Monday - Friday, 8:30am - 5pm EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jeff Barton can be reached at (571) 272-1307. The fax phone number for the organization where this application or proceeding is assigned is (571) 273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at (866) 217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call (800) 786-9199 (IN USA OR CANADA) or (571) 272-1000. /TAMIR AYAD/Primary Examiner, Art Unit 1726
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Prosecution Timeline

Sep 30, 2022
Application Filed
Aug 17, 2024
Non-Final Rejection — §103
Nov 20, 2024
Response Filed
Dec 02, 2024
Final Rejection — §103
Feb 28, 2025
Request for Continued Examination
Mar 03, 2025
Response after Non-Final Action
Apr 05, 2025
Non-Final Rejection — §103
Jul 01, 2025
Response Filed
Sep 30, 2025
Final Rejection — §103
Apr 16, 2026
Response after Non-Final Action

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

5-6
Expected OA Rounds
42%
Grant Probability
91%
With Interview (+48.9%)
3y 8m
Median Time to Grant
High
PTA Risk
Based on 705 resolved cases by this examiner. Grant probability derived from career allow rate.

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