Prosecution Insights
Last updated: April 18, 2026
Application No. 17/916,894

SEMICONDUCTOR APPARATUS, TEMPERATURE COMPENSATION SYSTEM, AND ALARM SYSTEM

Non-Final OA §102
Filed
Oct 04, 2022
Examiner
MANCINI, EVAN THOMAS
Art Unit
2855
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Sony Semiconductor Solutions Corporation
OA Round
3 (Non-Final)
51%
Grant Probability
Moderate
3-4
OA Rounds
3y 7m
To Grant
90%
With Interview

Examiner Intelligence

Grants 51% of resolved cases
51%
Career Allow Rate
20 granted / 39 resolved
-16.7% vs TC avg
Strong +39% interview lift
Without
With
+38.6%
Interview Lift
resolved cases with interview
Typical timeline
3y 7m
Avg Prosecution
30 currently pending
Career history
69
Total Applications
across all art units

Statute-Specific Performance

§101
2.6%
-37.4% vs TC avg
§103
44.5%
+4.5% vs TC avg
§102
34.7%
-5.3% vs TC avg
§112
17.9%
-22.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 39 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on January 13th, 2026 has been entered. Response to Amendment The amendment filed January 13th, 2026 has been entered. Claims 1, 3, 5-11, 13, 16, 18, and 21-22 remain pending in the application. Claims 2, 12, and 17 have been cancelled by the applicant. Response to Arguments Applicant argues that Samsung (US 20190057918 A1 referred to by applicant as “Park”) fails to disclose impedance element and electrical signal of claim 1, stating on pages 7-8 of the remarks filed January 13th, 2026 that Samsung “does not disclose the alleged impedance element (sensor 470) being electrically connected between two pad electrodes of the chip such that the two pad electrodes themselves are the sensor's measurement terminals” and “fails to disclose externally applying a measurement signal between two pad electrodes connected with the sensor to measure chip temperature.” As cited in the previous Office Action and restated below, Samsung teaches in figures 7, 9-10, and 13-15 and at least paragraphs 3, 10, 38, 61, 83, and 93 a temperature sensor (470) electrically connected between back side electrode pads (270) and front side electrode pads (360) through electrodes (425) and an electric signal applied between the two electrical pads. In said figures and paragraphs, Samsung explicitly teaches that the chip structure is integrated into larger electronic devices such as a digital camera, mobile phone, security device, etc.. As standard, these electronic devices comprise a power source, such as a battery, that externally applies electric signals to the electrode terminals of the chip. The examiner would like to emphasize that, although the understanding of the claim language may be aided by explanations contained in the written description, it is improper to import claim limitations from the specification, including those stated in the Arguments/Remarks made in Amendment (MPEP 2111.01(II)). In the present instance, language including “such that the two pad electrodes themselves are the sensor's measurement terminals” and “pad-bracketing structure” as disclosed on page 7 of the Remarks will be consulted to aid in the determination of the structure, material, and function recited in the claim but will not be imported into the claims as a limitation. Only the words of the claims interpreted under their broadest reasonable interpretation will be given patentable weight (MPEP 2111.01(I). Accordingly, the words of claim 1, including amended lines 5-6 and amended lines 11-13 are given their plain meaning under the broadest reasonable interpretation as would be understood by a person having ordinary skill in the art (MPEP 2111.01(I)). One of ordinary skill in the art would understand that Samsung explicitly discloses an impedance element (470) electrically connected between two pad electrodes (270, 360) and an electric signal externally applied to the two pad electrodes connected with the impedance element to measure a temperature of the semiconductor chip (1).. Accordingly, amended claim 1 is rejected. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1, 3, 5-11, 13, 16, 18, and 21-22 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Samsung Electronics Co (US 20190057918 A1), hereinafter referred to as Samsung. Regarding Claim 1: Samsung discloses a semiconductor apparatus (chip structure including heating element in at least figures 7, 9-10, and 13-15, the description, and the claims) comprising: a semiconductor chip (fig. 10: chip structure 1); a pixel array section including a plurality of pixels (fig.’s 10 and 15: upper chip structure 10 with pixel array region PX stacked above lower chip structure 30); a plurality of pad electrodes formed in the semiconductor chip (fig. 10, par.’s 61 and 83: back side electrode pads 270 on first lower chip structure 20, front side electrode pads 360 on second lower chip structure 30 electrically connected to lower through electrodes 425. See also fig. 10 and par. 63: pad regions 415p of upper through electrodes); an impedance element configured as a temperature-dependent element (fig.’s 7 and 10 and par. 93: “The temperature sensor 470 in the heating region HA may be a resistance temperature sensor using the principle in which resistance is changed according to a change in a temperature”, “The sensor contact regions 470c_1, 470c_2, 470c_3, and 470c_4 may be disposed on the same plane as that of the first and second heating element contact regions (450c_1 and 450c_2 of FIG. 7)” ) and disposed such that the impedance element is electrically connected between two pad electrodes of the plurality of pad electrodes (fig. 10 and par.’s 88 and 93: resistance temperature sensor 470 connected through electrodes 425. See also fig.’s 9 and 15 and par. 98: 470 may be disposed on upper or lower chip portions1.); and a temperature sensor that measures a temperature inside a device (par. 93: “The temperature sensor 470 in the heating region HA may be a resistance temperature sensor using the principle in which resistance is changed according to a change in a temperature”), the temperature sensor being located in a peripheral circuit section of the pixel array section (fig. 10: temperature sensor element 470 is outside the boundary of the pixel array section PX), wherein the semiconductor apparatus is configured to measure a temperature of the semiconductor chip by externally applying an electrical signal between the two pad electrodes connected with the impedance element, the electrical signal being applied from outside of the semiconductor chip to the two pad electrodes (par. 93: “The temperature sensor 470 in the heating region HA may be a resistance temperature sensor using the principle in which resistance is changed according to a change in a temperature.” See also par. 3 and par. 38: chip structure is mounted in or on an electronic device such as a digital camera, mobile phone, security device, etc. That is, the electric signals applied to the chip structure as disclosed originate from a battery or other device power source that is connected to, but outside of, the chip structure.). Regarding Claim 3: Samsung discloses a semiconductor apparatus according to claim 1, further disclosing wherein the impedance element is a resistance element (par. 93: “The temperature sensor 470 in the heating region HA may be a resistance temperature sensor using the principle in which resistance is changed according to a change in a temperature”). Regarding Claim 5: Samsung discloses the semiconductor apparatus according to claim 1, further disclosing wherein the size of the two pad electrodes connected with the impedance element is larger than the size of another pad electrode (fig. 10: pad regions 415p of upper through electrodes are larger than back side electrode pads 270 on first lower chip structure 20, par. 65: 415p are electrically connected to lower chip structure). Regarding Claim 6: Samsung discloses the semiconductor apparatus according to claim 1, further disclosing wherein the size of the two pad electrodes connected with the impedance element is smaller than the size of another pad electrode. (fig. 10, par.’s 61 and 83: back side electrode pads 270 on first lower chip structure 20, front side electrode pads 360 on second lower chip structure 30 electrically connected to temperature sensor through lower through electrodes 425 are both smaller than pad regions 415p of upper through electrodes). Regarding Claim 7: Samsung discloses semiconductor apparatus according to claim 1, further disclosing wherein the two pad electrodes connected with the impedance element are provided such that another pad electrode is sandwiched between two pad electrodes (fig. 10: outer electrodes in lower chip structure sandwich a central electrode in lower chip structure. Note: each electrode is labelled 425 and electrically connected to their own respective back side electrode pad 270.) Regarding Claim 8: Samsung discloses the semiconductor apparatus according to claim 1, further disclosing wherein the two pad electrodes connected with the impedance element each include multiple pad electrodes that are adjacent and electrically connected to each other (fig. 10 and par.’s 61 and 83: each of the three electrodes 425 on the lower chip structure are electrically connected to respective adjacent back side electrode pads 270 on first lower chip structure 20, front side electrode pads 360) Regarding Claim 9: Samsung discloses wherein semiconductor apparatus according to claim 1, further disclosing wherein the pad electrodes connected with the impedance element are three or more pad electrodes, and the number of the pad electrodes connected with the impedance element is three or more, and a wiring that electrically connects the three or more pad electrodes and the impedance element is a wiring that has a conductor length, conductor material, wire diameter, and electrical resistance that are equal (fig. 10 and par.’s 61 and 83: three electrodes 425 each connected to respective adjacent back side electrode pads 270 on first lower chip structure 20, front side electrode pads 360, fig. 13 and par. 93: first to fourth sensor wiring lines 470i_1, 470i_2, 470i_3, and 470i_4 electrically connected to the temperature sensor 470 shown to be of the same length and diameter, par. 54: use of the same conductive material for wiring)2. Regarding Claim 10: Samsung disclose the semiconductor apparatus according to claim 1, further disclosing wherein the semiconductor apparatus is an image capturing apparatus (par. 2: “The present inventive concept relates to a chip structure, and more particularly, to a chip structure including a heating element capable of heating a pixel array region of an image sensor.” ), the semiconductor chip is a stacked structure semiconductor chip in which a first semiconductor chip and a second semiconductor chip are stacked and electrically connected to each other, the pixel array section is formed on the first semiconductor chip (fig.’s 10 and 15: upper chip structure 10 with pixel array region PX stacked above lower chip structure 30. See also par. 65: “the upper through electrodes 415 extend into the first portion 20F of the first lower chip structure 20 to be electrically connected to the first side wiring 235 in the first portion 20F of the first lower chip structure 20. Thus, the upper chip structure 10, the first lower chip structure 20, and the second lower chip structure 30 may be electrically connected to each other.”), the peripheral circuit section is formed on the second semiconductor chip (fig. 10: peripheral sections surrounding pixel array region PX on successive layers of semiconductor. See also par. 95: an internal circuit in the first portion 20F of the first lower chip structure 20 may be used to determine whether temperature variations of temperatures sensed by the temperature sensors 470 are within a set value), the impedance element is provided in the first semiconductor chip (fig. 15: first side portion including temperature sensor 270 disposed on upper chip structure), and the two pad electrodes connected with the impedance element are provided in the second semiconductor chip (fig. 10, par.’s 61 and 83: back side electrode pads 270 on first lower chip structure 20, front side electrode pads 360 on second lower chip structure 30 electrically connected to temperature sensor through lower through electrodes 425). Regarding Claim 11: Samsung discloses a temperature compensation system (chip structure including heating element in at least figures 7, 9-10, and 13-15, the description, and the claims) comprising the semiconductor apparatus according to claim 1 (See rejection of claim 1 above. See also fig. 10 and par.’s 88 and 93: chip structure 1 having resistance temperature sensor 470 connected through electrodes 425, fig.’s 10 and 14 and par. 111: heating element 450, and fig. 14 and par. 95: heating element responds to compensate for temperature variations measured by temperature sensor). Regarding Claim 13: Samsung discloses the temperature compensation system according to claim 11, further disclosing wherein the impedance element is a resistance element (par. 93: “The temperature sensor 470 in the heating region HA may be a resistance temperature sensor using the principle in which resistance is changed according to a change in a temperature”). Regarding Claim 16: Samsung discloses an alarm system (chip structure including heating element in at least figures 7, 9-10, and 13-15, the description, and the claims) comprising the semiconductor apparatus according to claim 1 (See rejection of claim 1 above. See also fig. 14 and par. 95: heating element responds to compensate for temperature variations measured by temperature sensor, par. 95: heating element indicates response to temperature variations measured by temperature sensor, and par. 106 and fig. 23: communications element on lower chip structure 30 allows sensor information to be relayed to user)3. Regarding Claim 18: Samsung discloses the alarm system according to claim 16, further disclosing wherein the impedance element is a resistance element (par. 93: “The temperature sensor 470 in the heating region HA may be a resistance temperature sensor using the principle in which resistance is changed according to a change in a temperature”). Regarding Claim 21: Samsung discloses the temperature compensation system according to claim 11, wherein the semiconductor apparatus is an image capturing apparatus (par. 2: “The present inventive concept relates to a chip structure, and more particularly, to a chip structure including a heating element capable of heating a pixel array region of an image sensor.” ), the semiconductor chip is a stacked structure semiconductor chip in which a first semiconductor chip and a second semiconductor chip are stacked and electrically connected to each other (fig. 10 and par. 93: upper chip structure 10, first lower chip structure 20, and second lower chip structure 30 electrically connected through at least the first to fourth sensor wiring lines. See also par. 65: “the upper through electrodes 415 extend into the first portion 20F of the first lower chip structure 20 to be electrically connected to the first side wiring 235 in the first portion 20F of the first lower chip structure 20. Thus, the upper chip structure 10, the first lower chip structure 20, and the second lower chip structure 30 may be electrically connected to each other.” ), the pixel array section is formed on the first semiconductor chip (fig. 10: pixel array region PX on upper chip structure 10), the peripheral circuit section is formed on the second semiconductor chip (fig. 10: peripheral regions containing 470 in lower chip structure 20), the impedance element is provided in the first semiconductor chip (fig. 10, par.’s 61-63, par. 65, and par. 93: through electrodes 425 connected via wiring 235 to upper through electrodes 415 serve as the impedance element connected to temperature sensor 470. See fig. 10: electrodes 415 are provided in the upper chip structure 10. Furthermore, see par. 65: fig.’s 9 and 15 and par. 98: 470 may be disposed on upper or lower chip portions), and the two pad electrodes connected with the impedance element are provided in the second semiconductor chip (fig. 10, par.’s 61 and 83: back side electrode pads 270 on first lower chip structure 20, front side electrode pads 360 on second lower chip structure 30 electrically connected to temperature sensor through lower through electrodes 425). Regarding Claim 22: Samsung discloses the alarm system according to claim 16, wherein the semiconductor apparatus is an image capturing apparatus (par. 2: “The present inventive concept relates to a chip structure, and more particularly, to a chip structure including a heating element capable of heating a pixel array region of an image sensor.” ), the semiconductor chip is a stacked structure semiconductor chip in which a first semiconductor chip and a second semiconductor chip are stacked and electrically connected to each other (fig. 10 and par. 93: upper chip structure 10, first lower chip structure 20, and second lower chip structure 30 electrically connected through at least the first to fourth sensor wiring lines. See also par. 65: “the upper through electrodes 415 extend into the first portion 20F of the first lower chip structure 20 to be electrically connected to the first side wiring 235 in the first portion 20F of the first lower chip structure 20. Thus, the upper chip structure 10, the first lower chip structure 20, and the second lower chip structure 30 may be electrically connected to each other.”), the pixel array section is formed on the first semiconductor chip (fig. 10: pixel array region PX on upper chip structure 10), the peripheral circuit section is formed on the second semiconductor chip (fig. 10: peripheral regions containing 470 in lower chip structure 20), the impedance element is provided in the first semiconductor chip (fig. 10, par.’s 61-63, par. 65, and par. 93: through electrodes 425 connected via wiring 235 to upper through electrodes 415 serve as the impedance element connected to temperature sensor 470. See fig. 10: electrodes 415 are provided in the upper chip structure 10. Furthermore, see par. 65: fig.’s 9 and 15 and par. 98: 470 may be disposed on upper or lower chip portions)3, and the two pad electrodes connected with the impedance element are provided in the second semiconductor chip (fig. 10, par.’s 61 and 83: back side electrode pads 270 on first lower chip structure 20, front side electrode pads 360 on second lower chip structure 30 electrically connected to temperature sensor through lower through electrodes 425). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure includes: Nippon Electric Engineering (JP H05235253 A) discloses claims 1 and 3 in their entirety. Junpei (JP 2011086742 A) discloses the semiconductor apparatus according to claims 1, 3 and 8, and the temperature compensation system of claims 11 and 13-15. Renesas Electronics Corp (JP 2015002229 A) discloses the semiconductor apparatus according claims 1, 3, and 5-8 and the temperature compensation system of claims 11 and 13-15. Ahn (US 20180045664 A1) discloses the temperature compensation system according to claims 11 and 13-15. Tanaka (US 6890097 B2) discloses the semiconductor apparatus according to claims 1,3, 7-9, and the temperature compensation system according to claims 11 and 13-15. Any inquiry concerning this communication or earlier communications from the examiner should be directed to EVAN MANCINI whose telephone number is (703)756-5796. The examiner can normally be reached Mon-Fri 8AM-5PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, KRISTINA DEHERRERA can be reached at (303)297-4237. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /EVAN MANCINI/Examiner, Art Unit 2855 /KRISTINA M DEHERRERA/Supervisory Patent Examiner, Art Unit 2855 2/17/26 1 Figures 9 and 15 correspond to the same embodiment as stated in paragraph 98. 2 It is inherent that wires of equal length, material, and diameter will have equal electrical resistance. 3 Figures 9 and 15 correspond to the same embodiment as stated in paragraph 98.
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Prosecution Timeline

Oct 04, 2022
Application Filed
Feb 18, 2025
Non-Final Rejection — §102
Aug 04, 2025
Response Filed
Oct 23, 2025
Final Rejection — §102
Jan 13, 2026
Response after Non-Final Action
Jan 26, 2026
Request for Continued Examination
Feb 04, 2026
Response after Non-Final Action
Feb 13, 2026
Non-Final Rejection — §102
Apr 07, 2026
Response Filed

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
51%
Grant Probability
90%
With Interview (+38.6%)
3y 7m
Median Time to Grant
High
PTA Risk
Based on 39 resolved cases by this examiner. Grant probability derived from career allow rate.

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