Prosecution Insights
Last updated: April 19, 2026
Application No. 17/918,796

ELECTRONIC COMPONENT, ELECTRONIC DEVICE, AND METHOD FOR MANUFACTURING ELECTRONIC COMPONENT

Non-Final OA §102§103
Filed
Oct 13, 2022
Examiner
SAN MARTIN, JAYDI A
Art Unit
2837
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Kyocera Corporation
OA Round
1 (Non-Final)
85%
Grant Probability
Favorable
1-2
OA Rounds
2y 8m
To Grant
97%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allow Rate
859 granted / 1015 resolved
+16.6% vs TC avg
Moderate +12% lift
Without
With
+12.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
18 currently pending
Career history
1033
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
42.1%
+2.1% vs TC avg
§102
40.8%
+0.8% vs TC avg
§112
9.2%
-30.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1015 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Specification The specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant's cooperation is requested in correcting any errors of which applicant may become aware in the specification. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-6 and 11-13 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Tajima et al. (US20140339957, hereinafter Tajima). Regarding claim 1, Tajima discloses an electronic component (Fig. 1A) comprising: a chip (10) having a first surface and including a functional part (14) occupying a portion of the first surface and configured to vibrate (SAW element), and a terminal (18) occupying another portion of the first surface and electrically connected to the functional part; an intermediate member (vertical wall on both sides of the SAW element forming the cavity) stacked on the first surface, including, above the functional part, a first through hole (cavity 12a) extending through the intermediate member in a direction in which the first surface faces, and thereby surrounding the functional part when the first surface is viewed in plan view (Fig. 1B shows the inner wall of the cavity with a dashed line); a lid (12) stacked on a surface of the intermediate member on an opposite side from the chip and closing the first through hole; and an electrically conductive bonding member (16) electrically connected to the terminal and including a portion located on an opposite side of the lid from the intermediate member (Figs. and 1B show the intermediate member and the electrical connections), wherein the intermediate member surrounds the terminal as well as the functional part when the first surface is viewed in plan view as a result of the first through hole of the intermediate member being located above the terminal as well as above the functional part (Fig. 1B shows the wall of the cavity surrounding the terminals and the SAW element), the lid includes a second through hole (12b) extending through the lid in a direction in which the first surface faces at a position overlapping the terminal out of the functional part and the terminal when the first surface is viewed in plan view (See Figs. 1A and 1B), and the bonding member (16) includes a portion located on an opposite side of the second through hole from the intermediate member, a portion located inside the second through hole, and a portion located inside the first through hole and bonded to the terminal (16 is extracted from the inside of the cavity to the outside of the upper surface of the lid via the through hole). Regarding claim 2, the bonding member (solder 16) is composed of sin and silver. The liquid phase line temperature of Sn-Ag is about 221°C (depending on the composition and additives) and less than 450°C. Regarding claim 3, the bonding member includes a portion located in an area surrounding the second through hole out of a surface of the lid on an opposite side from the intermediate layer. See Fig. 1A. Regarding claim 4, the lid includes a conductor (plated layer 22) forming an inner surface of the second through hole from an end of the second through hole on a side near the intermediate member to an end of the second through hole on an opposite side from the intermediate member, and the bonding member is in contact with the conductor. See Fig. 1A. Regarding claim 5, the lid includes an insulating substrate (12, inorganic insulating material, paragraph [0024])stacked on the intermediate member and closing the first through hole, and a conductor (22) stacked on an area surrounding the second through hole out of a surface of the insulating substrate on an opposite side from the intermediate member, and the bonding member is in contact with the conductor. See Fig. 1A. Regarding claim 6, the lid includes an insulating substrate (12) stacked on the intermediate member (vertical wall) and closing the first through hole (cavity), and a conductor (22) stacked on an area surrounding the second through hole out of a surface of the insulating substrate on a side near the intermediate member, and the bonding member is in contact with the conductor. See Fig. 1A. Regarding claim 11, the functional part includes a piezoelectric body (substrate made of a piezoelectric material) and an excitation electrode (IDT) located on the piezoelectric body and electrically connected to the terminal. Regarding claim 12, Fig. 15 shows and electronic device comprising an electronic component (100), a mounting substrate (55) having a mounting surface facing a side of the electronic component where the lid is located and including a pad that occupies a portion of the mounting surface and to which the bonding member is bonded; and a sealing portion (52, 53) covering at least a portion of an outer peripheral surface of the chip on a side near the mounting surface and closely contacting the mounting surface. Regarding claim 13, the method of manufacturing the electronic component comprising the steps of boning the chip, the intermediate member and the lid to each other and a bonding member disposing step in which, after the bonding step, the bonding member, in a molten state, is supplied into the second through hole and bonds to the terminal is considered to be inherent in the disclosure of Tajima. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 9 and 10 are rejected under 35 U.S.C. 103 as being unpatentable over Tajima. Regarding claim 9, Tajima discloses the invention as explained above, wherein the lid comprises an insulating material. However, Tajima fails to disclose the insulating substrate consisting of a base material composed of resin and a reinforcing material composed of glass located inside the base material. Selection from among known, suitable materials has long been held to be within the skill expected of the routineer and therefore obvious to one of ordinary skill in the art. It is the examiner’s position that forming the lid of resin and a reinforcing material composed of glass would have been a matter of design choice. The examiner takes Official Notice that the use of glass fiber and resin, that is, a glass fiber reinforced plastic is old and well known in the art of semiconductors, especially to improve the mechanical strength of the lid when the lid has to withstand great pressure differences during the manufacturing process. Regarding claim 10, Tajima discloses the invention as explained above, but fails to explicitly disclose the claimed characteristics of the material forming the intermediate member and the lid. Selection from among known, suitable materials has long been held to be within the skill expected of the routineer and therefore obvious to one of ordinary skill in the art. Therefore, it would have been an obvious matter of design choice to determine the materials used to form the intermediate member and the lid and their characteristics, e.g. coefficient of thermal expansion and glass transition temperature, since the applicant has not disclosed that such features solve any problem or are for a particular reason. It appears that the claimed invention would perform equally well with the lid and intermediate member made of the same material. Therefore, it would have been obvious to one with ordinary skill in the before the effective filing date of the instant application to make the intermediate member out of a material having a coefficient of linear expansion smaller than a coefficient of linear expansion of the lid, and a glass transition temperature larger than a glass transition temperature of the lid, as necessitated by the specific requirements of the particular application. Allowable Subject Matter Claims 7 and 8 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. See PTO-892. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Jaydi San Martin whose telephone number is (571)272-2018. The examiner can normally be reached on M-Th 7:45-6:00pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dedei Hammond can be reached on 571-270-7938. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /J. San Martin/ Primary Examiner, Art Unit 2837
Read full office action

Prosecution Timeline

Oct 13, 2022
Application Filed
Jan 02, 2026
Non-Final Rejection — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
85%
Grant Probability
97%
With Interview (+12.1%)
2y 8m
Median Time to Grant
Low
PTA Risk
Based on 1015 resolved cases by this examiner. Grant probability derived from career allow rate.

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