DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 1/12/2026 has been entered.
Response to Amendment
The amendments to Claims 1, 3, 12, 15-16 in the submission filed 1/12/2026 are acknowledged and accepted.
Response to Arguments
The Applicants’ arguments, see in particular Page 5 of the submission, filed 1/12/2026, with respect to the rejections in Section 8 of the Office Action dated 10/23/2025, have been fully considered and are persuasive. The rejections in Section 8 of the Office Action dated 10/23/2025 have been withdrawn.
The Applicants' arguments with respect to the rejections of Claims 1-17 in Section 11 of the Office Action dated 10/23/2025, have been considered but are moot in view of the new ground(s) of rejection as set forth below.
Claims 1-17 are now rejected as follows.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 1-17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Bunandar et al. (U.S. Patent Application Publication US 2020/0142441 A1), of record, in view of Bunandar ‘783 (U.S. Patent Application Publication US 2021/0036783 A1).
Bunandar et al. discloses a system (See for example Abstract; Figures 1-11) comprising an engine (See for example 110 in Figure 1; Figures 2, 10) receiving at least one input (See for example matrices A and B in Figure 2) and configured to conduct optical and electro-optical tensor operations of the one or more inputs (See Figure 2; Paragraphs 0033, 0036; See also 202 in Figure 2; Paragraphs 0037, 0039). Bunandar et al. further discloses an electronic input and an optical input (See for example matrices A and B in Figure 2; electrical signals (not shown) required to drive elements 202 in Figure 2; or, optical source inputs 108 and electronic input from 110 to 102 in Figure 1, Paragraphs 0036-0037), wherein said engine is configured to conduct the optical tensor operations of the optical input and the electronic input (See Figure 2; Paragraphs 0033, 0036-0037); said system is a photonic tensor core (PTC) processor (See for example Figure 2) comprising modular PTC sub-modules (See for example sub-modules outputting C11, C21, C31, C12, C22, C32, C13, C23, C33 in Figure 2), which perform multiply-accumulate (MAC) operations (See for example Figure 3; Paragraphs 0049, 0052-0055); the system comprising a plurality of PTC sub-modules (See for example sub-modules outputting C11, C21, C31, C12, C22, C32, C13, C23, C33 in Figure 2); the tensor operation comprises one or any combination of the following operations: Matrix-Matrix Multiplication, Matrix-Vector Multiplication, Scalar Product, Pointwise multiplication between matrices, 1-Dimensional Convolution, (Decompose as Matrix-vector Multiplication}, 2-Dimensional Convolution, or a Product for a scalar (See Figure 2; Paragraphs 0033, 0036); PTC sub-modules based on integrated photonics, and fiber optics, and optical free-space that optically multiplies a first input and a second input and sums an output (See for example Figure 2, wherein the sub-modules utilize integrated photonics devices); the optical multiplication and summing comprises a MAC operation (See for example Figure 3; Paragraphs 0049, 0052-0055); said PTC sub-modules having an output that is an electrical signal output or an optical signal output, and further comprising a combination of modulators for multiplication, photodetectors for accumulation, amplifiers, waveguides, fibers, or free-space optical components (See Figure 2); said optical and electro-optical tensor operations comprise dot-product operations (See Figure 2-3; Paragraphs 0033, 0036-37); the dot-product operations are performed electro-optically, thermo-optically, and all-optically (See Figure 2-3; Paragraphs 0033, 0036-37); the accumulation of the MAC operation is performed either by incoherent summation with a photodetector or coherently with y-combiners (See for example 208 and detectors in Figure 2; Paragraph 0033); the at least one input is either analog or digital include or omit analog converters (DAC), or any combination thereof (See for example Figures 2-3; Paragraph 0056, wherein the system may utilize ADC and DAC to achieve a particular readout precision); said engine comprising a multiplexer receiving the at least one input and combining the at least one input onto either a single bus or plurality of busses, a spectral filter dropping a wavelength signal, a multiplier for dot multiplication of the at least one input, and a signal output summation to complete a MAC operation (See for example 202, 204, 206, 208, detectors in Figures 1-2); said engine comprising a MAC operation engine to conduct optical and electro-optical tensor operations of the at last one input without multiplexing or demultiplexing the at least one input (See for example Figure 3; Paragraphs 0049, 0052-0055); and further comprising a plurality of PTC sub-modules and electrical control lines coupling each of a plurality of photonic dot product engines as part of an electrical control circuitry, or each of said plurality of photonic dot product engines can be separately addressed (See for example Figures 1-2, 10).
Bunandar et al. discloses the invention as set forth above, except for the engine being optically incoherent, the at least one input having multiple wavelengths, and the engine conducting operations on the at least one input using wavelength division multiplexing of said at least one input to parallel process the multiple wavelengths for the optical and electro-optical tensor operations. However, Bunandar ‘783 teaches a similar, known optical engine for performing matrix operations using a photonic processor (See for example Abstract; Figures 1-18). In particular, Bunandar ‘783 teaches that the photonic processor (See for example 108, 110 in Figure 1; 200 in Figure 2; 500 in Figure 5) may be optically incoherent (See for example 108 in Figure 1; 202 in Figure 2; 502 in Figure 5; Paragraphs 0040-0041, wherein the light sources may be incoherent light sources), the at least one input having multiple wavelengths (See for example 108 in Figure 1; 202 in Figure 2; 502 in Figure 5; Paragraphs 0040-0041, wherein the light sources may be configured to emit light at different wavelengths). In addition, when the light sources are configured to emit light at different wavelengths, wavelength division multiplexers (WDM’s) (See for example 506, 512 in Figure 5) may be utilized within the photonic processor to parallel process the multiple wavelengths of light during matrix operations. Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have the engine be optically incoherent, the at least one input have multiple wavelengths, and the engine conduct operations on the at least one input using wavelength division multiplexing of said at least one input to parallel process the multiple wavelengths for the optical and electro-optical tensor operations, as taught by Bunandar ‘783, in the system of Bunandar et al., to prevent interference effects from affecting optical signals in adjacent signal paths, thus allowing for a larger number of input signals to be simultaneously processed for matrix operations.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ARNEL C LAVARIAS whose telephone number is (571)272-2315. The examiner can normally be reached M-F 10:30 AM-7 PM.
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ARNEL C. LAVARIAS
Primary Examiner
Group Art Unit 2872
1/30/2026
/ARNEL C LAVARIAS/Primary Examiner, Art Unit 2872