DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of the Claims
The Amendment filed January 14th, 2026 has been entered. Claims 11, 14, 17, 26-30 have been amended. Claim 31 has been added. Claims 3, 7, 15, 21, and 25 are canceled. Claims 1-2, 4-6, 8-10, 19-20, and 22-24 have been previously withdrawn. Claims 11-14, 16-18, and 26-31 are currently examined herein.
Status of the Rejection
Applicant’s amendments to the claims have overcome each objection previously set forth in the Non-Final Office Action mailed September 17th, 2025.
All 35 U.S.C. § 103 from the previous office action are withdrawn in view of Applicant’s amendments.
New grounds of rejection under 35 § U.S.C 103 are necessitated by the Applicant’s amendments.
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claims 11-13 and 31 are rejected under 35 U.S.C. 103 as being unpatentable over Chen (US 2019/0004027 A1, provided in IDS submitted 06/13/2025), Davis (US 2019/0256904 A1, provided in IDS submitted 06/28/2024), and Bandara (US 2021/0325329 A1).
Regarding Claim 11, Chen teaches a nanoflow flow cell system (a biomolecule sensing device [para. 0035]) comprising:
a sensor chip (microfluidic chip 196 in Fig. 1A [para. 0035]) comprising a plurality of sensors (array 180 includes multiple semiconductor devices 100 in Fig. 1A [para. 0035]), each sensor including a nanopore (each semiconductor device 100 is integrated with integrated nanopore device 140 [para. 0035]);
an integrated circuit (IC) (control circuitry 110A [para. 0035]) configured to receive an electrical signal of a sensor of the sensor chip and output a digital code value representative of the electrical signal (control circuitry 110A converts a sensed analog signal to a digital word for transmission [para. 0042]), wherein the electrical signal is configured to indicate a sequence of a molecule strand in the nanopore (DNA sequence may be identified by determining changes in resistance of a nanopore sensing changes in a drive current detected [para. 0040]), wherein the electrical signal is further configured to indicate a state of the nanoflow (control circuitry 110A detects a drive current, which determines for instance a DNA sequence as the nucleotides pass through the nanopore [para. 0040]), including:
a first state indicating a molecule strand passing through the nanopore (resistance encountered by current ib has an initial resistance prior to a nucleotide entering [para. 0045]);
a second state indicating the nanopore being blocked by the molecule strand (resistance encountered by current ib changes as DNA nucleotide passes through a nanopore [para. 0045]); and
a third state indicating the nanopore being unblocked (resistance encountered by current ib has a different resistance when a nucleotide is no longer present in the pore [para. 0045];
an interface device controller (biomolecule characteristic identifying device [para. 0058]) coupled to the integrated circuit that is configured to process the digital code value received from the IC and provide control signals to the IC according to the processed digital code value (external biomolecule characterization device analyzes sensed signals to characterize the sensed biomolecule or in feedback to one or more control signals or functions [para. 0095]),
wherein the IC comprises:
a programmable voltage reference configured to provide bias voltages for operations of the sensor chip (Vref1 which provides a bias voltage for driving a biomolecule through the pore and is programmable as the reference voltage is controlled using a driving module 220 [paras. 0066-0068]), including an operation to draw the molecule strand to the nanopore (Vref1 provides a bias voltage for driving a biomolecule through the pore [para. 0068]).
Chen is silent on the programmable reference voltage includes a reverse operation to push the molecule strand out of the nanopore, wherein the interface device controller is programmed to cause the reverse operation in response to the electrical signal being in the second state indicating the nanopore being blocked.
Davis teaches a nanopore sequencing apparatus (abstract), and teaches a reverse operation to push the molecule strand out of the nanopore (when ssDNA reaches one end, the electric potential can be reversed to move the ss test DNA to a reversed direction [para. 0119]).
Chen and Davis are considered analogous art to the claimed invention because they are in the same field of nanopore arrays for sequencing. It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify the programmable reference voltage of Chen to include a reverse operation to push the molecule strand out of the nanopore, as taught by Davis, as reversing the direction of the biomolecule allows for testing of the nanopore (Davis, [para. 0118-0119]).
Modified Chen is silent on wherein the interface device controller is programmed to cause the reverse operation in response to the electrical signal being in the second state indicating the nanopore being blocked.
Bandara teaches a nanopore membrane for molecular detection events (abstract), and teaches the interface device controller is programmed to cause the reverse operation in response to the electrical signal being in the second state indicating the nanopore being blocked (controller detects abrupt changes in current and either removes the current [para. 0021] or applies temporary voltage polarity reversal [para. 0033]; illustrated in Figure 10C; in addition, when measured current excels a threshold, electric potential may be reversed [para. 0018]).
Bandara and modified Chen are considered analogous art to the claimed invention because they are in the same field of nanopores for sequencing. It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify the interface device controller of modified Chen such that the modified interface device controller is programmed to cause the reverse operation by applying a reversed electric field in response to the electrical signal being in the second state indicating the nanopore being blocked, as taught by Bandara, as reversing the direction of the biomolecule allows for unclogging of the nanopore (Bandara, [para. 0033]).
Regarding Claim 12, modified Chen teaches the nanoflow cell system of claim 11.
Chen teaches wherein the integrated circuit is a complementary metal oxide semiconductor (CMOS) (CMOS control circuit 110A formed in semiconductor layer 110 [para. 0039]).
Chen is silent on wherein the integrated circuit is an application specific integrated circuit (ASIC), and the interface device is a field programmable gate array (FPGA).
Davis teaches wherein the integrated circuit is an application specific integrated circuit (ASIC) (nanopore sensor chip 100 may include an application-specific integrated circuit [para. 0049]), and the interface device is a field programmable gate array (FPGA) (chip may include a field-programmable gate array [para. 0049]).
It would be obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify the CMOS control circuit 110A and interface device of modified Chen to be an application specific integrated circuit (ASIC) and field programmable gate array (FPGA) respectively, as taught by Davis, as ASIC and FPGA are commonly used in integrated circuits for functions including digital processing (Davis, [para. 0082]).
Regarding Claim 13, modified Chen teaches the nanopore flow cell system of claim 11.
Chen teaches further comprising a substrate (wafer 630 in Fig 1D and Fig 8A [para. 0038]) disposed between the integrated circuit and the sensor chip (circuit layer 110 is formed on wafer 630, which is disposed between circuit layer 110 and nanopore layer 140 [paras. 0046, 0048]), wherein the integrated circuit is in communication with the sensor chip through a plurality of through-silicon vias extending to the substrate (through substrate vias are formed to connect circuit layer 110 and 2D transistor layer 140 [para. 0156]).
Regarding Claim 31, modified Chen teaches the nanopore flow cell system of claim 11, and teaches the interface device controller is programmed to cause the reverse operation in response to the electrical signal indicating a drop in an electrical current of the nanopore (as outlined in the claim 11 rejection above, Bandara teaches controller detects abrupt changes in current and either removes the current [para. 0021] or applies temporary voltage polarity reversal [para. 0033]; illustrated in Figure 10C; current can be removed at particular thresholds [para. 0018]), and teaches using predetermined levels to change the polarity (as outlined in the claim 11 rejection above, Bandara teaches when measured current excels a threshold, electric potential may be reversed [para. 0018]).
Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Chen, Davis, and Bandara, as applied to claim 11 above, and in further view of Dhaker (Introduction to SPI Interface, Analog Dialogue 2018, pages 1-5) and Kim (LVDS: High-Speed, Low-Power, Robust Data Transfer 2016. https://www.allaboutcircuits.com/technical-articles/lvds-high-speed-low-power-robust-data-transfer/).
Regarding Claim 14, modified Chen teaches the nanopore flow cell system of claim 11.
Chen is silent on wherein the integrated circuit is in communication with the interface device controller via a four-wire serial peripheral interface (SPI) and a low-voltage differential signaling (LVDS) port.
Dhaker teaches and describes serial peripheral interface between microcontroller and ICs such as sensors and ADCs (first para. col. 1, page 1), and teaches wherein the integrated circuit is in communication with the interface device via a four-wire serial peripheral interface (4-wire SPIs are popular interfaces between microcontroller and peripheral ICs [first and second para. col. 1, page 1; four-wire interface illustrated in Fig 1, page 1]).
It would be obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify the connection between the integrated circuit and biomolecule characteristic identifying device of modified Chen by using a four-wire serial peripheral interface (SPI), as taught by Dhaker, as a four-wire SPI enables switches and muxes and help reduce the number of digital GPIOs in system board design (Dhaker, [first para. col. 1, page 1]).
Modified Chen is silent on wherein the integrated circuit is in communication with the interface device via a low-voltage differential signaling (LVDS) port.
Kim teaches the advantages and disadvantages of using LVDS (title), and teaches connecting one transmitter to one receiver using LVDS (LVDS is a standard interface that connects one transmitter to one receiver [Section From One Wire to Two Wires, page 1]).
It would be obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify the connection between the integrated circuit and biomolecule characteristic identifying device of modified Chen by using a low-voltage differential signaling (LVDS) port, as taught by Kim, as using LVDS is a standardized interface for high-speed, point-to-point digital communication (Kim, [Section From One Wire to Two Wires, page 1]).
Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Chen, Davis, and Bandara, as applied to claim 11 above, and in further view of Al-Momani (US 9,844,144 B1).
Regarding Claim 18, modified Chen teaches the nanoflow cell system of claim 11.
Chen teaches wherein the sensor chip is disposed on a sensor substrate (microfluidic chip 196 is etched or molded into a material, such as glass, silicon, or a polymer [para. 0036]), the integrated circuit is disposed on a second substrate (circuit layer 110 may be formed on a wafer 630 [para. 0038]).
Chen is silent on the sensor chip and the integrated circuit are coupled together through a set of pogo pins.
Al-Momani teaches an apparatus to mount an integrated circuit package (abstract), and teaches the sensor chip and the integrated circuit are coupled together through a set of pogo pins (pogo pins 106 included in the IC package mount 100 connect the PCB 104 and IC package 102 [col. 3 lines 31-60]; illustrated in Figure 1).
It would be obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify the nanoflow cell system of modified Chen by adding a set of pogo pins so that the sensor chip and the integrated circuit are coupled together through a set of pogo pins, as taught by Al-Momani, as utilizing pogo pins has advantages to connect an IC compared to soldering an IC directly to a PCB, such as easier debugging and easier to remove and replace (Al-Momani, [col. 1. lines 20-39]).
Claim 16-17, 26, and 28 are rejected under 35 U.S.C. 103 as being unpatentable over Chen, Davis, and Bandara, as applied to claim 11 above, and in further view of Onsemi (Single Supply Quad Operational Amplifiers 2003, pages 1-12) and Stimmann (US 2003/0102994 A1, provided in IDS submitted on 01/30/2023).
Regarding Claim 26, modified Chen teaches the nanoflow flow cell system of claim 11.
Chen teaches wherein the IC further comprises a plurality of amplifiers (first circuit 200 includes a transimpedance amplifier 330 [paras. 0074, 0077], and as each semiconductor device in array 180 contains a plurality of distinct circuits [para. 0038], multiple amplifiers are used), each amplifier of the plurality of amplifiers having a first input coupled to one of the sensors of the sensor chip (as illustrated in Fig. 3B, transimpedance amplifier 330 is configured to provide at the first input terminal 330a thereof of the bias voltage (Vbias1/Vbias2) [para. 0079]) and a second input coupled to the programmable voltage reference (voltage generator 340 is connected to second input terminal 330b [para. 0078]);
a multiplexer (mux 1512 in Fig 15 [para. 0145]) configured to selectively pass through an electrical signal (mux 1512 selects sensing signal [para. 0145]); and
at least one analog-to-digital converter (ADC) (ADC 1514 in Fig. 15 [para. 0145]) coupled to the plurality of the first analog multiplexer (ADC 1514 is coupled to mux 1512 [para. 0145]) and configured to generate digital code values representative of electrical signals (ADC 1514 converts data from analog to digital for transmission to an external device [para. 0145]).
Chen is silent on wherein the IC further comprises a plurality of amplifier clusters, each of the amplifier clusters comprising a plurality of amplifiers, and a plurality of first analog multiplexers, each one of the first analog multiplexers being coupled to one of the amplifier clusters.
Onsemi teaches single supply quad op amps (title), and teaches using a quad operational amplifier over a standard operational amplifier (see description paragraph on page 1).
It would be obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify the amplifiers of modified Chen to be a plurality of amplifier clusters, each of the amplifier clusters comprising a plurality of amplifiers, as taught by Onsemi, as quad operational amplifiers have many benefits over a standard operational amplifier including using low supply voltages (Onsemi, [description para. page 1]).
Modified Chen is silent on a plurality of first analog multiplexers, each one of the first analog multiplexers being coupled to one of the amplifier clusters.
Stimmann teaches a analog-to-digital converter system that controls the signal via amplification (abstract), and teaches a first analog multiplexer being coupled to one of the amplifier clusters (amplifier bank 2 with amplifiers 2a, 2b,…2n provides inputs to multiplexer 4 [paras. 0013-0015]).
It would be obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify the multiplexer of modified Chen so that the first analog multiplexer is coupled to one of the amplifier clusters, as taught by Stimmann, as using multiplexers with amplifiers allows to select the proper signal for the ADC converter (Stimmann, [abstract]). In addition, as the nanopore flow cell system of modified Chen uses multiple op amps for each sensor, it would be obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to duplicate the first analog multiplexer so that the nanopore flow cell system of modified Chen has a plurality of first analog multiplexers, each one of the first analog multiplexers being coupled to one of the amplifier clusters, as a plurality of first analog multiplexers can select the appropriate signal for each nanopore cell. The mere duplication of parts, without any new or unexpected results, is within the ambit of one of ordinary skill in the art. See In re Harza, 124 USPQ 378 (CCPA 1960) (see MPEP § 2144.04).
Regarding Claim 16, modified Chen teaches the nanoflow cell system of claim 26, and teaches wherein the number of amplifiers in an amplifier cluster is four (as outlined in the claim 26 rejection, Onsemi teaches using a quad operational amplifier [see description paragraph on page 1]).
Modified Chen is silent on each analog multiplexer comprises four inputs, each input being coupled to an output of an amplifier in the amplifier cluster.
Stimmann teaches each first analog multiplexer can have multiple inputs, each input being coupled to an output of an amplifier in the amplifier cluster (multiplexer 4 has inputs for each amplifier 2a, 2b,…,2n in Figure 1 [para. 0015]).
It would be obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify the plurality of first analog multiplexers of modified Chen such that each analog multiplexer comprises four inputs, each input being coupled to an output of an amplifier in the amplifier cluster, as taught by Stimmann, as running the amplifiers through a multiplexer eliminates the need for converting every analog signal (Stimmann, [para. 0018]).
Regarding Claim 17, modified Chen teaches the nanoflow cell system of claim 26.
Chen teaches wherein the interface device controller is configured to perform arithmetic operations on the digital code values received from the IC and transmits control signals to the IC according to results of the arithmetic operations (one or more characteristic may be determined using the senses voltages provided by the ADC; the signal IN1 may be a control signal from external control circuitry, such as the control circuitry in the biological characteristic-identifying device [paras. 0067, 0092]).
Regarding Claim 28, modified Chen teaches the nanopore flow cell of claim 26.
Chen is silent on wherein the plurality of amplifier clusters, the plurality of first analog multiplexers, and the at least one ADC are supplied by individual voltage supplies that are physically and electrically separated from each other.
However, given that there are a finite number of options for configuring power sources from connecting multiple components to a single power source or providing individual voltage supplies to each power source, it would be obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to select wherein the plurality of amplifier clusters, the plurality of analog multiplexers, and the at least one ADC are supplied by individual voltage supplies that are physically and electrically separated from each other. Choosing from a finite number of identified, predictable solutions, with a reasonable expectation for success, is likely to be obvious to a person if ordinary skill in the art. See KSR International Co. v. Teleflex Inc., 550 U.S. 398, 415-421, USPQ2d 1385, 1395 – 97 (2007) (see MPEP § 2143 (I)(E)).
Claim 27 is rejected under 35 U.S.C. 103 as being unpatentable over Chen, Davis, Onsemi, and Stimmann, as applied to claim 26 above, and in further view of Chen 2 (US 2016/0178554 A1) and Molecular Expressions (Introduction to CMOS Image Sensors, 2015, pages 1-12. https://micro.magnet.fsu.edu/primer/digitalimaging/cmosimagesensors.html).
Regarding Claim 27, modified Chen teaches the nanopore flow cell of claim 26.
Chen teaches on the IC further comprising a low-pass filtering circuit coupled to the plurality of first analog multiplexers and configured to reduce noise and offset voltage and drift of the integrated circuit (a low pass filter in the feedback path can be provided in increase circuit stability [para. 0079]).
Chen is silent on the IC further comprising correlated double sampling, and a timing and control circuit configured to provides control signals to the plurality of amplifier clusters, the plurality of first analog mulitplexers, and the at least one ADC.
Chen 2 teaches a method of analyzing a molecule (abstract), and teaches the IC further comprising a correlated double sampling (in some embodiments, correlated double sampling may be used [para. 0042]).
Modified Chen and Chen 2 are considered analogous art to the claimed invention because they are in the same field of nanopore arrays for sequencing. It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify the integrated circuit of modified Chen to further include a correlated double sampling circuit, as taught by Chen 2, as correlated double sampling may be used to increase the accuracy of the measurement of the rate of voltage decay (Chen 2, [para. 0042]).
Modified Chen is silent on the IC further comprising a timing and control circuit configured to provides control signals to the plurality of amplifier clusters, the plurality of first analog mulitplexers, and the at least one ADC.
Molecular Expressions teaches an introduction to CMOS image sensors (abstract), and teaches the IC further comprising a timing and control circuit configured to provides control signals to the plurality of amplifier clusters, the plurality of analog mulitplexers, and the at least one ADC (CMOS sensors typically include timing logic and exposure control as well as a number of processing and control functions [first para. of Section Anatomy of the CMOS Photodiode, [page 2]).
It would be obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify the integrated circuit of modified Chen to include a timing and control circuit configured to provides control signals to the plurality of amplifier clusters, the plurality of first analog mulitplexers, and the at least one ADC, as taught by Molecular Expressions, as using a timing and control circuit allows for control of multiple sensors and sequencing (Molecular Expressions, [last para. page 8]).
Claim 29 is rejected under 35 U.S.C. 103 as being unpatentable over Chen, Davis, Onsemi, and Stimmann, as applied to claim 26 above, and in further view of Sovcik (Digital Methods of Calibration for Analog Integrated Circuits in Nanotechnologies IEEE 2017).
Regarding Claim 29, modified Chen teaches the nanopore flow cell of claim 26.
Chen is silent on the IC further comprising a self-calibration and test circuit configured to calibrate the plurality of amplifier clusters and analyze a plurality of data flows from the amplifier clusters to the at least on ADC.
Sovcik teaches an approach to calibration of integrated circuits (abstract), and teaches a self-calibration and test circuit configured to calibrate the plurality of amplifier clusters and analyze a plurality of data flows from the amplifier clusters to the at least on ADC (as illustrated in Figure 1, a calibration subcircuit can be added to an IC [page 2]; in addition, any circuit parameter may be calibrated depending on the IC type [third par. Col. 2, page 3]).
It would be obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify the integrated circuit of modified Chen to include a self-calibration and test circuit configured to calibrate the plurality of amplifier clusters and analyze a plurality of data flows from the amplifier clusters to the at least on ADC, as taught by Sovcik, as frequent calibrates helps to compensate the undesired influence of ageing, fluctuation of technology process parameters and temperature variations on the IC performance (Sovcik, [second para. col. 2, page 5]).
Claim 30 is rejected under 35 U.S.C. 103 as being unpatentable over Chen, Davis, Bandara, Onsemi, and Stimmann, as applied to claim 26 above, and in further view of Wu (CircuitSense: Automatic Sensing of Physical Circuits and Generation of Virtual Circuits to Support Software Tools. Session: Circuits 2017, 311-319).
Regarding Claim 30, modified Chen teaches the integrated circuit of claim 26.
Chen is silent on further comprising a plurality of second analog multiplexers arranged between the plurality of analogy multiplexers and the at least one ADC and configured to sequentially provide selectively pass through electrical signals to the at least one ADC.
Wu teaches an open-source electronic platform focusing on circuit design (abstract), and teaches a plurality of second analog multiplexers arranged between the plurality of analogy multiplexers and the at least one ADC (as illustrated in Figure 4, a plurality of secondary multiplexers can be used in a cascade setup [page 313]) and configured to sequentially provide selectively pass through electrical signals to the at least one ADC (selected signals are transferred via the cascade multiplexer setup to the ADC [first para. col. 2, page 313 and Figure 4, page 313).
It would be obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify the integrated circuit of modified Chen to include a plurality of second analog multiplexers arranged between the plurality of analogy multiplexers and the at least one ADC and configured to sequentially provide selectively pass through electrical signals to the at least one ADC, as taught by Wu, as a cascade multiplexer setup allows for scanning numerous sensors in a setup (Wu, [entire section of Sensor Reading Circuit Design, page 313]).
Response to Arguments
Applicant's arguments, see Remarks pgs. 10-13, filed 01/14/2026, with respect to the 35 U.S.C 103 rejections and amended claims have been fully considered.
Applicant’s Argument #1:
Applicant argues on pages 10-13 that as independent claim 11 has been amended to recite “an interface device controller” and “the interface device controller is programmed to cause the reverse operation in response to the electrical signal being in the second state indicating the nanopore being blocked” as the instant application uses an FGPA and that, although Chen in view of Davis may use an interface device controller and electrical signals, the cited references do not use the signals to determine a state of the nanopore and follow programmed operations.
Examiner’s Response #1:
Applicant’s arguments have been fully considered, but are moot in view of the new grounds of rejection above.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/R.L.G./Examiner, Art Unit 1795
/ALEXANDER W KEELING/Primary Examiner, Art Unit 1795