Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
This Non-Final office is a response to the papers filed on 06/07/2023.
Claims 1-17 are pending, claim 18 is cancelled.
Claim Objections
Claim 2 is objected to because of the following: “The integrated circuit of claim 2" should be replaced by “The integrated circuit of claim 1”.
Claim 3 is objected to because of the following: “The integrated circuit of claim 3" should be replaced by “The integrated circuit of claim 2”.
Appropriate correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 4, and 6-7 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chou (“Teleported operations between logical qubits in circuit quantum electrodynamics, A Dissertation Presented to the Faculty of the Graduate School of Yale University in Candidacy for the Degree of Doctor of Philosophy, 2018”).
Regarding claim 1, Chou discloses:
An integrated circuit for quantum analog computing, the integrated circuit comprising (see page 53 first para, which is the quantum analog of a lossy classical channel, described by the following evolution on single physical qubit:….):
providing and connecting a plurality of qubits connected to each other, (see page 165-166, Fig. 6.1…, see page 165-166, see page 255, see page 65, Both circuit topologies aim to suppress one dominant noise mechanism…), each qubit of the plurality of qubits comprising resistors, inductors, capacitors and a switch (see page 57-58, Such circuits utilize many of the common classical circuit elements we know from electrical engineering inductors, capacitors, and resistors….),
wherein the qubits are connected to each other according to a connectivity topology that provides an analog of quantum behavior at room temperature (see page 165-166, Fig. 6.1, see page 65, Both circuit topologies aim to suppress one dominant noise mechanism…., see page 109, Using the teleported gate experiments as a template, we will describe both the cryogenic and room-temperature hardware used to control and measure…, page 112-114),
wherein each qubit is connected to a plurality of other qubits and all qubits participate in calculation, such that no qubit is used for error correction, (see page 164-166, We envision a distributed network of modules, which are small quantum processors that can be well-controlled, execute quantum error correction, and easily produced…., see page 170-171).
Regarding claim 4, Chou discloses:
wherein the qubits are connected to each other using at least one of: an inductor and a capacitor (see page 57-58, Such circuits utilize many of the common classical circuit elements we know from electrical engineeringinductors, capacitors, and resistors…., see page 255).
Regarding claims 6, Chou discloses:
wherein the qubits are operating at a room temperature (see page 109, Using the teleported gate experiments as a template, we will describe both the cryogenic and room-temperature hardware used to control and measure…, page 112-114).
Regarding claim 7, Chou discloses:
wherein the qubits are operating at a temperature of between 0 and 30 degrees Celsius (see page 109, Using the teleported gate experiments as a template, we will describe both the cryogenic and room-temperature hardware used to control and measure…, page 112-114, [wherein room temperature is in the range of 0 degrees Celsius to 30 degrees Celsius]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 2 and 3 are rejected under 35 U.S.C. 103 as being unpatentable over Chou (“Teleported operations between logical qubits in circuit quantum electrodynamics, A Dissertation Presented to the Faculty of the Graduate School of Yale University in Candidacy for the Degree of Doctor of Philosophy, 2018”) further in view of Patrick et al. (“Quantum Hopfield neural network, Department of Mechanical Engineering, Massachusetts Institute of Technology, 2018”).
Regarding claims 2 and 3, Chou fails to disclose:
the connectivity topology is a Hopfield network, wherein each qubit in the Hopfield network is connected to all other qubits of the Hopfield network.
Thus, Patrick discloses:
the connectivity topology is a Hopfield network, wherein each qubit in the Hopfield network is connected to all other qubits of the Hopfield network (see Patrick Abstract, Here we employ quantum algorithms for the Hopfield network…., page 2, left col para 2).
It would have been obvious to one of ordinary skill in the art at the time the invention was made to have modified a quantum computer of Chou to utilized the connectivity topology is a Hopfield network in order to run efficiently (see Patrick page 5, par 3).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Chou (“Teleported operations between logical qubits in circuit quantum electrodynamics, A Dissertation Presented to the Faculty of the Graduate School of Yale University in Candidacy for the Degree of Doctor of Philosophy, 2018”) further in view of Zwanenburg et al. (“Silicon Quantum Electronics”, Rev. Mod. Phys. 16 April 2013, Vol. 85, pp. 1-64).
Regarding claim 5, Chou fails to disclose:
wherein each qubit comprises a metal oxide semiconductor (CMOS).
Thus, Zwanenburg discloses:
wherein each qubit comprises a metal oxide semiconductor (CMOS) (see page 3, left col, par 2….).
It would have been obvious to one of ordinary skill in the art at the time the invention was made to have modified a quantum computer of Chou to utilized the switch is a CMOS in order to have a very low charge noise (see Zwanenburg page 23, left col, par 2).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Chou (“Teleported operations between logical qubits in circuit quantum electrodynamics, A Dissertation Presented to the Faculty of the Graduate School of Yale University in Candidacy for the Degree of Doctor of Philosophy, 2018”) further in view of Bai et al. (“Classical analogs of double electromagnetically induced transparency”, Optics Communication, 15 March 2013).
Regarding claim 8, Chou fails to disclose:
wherein each qubit of the plurality of qubits comprises: a first resistor, a voltage source, a first inductor, a first capacitor, and a shunt capacitor connected in a first series circuit, the shunt capacitor having a first node on one side and a second node on another side; and the switch, a second resistor, a second inductor, and a second capacitor connected in series and forming a second series, the second series being connected in parallel to the shunt capacitor at the first node and the second node.
Thus, Bai discloses:
wherein each qubit of the plurality of qubits comprises: a first resistor (see Fig. 5, R1 or R2), a voltage source (see Fig. 5, Vs1 or Vs2), a first inductor (see Fig. 5, L1 or L2), a first capacitor (see Fig. 5, C1 or C2), and a shunt capacitor connected in a first series circuit (see Fig. 5, Loop 1 or Loop m2), the shunt capacitor having a first node on one side and a second node on another side (see Fig. 5, capacitor C); and the switch (see Fig. 5, switch SW), a second resistor (see Fig. 5, R3), a second inductor (see Fig. 5, L3), and a second capacitor connected in series and forming a second series (see Fig. 5, C3 and Loop3), the second series being connected in parallel to the shunt capacitor at the first node and the second node (see Fig. 5, capacitor C).
It would have been obvious to one of ordinary skill in the art at the time the invention was made to have modified a quantum computer of Chou to utilized capacitor and inductor in order to form equivalent capacitance and equivalent inductance (see Bai page 5, right col).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 9-10 are rejected under 35 U.S.C. 103 as being unpatentable over Chou (“Teleported operations between logical qubits in circuit quantum electrodynamics, A Dissertation Presented to the Faculty of the Graduate School of Yale University in Candidacy for the Degree of Doctor of Philosophy, 2018”) and Bai et al. (“Classical analogs of double electromagnetically induced transparency”, Optics Communication, 15 March 2013) further in view of Tank et al. (“Simple “ Neural” Optimization Networks: An A/D Converter, Signal Decision Circuit, and ‘a Linear Programming Circuit”, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, VOL. CAS-33, NO. 5, MAY 1986).
Regarding claim 9, Chou fails to disclose:
wherein the voltage source is controlled to set each qubit with a particular initial state.
Thus, Tank discloses:
wherein the voltage source is controlled to set each qubit with a particular initial state (see page 534, right col, The computation consists of providing an initial set of amplifier input voltages ui, and then allowing the analog system to converge to a stable, state which minimizes the E function….).
It would have been obvious to one of ordinary skill in the art at the time the invention was made to have modified a quantum computer of Chou to utilized voltage source to control to set each qubit in order to allow the analog system to converge to a stable, state (see Tank page 534, right col).
Regarding claim 10, Tank disclose:
wherein the integrated circuit is operable to reach a stable state, the integrated circuit measuring a voltage on each qubit to determine the voltage of each qubit associated to a current state in order to perform computation (see page 534, right col, The computation consists of providing an initial set of amplifier input voltages ui, and then allowing the analog system to converge to a stable, state which minimizes the E function…., see E function).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 11-12, 15, and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Chou (“Teleported operations between logical qubits in circuit quantum electrodynamics, A Dissertation Presented to the Faculty of the Graduate School of Yale University in Candidacy for the Degree of Doctor of Philosophy, 2018”) further in view of Tank et al. (“Simple “ Neural” Optimization Networks: An A/D Converter, Signal Decision Circuit, and ‘a Linear Programming Circuit”, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, VOL. CAS-33, NO. 5, MAY 1986).
Regarding claim 11, Chou discloses:
A method comprising:
providing and connecting a plurality of qubits connected to each other according to a connectivity topology which is an all-to-all topology (see page 165-166, Fig. 6.1…, see page 165-166, see page 255, see page 65, Both circuit topologies aim to suppress one dominant noise mechanism…), each qubit of the plurality of qubits comprising resistors, inductors, capacitors and a switch to be equivalent to an atomic qubit (see page 57-58, Such circuits utilize many of the common classical circuit elements we know from electrical engineering inductors, capacitors, and resistors….);
wherein each qubit is connected to a plurality of other qubits and all qubits participate in calculation, such that no qubit is used for error correction (see page 164-166, We envision a distributed network of modules, which are small quantum processors that can be well-controlled, execute quantum error correction, and easily produced…., see page 170-171).
.
However, Chou fails to disclose:
setting an initial voltage of each qubit of the plurality of qubits; and
operating the plurality of qubits at the room temperature to reach a final state representative of a solution to a given problem and measuring an associated voltage of each one of the plurality of qubits to perform quantum analog computation to determine the solution
Thus, Tank discloses:
setting an initial voltage of each qubit of the plurality of qubits (see page 534, right col, par 2, The computation consists of providing an initial set of amplifier input voltages ui, and then allowing the analog system to converge to a stable, state which minimizes the E function…., see E function); and
operating the plurality of qubits at the room temperature to reach a final state representative of a solution to a given problem and measuring an associated voltage of each one of the plurality of qubits to perform quantum analog computation to determine the solution (see page 534, right col, par 2, The computation consists of providing an initial set of amplifier input voltages ui, and then allowing the analog system to converge to a stable, state which minimizes the E function…., see E function, see page 536)
It would have been obvious to one of ordinary skill in the art at the time the invention was made to have modified a quantum computer of Chou to set an initial voltage of each qubit in order to allow the analog system to converge to a stable, state (see Tank page 534, right col).
Regarding claim 12, Tank disclose:
operating amplifiers used to connect the qubits by the connectivity topology (see Fig. 1-2, see page 534).
Regarding claim 15, Chou disclose:
wherein providing and connecting a plurality of qubits comprises connecting each qubit to all other qubits of the plurality of qubits using at least one of: an inductor and a capacitor (see page 57-58, Such circuits utilize many of the common classical circuit elements we know from electrical engineeringinductors, capacitors, and resistors…., see page 255).
Regarding claim 17, Chou disclose:
wherein the qubits are operated at a temperature between 0 and 30 degrees Celsius (see page 109, Using the teleported gate experiments as a template, we will describe both the cryogenic and room-temperature hardware used to control and measure…, page 112-114, [wherein room temperature is in the range of 0 degrees Celsius to 30 degrees Celsius]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 13 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Chou (“Teleported operations between logical qubits in circuit quantum electrodynamics, A Dissertation Presented to the Faculty of the Graduate School of Yale University in Candidacy for the Degree of Doctor of Philosophy, 2018”) and Tank et al. (“Simple “ Neural” Optimization Networks: An A/D Converter, Signal Decision Circuit, and ‘a Linear Programming Circuit”, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, VOL. CAS-33, NO. 5, MAY 1986) further in view of Patrick et al. (“Quantum Hopfield neural network, Department of Mechanical Engineering, Massachusetts Institute of Technology, 2018”).
Regarding claim 13, Chou disclose:
wherein connecting the plurality of qubits according to the connectivity topology comprises connecting the plurality of qubits built with resistors and capacitors (see page 57-58, Such circuits utilize many of the common classical circuit elements we know from electrical engineering inductors, capacitors, and resistors….).
However, Chou fails to disclose:
Thus, Patrick discloses:
wherein connecting the plurality of qubits according to the connectivity topology comprises connecting the plurality of qubits according to a Hopfield network (see Patrick Abstract, Here we employ quantum algorithms for the Hopfield network…., page 2, left col para 2).
It would have been obvious to one of ordinary skill in the art at the time the invention was made to have modified a quantum computer of Chou to utilized the connectivity topology is a Hopfield network in order to run efficiently (see Patrick page 5, par 3).
Regarding claim 14, Patrick discloses:
wherein each qubit in the Hopfield network is connected to all other qubits of the Hopfield network (see Patrick Abstract, Here we employ quantum algorithms for the Hopfield network…., page 2, left col para 2).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 16 is rejected under 35 U.S.C. 103 as being unpatentable over Chou (“Teleported operations between logical qubits in circuit quantum electrodynamics, A Dissertation Presented to the Faculty of the Graduate School of Yale University in Candidacy for the Degree of Doctor of Philosophy, 2018”) and Tank et al. (“Simple “ Neural” Optimization Networks: An A/D Converter, Signal Decision Circuit, and ‘a Linear Programming Circuit”, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, VOL. CAS-33, NO. 5, MAY 1986) further in view of Zwanenburg et al. (“Silicon Quantum Electronics”, Rev. Mod. Phys. 16 April 2013, Vol. 85, pp. 1-64).
Regarding claim 16, Chou fails to disclose:
wherein each qubit comprises a metal oxide semiconductor (CMOS).
Thus, Zwanenburg discloses:
wherein each qubit comprises a metal oxide semiconductor (CMOS) (see page 3, left col, par 2….).
It would have been obvious to one of ordinary skill in the art at the time the invention was made to have modified a quantum computer of Chou to utilized the switch is a CMOS in order to have a very low charge noise (see Zwanenburg page 23, left col, par 2).
Conclusion
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/BRIAN NGO/ Primary Examiner, Art Unit 2851