Status of Claims
In the communication filed on 11/10/2025, claims 1-14 are pending. Claims 1-12 and 14 are amended. No claims are new. No claims are presently cancelled.
Response to Arguments
Regarding the prior action, the applicant’s remarks state that “claim 7 appears to have been mistakenly not indicated as allowable in the Office Action Summary”. The examiner notes that, in the prior action, claim 7 was rejected under 112(b) and thus not indicated as allowable in the PTO-326.
The prior objections to the Drawings, Specification, and Claims are withdrawn due to the amendments and the applicant’s remarks in the communication of 11/10/2025.
The prior rejections under U.S.C. 112(b) are withdrawn due to the amendments.
Applicant’s arguments with respect to claims 1-14 have been considered but are not persuasive.
Firstly, the applicant argues (pp. 14, 2nd para. – pp. 15, 1st para.) that Herraiz and Stang teach different grounding schemes and that “one having ordinary skill in the art would not be motivated to modify a method of insulation detection specifically designed for two electrical systems that do not share a ground with a method of insulation detection specifically designed for two electrical systems which share a common ground”. The examiner respectfully disagrees with the applicant’s conclusion. The base reference Herraiz is clearly directed to protect lower-voltage components from over-voltage damages that may occur as a result of an insulation fault from a higher-voltage branch. Stang is also directed to protect lower-voltage components from over-voltage damages that may occur as a result of an insulation fault from a higher-voltage branch. However, Stang teaches a different path for an insulation fault to occur (i.e. from a positive higher voltage potential to a positive lower voltage potential). The analogous insulation fault path (from a positive HV potential to a positive LV potential) could feasibly occur in Herraiz’s system. Thus, regardless of any differences in grounding schemes, it is clear that modifying Herraiz’s system with the teachings of Stang would provide additional protection (from insulation faults in multiple different paths) and improve Herraiz’s method to better achieve the objectives of Herraiz.
Further, the applicant remarks (pp. 15, 2nd para.) that while Herraiz teaches a HV branch, Stang’s method does not involve a HV branch, and that “there is no teaching or suggestion in Herriaz or Stang that their respective insulation detection methods could or would detect insulation faults at the other's required electrical system voltage levels”. The examiner acknowledges these observations of the cited references, but respectfully disagrees with the applicant’s conclusion (pp. 16, 1st para.) that “one having ordinary skill in the art would not be motivated to modify the method and/or system of Herriaz, which detects insulation faults between a high-voltage electrical system (e.g., greater than 200VDC) and a low-voltage electrical system (e.g., less than 28 VDC) … with the method and/or system of Stang, which detects insulation faults between a low-voltage system (e.g., 12 volts) and a lower-voltage system (e.g., 6 volts)”. The examiner asserts that Herraiz is the base reference relied upon to teach the structure of the HV and LV system branches. Stang’s higher voltage branch (12 V) and LV branch (6 V) are considered to be analogous to the HV and LV branches established by Herraiz. Each reference is concerned with a common goal of detecting an insulation fault to prevent over-voltage damage to LV components.
Additionally, the applicant argues (pp. 15, 3rd para. – pp. 16, 1st para.) that each of Herraiz and Stang are directed “to protect the low-voltage system from overvoltage damage”. The examiner agrees that Herraiz and Stang share a similar goal. The examiner respectfully disagrees with the applicant’s conclusion (pp. 16, 1st-2nd para.) that “one having ordinary skill in the art would not be motivated to modify the method and/or system of Herriaz, … with the method and/or system of Stang, … all to achieve a result that is already accomplished by the method of Herriaz” and “all just to accomplish a result that is already accomplished by the method of Herriaz, that is, protection of a low-voltage system from overvoltage damage from a high-voltage insulation system due to an insulation fault”. The base reference Herraiz is clearly directed to protect lower-voltage components from over-voltage damages that may occur as a result of an insulation fault from a higher-voltage branch. Stang is also directed to protect lower-voltage components from over-voltage damages that may occur as a result of an insulation fault from a higher-voltage branch. However, Stang teaches a different path for an insulation fault to occur (i.e. from a positive higher voltage potential to a positive lower voltage potential). The analogous insulation fault path (from a positive HV potential to a positive LV potential) could feasibly occur in Herraiz’s system. Thus, modifying Herraiz’s system with the teachings of Stang would provide additional protection and improve Herraiz’s method to better achieve the objectives of Herraiz.
Thus, the examiner’s arguments with respect to amended claim 1 and its dependent claims 2-14 are respectfully refuted.
It is noted the amendments (“or a positive LV non-supply potential”) to the independent claim 1 change the scope of the claims. Thus, as necessitated by amendment, changes are made to the rejections herein from those of the prior action. This action is thus proper as a final rejection.
Though not relied upon herein, it is noted the cited reference Mizoguchi et al. (US 2014/0002096 A1) is also of relevance to the independent claim 1. Mizoguchi teaches a circuit that identifies an insulation fault in a HV-to-LV-isolated system by detecting a current flow through a voltage limiting circuit in the LV branch.
Claim Objections
Claims 1, 3-4, 6-7, and 9-12 are objected to because of the following informalities:
Claims 1, 3-4, 6-7, and 9-12 should be reformatted to separate each element or step by a line indentation, in accordance with 37 CFR 1.75(i). These claims include a plurality of elements or steps, but currently lack the required line indentations.
Claim 6, lines 6-7 recite “between the at least one of the HV potentials”, which should be revised to “between the at least one potential” to be consistent with the other claim langauge.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claims 1-14 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 is indefinite as to which limitation(s) are steps of the claimed method. Thus, claim 1 has unclear scope. Claim 1 needs a transitional phrase (e.g. “comprising”, “consisting of”, etc.) to identify which limitation(s) the claimed method consists of, in accordance with MPEP 2111.03 Transitional Phrases.
Claims 2-14 are further rejected for their dependency on other rejected claims.
Claim Rejections - 35 USC § 103
Claims 1-2, 5, 8, and 10-14 are rejected under 35 U.S.C. 103 as being unpatentable over Herraiz et al. (US 2013/0106437 A1) in view of Stang et al. (US 2024/0100956 A1).
Regarding Claim 1, Herraiz discloses a method (¶ [4]: “method of monitoring insulation resistance”) for detecting an insulation fault in a vehicle on-board electrical system (“vehicle power system”; ¶ [25]; see annotated Fig. 2, included infra) having a high-voltage (HV) on-board electrical system branch (includes “High Voltage Powernet with HV-Loads”; see annotated Fig. 2) and a low-voltage (LV) on-board electrical system branch (includes “Low Voltage Powernet with LV-Loads”, “insulation monitoring”, and an unlabeled LV battery; see annotated Fig. 2).
Herraiz further discloses the LV on-board electrical system branch (“Low Voltage Powernet” + connected devices) has a plurality of LV potentials comprising at least one positive LV potential (positive side of LV battery, not labeled; see annotated Fig. 2) and at least one negative LV potential (negative side of LV battery, not labeled; see annotated Fig. 2).
Herraiz further discloses the at least one positive LV potential includes at least one of a positive LV supply potential (positive side of LV battery, not labeled; see annotated Fig. 2) or a positive LV non-supply potential (any of the digital I/O signals to/from the MCU: “x[n]”, “r[n]”, “yP[n]”, “yN[n]”; Fig. 2).
Herraiz further discloses the at least one LV negative potential includes a negative LV supply potential (negative side of LV battery, not labeled; see annotated Fig. 2) that corresponds to a ground potential (“GND”; Fig. 2) of the vehicle on-board electrical system (Fig. 2).
Herraiz further discloses the HV on-board electrical system branch (“High Voltage Powernet”) has a positive HV potential (“HV_P”) and a negative HV potential (“HV_N”).
Herraiz further discloses the plurality of HV potentials (“HV_P” and “HV_N”) is direct current (DC)-isolated (“Isolated HV to LV DCDC Converter” between HV and LV branches; Fig. 2) from the plurality of LV potentials (positive and negative sides of LV battery) of the LV on-board electrical system branch (“Low Voltage Powernet” + connected devices).
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Herraiz does not disclose “an insulation fault between at least one HV potential of the plurality and the at least one positive LV potential is detected by identifying a current flow through a voltage limiting circuit connected between the ground potential and the at least one positive LV potential.”
Stang teaches a method (¶ [27]: “method for operating a control unit circuit”) wherein an insulation fault (“leakage resistor 26” and/or “short circuit 25”; Fig. 1) between at least one higher potential (“positive line 16'”; Fig. 1; per ¶ [39]: “Ub” > “Un”; see note, included infra) of the plurality (16', 17) and the at least one positive LV potential (“supply line 20” connected to “pole P+”; Fig. 1) is detected by identifying a current flow (voltage across “resistance element 30” is measured; thus, a current flow through “30” is identified) through a voltage limiting circuit (“measurement circuit 27” including “Zener diode 29” and “resistance element 30”; Fig. 1).
NOTE: Stang teaches the potential “Ub” is higher than “Un”. Thus, the higher potential (“Ub”) and LV potential (“Un”) taught by Stang are analogous to the HV potential and LV potential taught by Herraiz. It is established supra that the base reference Herraiz teaches the HV potential. Thus, Stang is not relied upon to teach the HV potentials.
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Stang further teaches the insulation fault (26) from the positive higher voltage potential (16') to the positive LV potential (20) causes an overvoltage event (¶ [3, 5, 60, 64]) on the positive LV potential (20) of the LV on-board electrical system branch (“energy store 14” + connected components). Stang further teaches this method of detecting an insulation fault between a higher voltage potential and a positive LV potential for the advantage of protecting the LV branch and its associated LV storage battery (14) from overvoltage damage from the higher voltage on-board electrical system branch (¶ [3, 5, 60, 64]).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the method and vehicle on-board electrical system disclosed by Herraiz to detect an insulation fault between one of the HV potentials and the positive LV potential by identifying a current through a voltage limiting circuit, as taught by Stang, for the advantage of protecting the LV on-board electrical system branch from overvoltage damage from the HV on-board electrical system branch.
Regarding Claim 2, the combination of Herraiz and Stang teaches the method as claimed in claim 1.
The combination of Herraiz and Stang (as set forth prior) teaches the current flow is identified (incorporated from Stang: voltage across “resistance element 30” is measured; thus, a current flow through “30” is identified) to detect the insulation fault (Stang: “leakage resistor 26” and/or “short circuit 25”; Fig. 1).
Herraiz further discloses the insulation fault is detected (¶ [4]: “determine whether a desired insulation resistance is provided”) on the basis of a shift (the attenuation level at various frequencies included in the “frequency response” of Fig. 4 represents reductions in the voltage, ie shifts, from the test signals “x(t)” to the measured responses “yP(t)” and “yN(t)”; Figs. 2-4) of the at least one HV potential (test signals “x(t)” applied to each of “HV_P” and “HV_N”; Fig. 2) with respect to the ground potential (“GND” serves as reference to the insulation monitor and as the midpoint connection between “CYP” and “CYN”; Fig. 2).
Regarding Claim 5, the combination of Herraiz and Stang teaches the method as claimed in claim 2.
Herraiz further discloses the shift (the attenuation level at various frequencies included in the “frequency response” of Fig. 4 represents reductions in the voltage, ie shifts, from the test signals “x(t)” to the measured responses “yP(t)” and “yN(t)”; Figs. 2-4) is identified by an insulation monitor (“insulation monitoring device” per ¶ [32]; labeled as “insulation monitoring” in Fig. 2).
Regarding Claim 8, the combination of Herraiz and Stang the method as claimed in claim 5.
The combination of Herraiz and Stang (as set forth prior) teaches the current flow through the voltage limiting circuit (Stang: “measurement circuit 27” including “Zener diode 29” and “resistance element 30”; Fig. 1) is identified (incorporated from Stang: voltage across “resistance element 30” is measured; thus, a current flow through “30” is identified) by measuring at least one voltage (Herraiz: “yP(t)” is a voltage measurement of “HV_P”; “yN(t)” is a voltage measurement of “HV_N”; Fig. 2) between the at least one HV potential (Herraiz: “HV_P” and “HV_N”) on the one hand and the ground potential (Herraiz: “GND” serves as reference to the insulation monitor and as the midpoint connection between “CYP” and “CYN”; Fig. 2) on the other hand by at least one voltmeter (Herraiz: combo of “MCU” and the “ADCs”; Fig. 2) which is connected to the insulation monitor (Herraiz: “MCU” and “ADCs” are connected within the insulation monitor; Fig. 2).
Regarding Claim 10, the combination of Herraiz and Stang teaches the method as claimed in claim 1.
The combination of Herraiz and Stang (as set forth prior) teaches the voltage limiting circuit (incorporated from Stang: “measurement circuit 27” including “Zener diode 29” and “resistance element 30”; Fig. 1), whose current flow is identified (Stang: voltage across “resistance element 30” is measured; thus, a current flow through “30” is identified), is connected between the ground potential (Herraiz: “GND” shown in Fig. 2; Stang equivalent: “ground potential 17”, connected to “P-” by “24”, shown in Fig. 1) and the at least one positive LV potential (Herraiz: positive side of LV battery, see “positive supply potential” labeled in the annotated Fig. 2, included supra; Stang equivalent: “supply line 20” connected to “pole P+”, shown in Fig. 1).
Herraiz further discloses the at least one positive LV potential comprises the positive LV supply potential (positive side of LV battery, see “positive supply potential” labeled in the annotated Fig. 2, included supra).
Regarding Claim 11, the combination of Herraiz and Stang teaches the method as claimed in claim 1.
The combination of Herraiz and Stang (as set forth prior) teaches the voltage limiting circuit (incorporated from Stang: “measurement circuit 27” including “Zener diode 29” and “resistance element 30”; Fig. 1), whose current flow is identified (Stang: voltage across “resistance element 30” is measured; thus, a current flow through “30” is identified), is connected between the ground potential (Herraiz: “GND” shown in Fig. 2; Stang equivalent: “ground potential 17”, connected to “P-” by “24”, shown in Fig. 1) and a positive LV potential (Herraiz: positive side of LV battery, see “positive supply potential” labeled in the annotated Fig. 2, included supra; Stang equivalent: “supply line 20” connected to “pole P+”, shown in Fig. 1).
Herraiz further discloses the at least one positive LV potential comprises the positive LV non-supply potential (any of the digital I/O signals to/from the MCU: “x[n]”, “r[n]”, “yP[n]”, “yN[n]”; Fig. 2).
NOTE: The claim language is written broadly such that the “voltage limiting circuit” is not required to be connected to the “positive LV non-supply potential”. Instead, it is simply required that the “voltage limiting circuit” be connected to “the at least one positive LV potential”, which is interpreted to include multiple positive LV potentials, including both supply and non-supply potentials. Thus, the existing claim language permits the voltage limiting circuit to be connected to a positive LV supply potential (as established supra by the combination of Herraiz and Stang) along with the mere existence of a positive LV non-supply potential (such as Herraiz’s MCU’s digital I/O signals).
Regarding Claim 12, the combination of Herraiz and Stang teaches the method as claimed in claim 11.
Herraiz further discloses the at least one positive LV potential further comprises the positive LV supply potential (positive side of LV battery; labeled in the annotated Fig. 2, included supra).
Herraiz further discloses a LV device (“insulation monitoring device” per ¶ [32]; labeled as “insulation monitoring” in Fig. 2) is connected to the ground potential (GND) and to the positive LV supply potential (positive side of LV battery).
Herraiz further discloses the positive LV non-supply potential (MCU’s digital I/O signals: “x[n]”, “r[n]”, “yP[n]”, “yN[n]”) is connected to the LV device (by being contained within the “insulation monitoring device”, each of the MCU’s digital I/O signals are thus also connected to the LV device).
Regarding Claim 13, the combination of Herraiz and Stang teaches the method as claimed in claim 12.
Herraiz further discloses the LV device (“insulation monitoring device” per ¶ [32]; labeled as “insulation monitoring” in Fig. 2) is an LV control device (¶ [32]: “voltage regulator may be used to regulate a voltage supply”, “microcontroller unit (MCU) … configured to facilitate …”; thus, both “voltage regulator” and “MCU” make the “insulation monitoring device” an LV control device).
Herraiz further discloses the LV device is an LV sensor apparatus (“MCU” and each “ADC” are used to sense voltages).
Herraiz further discloses the LV device is an LV communication apparatus (“MCU” communicates with “DAC” via the “x[n]” signal and with the “ADCs” via the “r[n]”, “yP[n]”, and “yN[n]” signals).
NOTE: The claim language only requires the LV device to be one of “an LV communication apparatus or an LV sensor apparatus or an LV control device”. However, because the “insulation monitoring device” taught by Herraiz reads on all three of these types of LV devices, the mapping is included herein.
Regarding Claim 14, the combination of Herraiz and Stang teaches the method as claimed in claim 1.
The combination of Herraiz and Stang (as set forth prior) discloses the voltage limiting circuit (incorporated from Stang: “measurement circuit 27” including “Zener diode 29” and “resistance element 30”; Fig. 1), whose current flow is identified (Stang: voltage across “resistance element 30” is measured; thus, a current flow through “30” is identified), comprises a Zener diode (Stang: “Zener diode 29” within “measurement circuit 27”; Fig. 1).
Claims 3-4 are rejected under 35 U.S.C. 103 as being unpatentable over Herraiz et al. (US 2013/0106437 A1) in view of Stang et al. (US 2024/0100956 A1) and Isaksson (US 2021/0129675 A1).
Regarding Claim 3, the combination of Herraiz and Stang teaches the method as claimed in claim 2.
The combination of Herraiz and Stang (as set forth prior) teaches the current flow is identified (incorporated from Stang: voltage across “resistance element 30” is measured; thus, a current flow through “30” is identified) to detect the insulation fault (Stang: “leakage resistor 26” and/or “short circuit 25”; Fig. 1).
Herraiz does not disclose the current flow is identified “on the basis of a potential change rate that is above a predetermined value, wherein the potential change rate comprises the rate at which the at least one HV potential changes over time with respect to the ground potential”.
Isaksson teaches the insulation fault is detected (title: “method for detecting an isolation fault”; Fig. 9 step 97) on the basis of a potential change rate (Fig. 5 shows voltage change of “25” from 0 V to -12 V over the time period “T4”; ¶ [62]: “rise characteristic over time”) that is above (in Fig. 5, the absolute value of (-12V / T4) is greater than (12V / T4); thus the potential change rate of “25” is greater than the predetermined change rate determined by “24” and “T4”; thus, per ¶ [76-77], the “electronic controller 16” determines there is an isolation fault if “25” has a potential change rate greater than that of “24” by a predetermined threshold value) a predetermined value (typical “T5” value is known as shown in Figs. 4-5; thus a typical potential change rate of (12V / T5) is a predetermined value prior to the calculations performed by “electronic controller 16” per ¶ [77]).
Isaksson further teaches the potential change rate comprises the rate at which the at least one potential (¶ [67]: “second voltage 25 of the second capacitor 10”; Fig. 1; see note, included infra) changes over time with respect to the ground potential (¶ [50]: “common junction 11 of the first and second capacitors 9, 10 is connected to a chassis 12 of the vehicle”).
NOTE: Isaksson’s teachings are for detecting a rate of change of a potential, though not specifically an HV potential as claimed. However, Isaksson is not relied upon to teach the HV potential. The HV potentials are established supra by the base reference Herraiz. One of ordinary skill in the art understands that Isaksson’s teachings for detecting an insulation fault are analogous to that of base reference Herraiz.
Isaksson further teaches detecting the insulation fault on the basis of a potential change rate that is above a predetermined value to improve the performance in terms of rapid isolation resistance testing, reduced complexity, and improved safety (¶ [7]).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the method to identify the current flow to detect the insulation fault disclosed by the combination of Herraiz and Stang to identify the current flow on the basis of a potential change rate that is above a predetermined value, as taught by Isaksson, to reduce the time to detect the isolation fault, reduce the complexity of the circuit implementation compared to other insulation monitor circuits, and to improve safety for the user.
Regarding Claim 4, the combination of Herraiz and Stang teaches the method as claimed in claim 2.
The combination of Herraiz and Stang (as set forth prior) teaches the current flow is identified (incorporated from Stang: voltage across “resistance element 30” is measured; thus, a current flow through “30” is identified) to detect the insulation fault (Stang: “leakage resistor 26” and/or “short circuit 25”; Fig. 1).
Herraiz does not disclose the current flow is identified “on the basis of a change to a difference of potential between the at least one HV potential and the ground potential that results in the difference of potential being below a predetermined value, wherein the change to the difference of potential occurs while the difference of potential between the at least one HV potential and the ground potential is within a predetermined range.”
Isaksson teaches the insulation fault is detected (title: “method for detecting an isolation fault”; Fig. 9 step 97) on the basis of a change to a potential difference (Fig. 3 shows “24” changes from 0V at time “T0” to +8V at time “T2”; “24” represents the voltage across the “first capacitor 9”, measured by “first voltage sensor 22”; thus, “24” is the positive HV potential referenced to the ground potential; Figs. 1, 3) between the at least one potential (¶ [67]: “second voltage 25 of the second capacitor 10”; Fig. 1; see note, included infra) and the ground potential (ground symbol in Fig. 1; ¶ [50]: “common junction 11 of the first and second capacitors 9, 10 is connected to a chassis 12 of the vehicle”; ¶ [52]: “reference ground plane”) that results in the difference of potential being below a predetermined value (voltage level of +14V after time “T3” represents “a faultless isolation resistance” per ¶ [71]; Figs. 2-3).
NOTE: Isaksson’s teachings are for detecting a change to a potential difference, though not specifically for a HV potential as claimed. However, Isaksson is not relied upon to teach the HV potential. The HV potentials are established supra by the base reference Herraiz. One of ordinary skill in the art understands that Isaksson’s teachings for detecting an insulation fault are analogous to that of base reference Herraiz.
Isaksson further teaches the change to the difference of potential occurs while the difference of potential between the at least one potential (25) and the ground potential (11) is within a predetermined range (Fig. 2 shows a normal range of 56V between “24” and “25” at steady state, approx. 3.0 ms; Fig. 3 shows that during an insulation fault, there is still 56V between “24” and “25” at steady-state; thus, “25” is also within a predetermined range of 56V from the ground potential “11” during the insulation fault).
Isaksson further teaches detecting the insulation fault on the basis of a change to a potential difference that is below a predetermined value to improve the performance in terms of rapid isolation resistance testing, reduced complexity, and improved safety (¶ [7]).
It would have been obvious to one of ordinary skill in the art to modify the method to identify the current flow to detect the insulation fault disclosed by the combination of Herraiz and Stang to identify the current flow on the basis of a change to a potential difference that is below a predetermined value, as taught by Isaksson, to reduce the time to detect the isolation fault, reduce the complexity of the circuit implementation compared to other insulation monitor circuits, and to improve safety for the user.
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Herraiz et al. (US 2013/0106437 A1) in view of Stang et al. (US 2024/0100956 A1) and Lasson et al. (US 2014/0103936 A1).
Regarding Claim 6, the combination of Herraiz and Stang teaches the method as claimed in claim 5.
Herraiz discloses the insulation monitor (“insulation monitoring device” per ¶ [32]; labeled as “insulation monitoring” in Fig. 2) also carries out an active insulation test (applies a “test signal” to the “high-voltage power net” and then analyzes the frequency response; ¶ [16]) of the HV on-board electrical system branch (includes “High Voltage Powernet with HV-Loads”; see annotated Fig. 2) by actively reversing the charge (Fig. 3 shows the “test signals” alternate between positive and negative voltages with respect to “GND”; thus, the charges applied across the Cy capacitances reverse polarity accordingly) of at least one y-type capacitor (Cy capacitor) (“CYP” and “CYN”; Fig. 2) connected between the ground potential (“GND” serves as reference to the insulation monitor and as the midpoint connection between “CYP” and “CYN”; Fig. 2) on the one hand and the at least one HV potential (“HV_P” and “HV_N”; Fig. 2 shows “CYP” connected from “HV_P” to “GND” and “CYN” connected from “HV_N” to “GND”) on the other hand.
Herraiz further discloses detecting shift of potential (“frequency response” shown in Fig. 4; the attenuation level at various frequencies included in the frequency response represents reductions in the voltage, ie potential shifts, from the test signals “x(t)” to the measured responses “yP(t)” and “yN(t)”; Figs. 2-4) between the at least one of the HV potentials (HV_P, HV_N) and the ground potential (GND) caused by the active charge reversal (applied by test signals shown in Fig. 4).
The combination of Herraiz and Stang further teaches a current flow through the voltage limiting circuit (Stang: “measurement circuit 27” including “Zener diode 29” and “resistance element 30”; Fig. 1) is identified (incorporated from Stang: voltage across “resistance element 30” is measured; thus, a current flow through “30” is identified), which corresponds to the detection of the insulation fault (Stang: “leakage resistor 26” and/or “short circuit 25”; Fig. 1).
Herraiz does not disclose “the active charge reversal is interrupted when a current flow through the voltage limiting circuit is identified” (which corresponds to the detection of the insulation fault).
Lasson teaches the active insulation test (“method for monitoring insulation faults” depicted by flowchart in Fig. 2) is interrupted (¶ [50]: “the user can get an appropriate notification … the sequence can be aborted or, alternatively, continued with step 218”) when an insulation fault is detected (¶ [50]: “if R_isol1 is less than RO … then an insulation fault is present”).
NOTE: Lasson does not provide this teaching specifically for an “active charge reversal” as claimed. However, one of ordinary skill in the art understands that the teachings of Lasson with respect to interrupting an active insulation test when an insulation fault is detected are also applicable to an active charge reversal, which is a type of active insulation test.
Lasson further teaches the interruption of the active insulation test for the advantage of enabling the user to make the decision of the next step (¶ [50, 54]), which improves troubleshooting flexibility.
It would have been obvious to one of ordinary skill in the art to modify the method and active insulation test disclosed by the combination of Herraiz and Stang to interrupt the active insulation test upon when the insulation fault is detected, as taught by Lasson, to improve flexibility of troubleshooting options by enabling the user to make the decision of the next action.
Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Herraiz et al. (US 2013/0106437 A1) in view of Stang et al. (US 2024/0100956 A1) and Boehme (US 2023/0018999 A1).
Regarding Claim 9, the combination of Herraiz and Stang teaches the method as claimed in claim 1.
The combination of Herraiz and Stang (as set forth prior) teaches the insulation fault (Stang: “leakage resistor 26” and/or “short circuit 25”; Fig. 1) is identified by identifying a current flow (incorporated from Stang: voltage across “resistance element 30” is measured; thus, a current flow through “30” is identified) through the voltage limiting circuit (Stang: “measurement circuit 27” including “Zener diode 29” and “resistance element 30”; Fig. 1).
Herraiz does not disclose “at least one of the following measures is carried out if the insulation fault is identified” with the possible measures being “disconnecting a high-voltage storage battery of the HV on-board electrical system branch from the remaining HV on-board electrical system branch by circuit breakers; disconnecting at least one y-type (Cy) filter capacitor of the HV on-board electrical system, wherein the HV on-board electrical system comprises at least one Cy filter capacitor connected between the ground potential on the one hand and at least one HV potential of the plurality on the other hand; disconnecting a charging post connected to the HV on-board electrical system; or discharging the HV on-board electrical system branch.”
Boehme teaches at least one of the following measures is carried out if the insulation fault (“insulation fault IF”; Figs. 1-3; ¶ [48, 69]) is identified (¶ [69]: “the detection of the reduction of the voltage between one of the high-voltage potentials HV+, HV- and the reference potential M”).
Boehme further teaches disconnecting (¶ [69]: “opening of the main protections HS+, HS-“) a high-voltage storage battery (“high-voltage battery 6”) of the HV on-board electrical system branch from the remaining HV on-board electrical system branch (opening of “HS+” and “HS-” results in “7” disconnected from the rest of the HV system; Figs. 1-3) by circuit breakers (“main protections HS+, HS-”, drawn as switches to break the circuit in Figs. 1-3).
Boehme further teaches discharging the HV on-board electrical system branch (¶ [69]: “an active discharging of … both Y capacitors”).
Boehme further teaches these measures to improve the safety (¶ [14, 42, 66]) of the vehicle on-board electrical system and the method of operation thereof.
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the method and on-board electrical system disclosed by the combination of Herraiz and Stang to disconnect the high-voltage storage battery and discharge the HV on-board electrical system branch upon detection of an insulation fault, as taught by Boehme, to improve the safety of the vehicle on-board electrical system and the method of operation thereof.
Allowable Subject Matter
Claim 7 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action, to overcome the objection(s) set forth in this Office action, and to include all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding Claim 7, though the prior art teaches the limitations of Claims 1, 2, and 5 including a method for detecting an insulation fault between an HV potential and a positive LV potential in a vehicle on-board electrical system, wherein an insulation monitor identifies the current flow corresponding to the insulation fault by an active insulation test, it fails to teach the inclusion of and the combination with “wherein, during the active charge reversal, a difference of potential between the at least one HV potential and the ground potential does not drop below a minimum voltage and the current flow through the voltage limiting circuit is identified on the basis of a change to the difference of potential between the at least one HV potential and the ground potential that is below a predetermined value, wherein the predetermined value is smaller than the minimum voltage”.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/DANIEL P MCFARLAND/ Examiner, Art Unit 2859
/DREW A DUNN/ Supervisory Patent Examiner, Art Unit 2859