DETAILED ACTION
Applicant’s amendment and arguments filed November 11, 2025 is acknowledged.
Claims 1-15 are currently pending.
Information Disclosure Statement
The information disclosure statement submitted on November 3, 2025 has been considered by the Examiner and made of record in the application.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1, 2, 6, 7, 11, and 12 are rejected under 35 U.S.C. 103 as being unpatentable over MIYAZAKI et al. (hereinafter Miyazaki) (U.S. Patent Application Publication # 2012/0204083 A1) in view of XU et al. (hereinafter Xu) (U.S. Patent Application Publication # 2016/0241682 A1), and further in view of Nan et al. (hereinafter Nan) (U.S. Patent Application Publication # 2015/0063280 A1).
Regarding claims 1, 6, and 11, Miyazaki teaches and discloses a method and a wireless communication apparatus (transmitter, 30, figure 1), comprising: a processor (inherent component of the transmitter) configured to: divide a Transport Block (TB) having a length greater than a maximum information block length into two or more code blocks (abstract; “…segmenting the information bits into a number of code blocks when a bit size of the information bits is greater than a stipulated size…”; [0031]; teaches segmenting transfer block information into code blocks if the size exceeds a stipulated, max size); generate check data blocks (dummy bits/CRC bits) by performing block encoding on the two or more code blocks ([0029]; [0033]; teaches generating dummy bits and CRC bits); obtain encoded code blocks by performing, for each of the two or more code block, the following operations: add redundancy check (CRC) bits, perform channel encoding, and perform rate matching ([0126]; [0127]; [0133]; teaches adding CRC bits, performing channel encoding and rate matching); delete a part of bits at any position of each encoded code block and a part of bits at any position of each check data block ([0072]; [0128]; [0154]; teaches deleting/puncturing segmented code blocks and dummy bits/CRC bits).
However, Miyazaki may not explicitly disclose wherein the maximum information block length is determined in accordance with a maximum number (Ncb) of Orthogonal Frequency Division Multiplexing (OFDM) symbols allowed to be occupied by each code block in a time domain.
Nonetheless, in the same field of endeavor, Xu teaches wherein the maximum information block length is determined in accordance with a maximum number (Ncb) of Orthogonal Frequency Division Multiplexing (OFDM) symbols allowed to be occupied by each code block in a time domain ([0004]; “…a maximum number of information bits that can be encoded such that, after the plurality of information bits have been encoded… a block coding scheme to obtain block coded bits from the coded information bits, the block coded bits fit within a single orthogonal frequency division multiplex (OFDM) symbol on the communication channel, wherein the maximum number of information bits is based on a number of repetitions of the coded information bits by the block coding scheme…”; [0061]; “…a maximum number of information bits is determined where the maximum number can be encoded such that, after the plurality of information bits have been encoded using i) a forward error correction scheme to obtain coded information bits, and ii) a block coding scheme to obtain block coded bits from the coded information bits, the block coded bits fit within a single orthogonal frequency division multiplex (OFDM) symbol on the communication channel. The maximum number of information bits is based on a number of repetitions of the coded information bits by the block coding scheme…”; teaches determining the maximum number of information bits with a maximum number of OFDM symbols allowed to be occupied by each block).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to incorporate determining the maximum number of information bits with a maximum number of OFDM symbols allowed to be occupied by each block as taught by Xu with the apparatus and method for code block segmentation as disclosed by Miyazaki for the purpose of improving encoding methods and maximize encoding resources, as suggested by Xu.
However, Miyazaki, as modified by Xu, may not explicitly disclose perform code block cascading on the encoded code blocks from which the part of bits are deleted, and on the check data blocks from which the part of bits are deleted, wherein the code block cascading is performed by the processor configured to: connect in series bits of the encoded code blocks from which the part of bits has been deleted and bits of the check data blocks from which the part of bits has been deleted; and put the check data blocks from which the part of bits has been deleted behind the encoded code blocks from which the part of bits has been deleted.
Nonetheless, in the same field of endeavor, Nan teaches and suggests perform code block cascading on the encoded code blocks from which the part of bits are deleted, and on the check data blocks from which the part of bits are deleted, wherein the code block cascading is performed by the processor configured to: connect in series bits of the encoded code blocks from which the part of bits has been deleted and bits of the check data blocks from which the part of bits has been deleted; and put the check data blocks from which the part of bits has been deleted behind the encoded code blocks from which the part of bits has been deleted ([0451]; [0453]; [0463]; “…code block cascading: successively and sequentially connect bits of each code block which are obtained after the rate matching…”; [0488]-[0490]; teaches code block cascading including successively and sequentially connect bits of each code block after rate matching and puncturing).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to incorporate code block cascading including successively and sequentially connect bits of each code block after rate matching and puncturing as taught by Nan with the apparatus and method for code block segmentation as disclosed by Miyazaki, as modified by Xu, for the purpose of improving data transmission and improve coverage at a PUSCH medium data rate, as suggested by Nan.
Regarding claims 2, 7, and 12, Miyazaki, as modified by Xu and Nan, further teaches and suggests wherein the maximum information block length is obtained from a transmission mode indication (abstract; “…segmenting the information bits into a number of code blocks when a bit size of the information bits is greater than a stipulated size…”; [0031]; teaches segmenting transfer block information into code blocks if the size exceeds a stipulated, max size).
Claims 3-5, 8-10, and 13-15 are rejected under 35 U.S.C. 103 as being unpatentable over MIYAZAKI et al. (hereinafter Miyazaki) (U.S. Patent Application Publication # 2012/0204083 A1) in view of XU et al. (hereinafter Xu) (U.S. Patent Application Publication # 2016/0241682 A1) and Nan et al. (hereinafter Nan) (U.S. Patent Application Publication # 2015/0063280 A1), and further in view of Nimbalker et al. (hereinafter Nimbalker) (U.S. Patent Application Publication # 2014/0313985 A1).
Regarding claims 3, 8, and 13, Miyazaki, as modified by Xu and Nan, discloses code block segmentation, but may not explicitly disclose wherein the maximum information block length is obtained from a downlink control information (DCI) format.
Nonetheless, in the same field of endeavor, Nimbalker teaches and suggests wherein the maximum information block length is obtained from a downlink control information (DCI) format ([0040]; [0049]; teaches the transport block size is obtained from a DCI).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the transport block size is obtained from a DCI as taught by Nimbalker with the apparatus and method for code block segmentation as disclosed by Miyazaki, as modified by Xu and Nan, for the purpose of enhancing modulation schemes, as suggested by Nimbalker.
Regarding claims 4, 9, and 14, Miyazaki, as modified by Xu and Nan, discloses code block segmentation, but may not explicitly disclose wherein the maximum information block length is obtained from a radio network temporary identifier (RNTI).
Nonetheless, in the same field of endeavor, Nimbalker teaches and suggests wherein the maximum information block length is obtained from a radio network temporary identifier (RNTI) ([0040]; [0049]; teaches the transport block size is obtained from RNTI).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the transport block size is obtained from RNTI as taught by Nimbalker with the apparatus and method for code block segmentation as disclosed by Miyazaki, as modified by Xu and Nan, for the purpose of enhancing modulation schemes, as suggested by Nimbalker.
Regarding claims 5, 10, and 15, Miyazaki, as modified by Xu and Nan, discloses code block segmentation, but may not explicitly disclose wherein the maximum information block length is determined according to at least a maximum number of orthogonal frequency division multiplexing (OFDM) symbols allowed to be occupied by each code block in a time domain, and a number of frequency-domain subcarriers occupied by a transmission signal that includes the TB.
Nonetheless, in the same field of endeavor, Nimbalker teaches and suggests wherein the maximum information block length is determined according to at least a maximum number of orthogonal frequency division multiplexing (OFDM) symbols allowed to be occupied by each code block in a time domain, and a number of frequency-domain subcarriers occupied by a transmission signal that includes the TB ([0039]; [0040]; [0052]; teaches the transport block size is determined based on the number of OFDM symbols).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the transport block size is determined based on the number of OFDM symbols as taught by Nimbalker with the apparatus and method for code block segmentation as disclosed by Miyazaki, as modified by Xu and Nan, for the purpose of enhancing modulation schemes, as suggested by Nimbalker.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP §§ 706.02(l)(1) - 706.02(l)(3) for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/process/file/efs/guidance/eTD-info-I.jsp.
Claims 1-15 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1, 2, 5, and 9 of U.S. Patent No. 11,477,065 B2. Although the claims at issue are not identical, they are not patentably distinct from each other because the claims of the instant application are equivalent in scope and embodiment and are anticipated by the claims of the patent.
Instant Application (17/929,299)
U.S. Patent No. 10,708,099 B2
Claim 1
Claim 1
A method for code block division, comprising: dividing a Transfer Block (TB) having a length greater than a maximum information block length into two or more code blocks, wherein the maximum information block length is determined in accordance with a maximum number (Ncb) of Orthogonal Frequency Division Multiplexing (OFDM) symbols allowed to be occupied by each code block in a time domain; generating check data blocks by performing block encoding on the two or more code blocks; obtaining encoded code blocks by performing, for each of the two or more code block, the following operations: adding redundancy check (CRC) bits, performing channel encoding, and performing rate matching; deleting a part of bits at any position of each encoded code block and a part of bits at any position of each check data block; performing code block cascading on the encoded code blocks from which the part of bits are deleted, and on the check data blocks from which the part of bits are deleted, wherein the code block cascading is performed by: connecting in series bits of the encoded code blocks from which the part of bits has been deleted and bits of the check data blocks from which the part of bits has been deleted; and putting the check data blocks from which the part of bits has been deleted behind the encoded code blocks from which the part of bits has been deleted.
A method of code block division, comprising: determining a maximum information block length of a code block according to a plurality of division related parameters associated with a Transport Block (TB), wherein the plurality of division related parameters includes physical channel resource parameters that describe a number of symbols and a number of subcarriers associated with the TB, and a plurality of spectral efficiency parameters that describe encoding parameters for the TB, wherein the plurality of spectral efficiency parameters include a modulation scheme (M) of a transmission signal that includes the TB, a coding rate (R) of the TB, and a number (Nlayer) of spatial layers occupied by the transmission signal; and dividing the TB having a size greater than the maximum information block length into two or more code blocks, wherein a number of the two or more code blocks is determined according to the maximum information block length, the size of the TB, and a length of cyclic redundancy check (CRC) bits of each code block, wherein an information length of each of the two or more code blocks after the dividing the TB is determined according to a set of information block lengths supported by an encoder, the number of the two or more code blocks, the size of the TB and the length of the CRC bits of each code block.
Claim 2 is anticipated by claim 1 of the patent.
Claim 3 is anticipated by claim 1 of the patent.
Claim 4 is anticipated by claim 1 of the patent.
Claim 5 is anticipated by claim 2 of the patent.
Claim 6
Claim 5
A wireless communication apparatus, comprising: a processor configured to: divide a Transfer Block (TB) having a length greater than a maximum information block length into two or more code blocks, wherein the maximum information block length is determined in accordance with a maximum number (Ncb) of Orthogonal Frequency Division Multiplexing (OFDM) symbols allowed to be occupied by each code block in a time domain; generate check data blocks by performing block encoding on the two or more code blocks; obtain encoded code blocks by performing, for each of the two or more code block, the following operations: add redundancy check (CRC) bits, perform channel encoding, and perform rate matching; delete a part of bits at any position of each encoded code block and a part of bits at any position of each check data block; perform code block cascading on the encoded code blocks from which the part of bits are deleted, and on the check data blocks from which the part of bits are deleted, wherein the code block cascading is performed by the processor configured to: connect in series bits of the encoded code blocks from which the part of bits has been deleted and bits of the check data blocks from which the part of bits has been deleted; and put the check data blocks from which the part of bits has been deleted behind the encoded code blocks from which the part of bits has been deleted.
A wireless communication apparatus, comprising a processor configured to: determine a maximum information block length of a code block according to a plurality of division related parameters associated with a Transport Block (TB), wherein the plurality of division related parameters includes physical channel resource parameters that describe a number of symbols and a number of subcarriers associated with the TB, and a plurality of spectral efficiency parameters that describe encoding parameters for the TB, wherein the plurality of spectral efficiency parameters include a modulation scheme (M) of a transmission signal that includes the TB, a coding rate (R) of the TB, and a number (Nlayer) of spatial layers occupied by the transmission signal; and divide the TB having a size greater than the maximum information block length into two or more code blocks, wherein a number of the two or more code blocks is determined according to the maximum information block length, the size of the TB, and a length of cyclic redundancy check (CRC) bits of each code block, wherein an information length of each of the two or more code blocks after the TB is divided is determined according to a set of information block lengths supported by an encoder, the number of the two or more code blocks, the size of the TB and the length of the CRC bits of each code block.
Claim 7 is anticipated by claim 5 of the patent.
Claim 8 is anticipated by claim 5 of the patent.
Claim 9 is anticipated by claim 5 of the patent.
Claim 10 is anticipated by claim 2 of the patent.
Claim 11
Claim 9
A non-transitory computer readable storage media comprising instructions for code block division, wherein the instructions configure a processor to perform a method comprising: dividing a Transfer Block (TB) having a length greater than a maximum information block length into two or more code blocks, wherein the maximum information block length is determined in accordance with a maximum number (Ncb) of Orthogonal Frequency Division Multiplexing (OFDM) symbols allowed to be occupied by each code block in a time domain; generating check data blocks by performing block encoding on the two or more code blocks; obtaining encoded code blocks by performing, for each of the two or more code block, the following operations: adding redundancy check (CRC) bits, performing channel encoding, and performing rate matching; deleting a part of bits at any position of each encoded code block and a part of bits at any position of each check data block; performing code block cascading on the encoded code blocks from which the part of bits are deleted, and on the check data blocks from which the part of bits are deleted, wherein the code block cascading is performed by: connecting in series bits of the encoded code blocks from which the part of bits has been deleted and bits of the check data blocks from which the part of bits has been deleted; and putting the check data blocks from which the part of bits has been deleted behind the encoded code blocks from which the part of bits has been deleted.
A non-transitory computer readable storage media comprising instructions for code block division, wherein the instructions configure a processor to perform a method comprising: determining a maximum information block length of a code block according to a plurality of division related parameters associated with a Transport Block (TB), wherein the plurality of division related parameters includes physical channel resource parameters that describe a number of symbols and a number of subcarriers associated with the TB, and a plurality of spectral efficiency parameters that describe encoding parameters for the TB, wherein the plurality of spectral efficiency parameters include a modulation scheme (M) of a transmission signal that includes the TB, a coding rate (R) of the TB, and a number (Nlayer) of spatial layers occupied by the transmission signal; and dividing the TB having a size greater than the maximum information block length into two or more code blocks, wherein a number of the two or more code blocks is determined according to the maximum information block length, the size of the TB, and a length of cyclic redundancy check (CRC) bits of each code block, wherein an information length of each of the two or more code blocks after the dividing the TB is determined according to a set of information block lengths supported by an encoder, the number of the two or more code blocks, the size of the TB and the length of the CRC bits of each code block.
Claim 12 is anticipated by claim 9 of the patent.
Claim 13 is anticipated by claim 9 of the patent.
Claim 14 is anticipated by claim 9 of the patent.
Claim 15 is anticipated by claim 2 of the patent.
Claims 1-15 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1, 4, 6, and 11 of U.S. Patent No. 10,708,099 B2. Although the claims at issue are not identical, they are not patentably distinct from each other because the claims of the instant application are equivalent in scope and embodiment and are anticipated by the claims of the patent.
Instant Application (17/929,299)
U.S. Patent No. 10,708,099 B2
Claim 1
Claim 1
A method for code block division, comprising: dividing a Transfer Block (TB) having a length greater than a maximum information block length into two or more code blocks; generating check data blocks by performing block encoding on the two or more code blocks; obtaining encoded code blocks by performing, for each of the two or more code block, the following operations: adding redundancy check (CRC) bits, performing channel encoding, and performing rate matching; deleting a part of bits at any position of each encoded code block and a part of bits at any position of each check data block; performing code block cascading on the encoded code blocks from which the part of bits are deleted, and on the check data blocks from which the part of bits are deleted, wherein the code block cascading is performed by: connecting in series bits of the encoded code blocks from which the part of bits has been deleted and bits of the check data blocks from which the part of bits has been deleted; and putting the check data blocks from which the part of bits has been deleted behind the encoded code blocks from which the part of bits has been deleted.
A method for code block division, comprising: determining a maximum information block length according to a division related parameter; and dividing a Transport Block (TB) having a length greater than the maximum information block length into two or more code blocks; wherein an information length after code block division is less than the determined maximum information block length; wherein the determining the maximum information block length according to the division related parameter comprises: determining a reference information block length of a code block according to the division related parameter; and determining the maximum information block length according to the reference information block length and a hardware parameter; wherein dividing the TB having a length greater than the maximum information block length into two or more code blocks comprises dividing the TB having a length greater than the maximum information block length into two or more code blocks according to the division related parameter and the determined maximum information block length; wherein when the division related parameter comprises at least one of a physical channel resource parameter or a spectral efficiency parameter, the spectral efficiency parameter comprises any one or more of the following parameters: a modulation scheme (M) of a transmission signal, a coding rate (R) of a TB, and a number (Nlayer) of spatial layers occupied by the transmission signal, and the physical channel resource parameter comprises a number (Ntb) of Orthogonal Frequency Division Multiplexing (OFDM) symbols occupied by the TB in a time domain and a number (Nsubcarrier) of frequency-domain subcarriers occupied by the transmission signal; and wherein the determining the reference information block length comprises: determining the reference information block length (KR) of the code block according to the physical channel resource parameter and the spectral efficiency parameter.
Claim 2 is anticipated by claim 1 of the patent.
Claim 3 is anticipated by claim 1 of the patent.
Claim 4 is anticipated by claim 1 of the patent.
Claim 5 is anticipated by claim 4 of the patent.
Claim 6
Claim 6
A wireless communication apparatus, comprising: a processor configured to: divide a Transfer Block (TB) having a length greater than a maximum information block length into two or more code blocks; generate check data blocks by performing block encoding on the two or more code blocks; obtain encoded code blocks by performing, for each of the two or more code block, the following operations: add redundancy check (CRC) bits, perform channel encoding, and perform rate matching; delete a part of bits at any position of each encoded code block and a part of bits at any position of each check data block; perform code block cascading on the encoded code blocks from which the part of bits are deleted, and on the check data blocks from which the part of bits are deleted, wherein the code block cascading is performed by the processor configured to: connect in series bits of the encoded code blocks from which the part of bits has been deleted and bits of the check data blocks from which the part of bits has been deleted; and put the check data blocks from which the part of bits has been deleted behind the encoded code blocks from which the part of bits has been deleted.
An apparatus for code block division, comprising a hardware processor being configured to: determine a maximum information block length according to a division related parameter; and divide a Transport Block (TB) having a length greater than the maximum information block length into two or more code blocks; wherein an information length after code block division is less than the determined maximum information block length; wherein the maximum information block length according to the division related parameter is determined by: determining a reference information block length of a code block according to a division related parameter; and determining the maximum information block length according to the reference information block length and a hardware parameter; wherein the TB having a length greater than the maximum information block length is divided into two or more code blocks according to the division related parameter and the determined maximum information block length; and wherein when the division related parameter comprises at least one of a physical channel resource parameter or a spectral efficiency parameter, the spectral efficiency parameter comprises any one or more of the following parameters: a modulation scheme (M) of a transmission signal, a coding rate (R) of a TB, and a number (Nlayer) of spatial layers occupied by the transmission signal, and the physical channel resource parameter comprises a number (Ntb) of Orthogonal Frequency Division Multiplexing (OFDM) symbols occupied by the TB in a time domain and a number (Nsubcarrier) of frequency-domain subcarriers occupied by the transmission signal; and wherein the reference information block length (KR) of the code block is determined according to the physical channel resource parameter and the spectral efficiency parameter.
Claim 7 is anticipated by claim 6 of the patent.
Claim 8 is anticipated by claim 6 of the patent.
Claim 9 is anticipated by claim 6 of the patent.
Claim 10 is anticipated by claim 4 of the patent.
Claim 11
Claim 11
A non-transitory computer readable storage media comprising instructions for code block division, wherein the instructions configure a processor to perform a method comprising: dividing a Transfer Block (TB) having a length greater than a maximum information block length into two or more code blocks; generating check data blocks by performing block encoding on the two or more code blocks; obtaining encoded code blocks by performing, for each of the two or more code block, the following operations: adding redundancy check (CRC) bits, performing channel encoding, and performing rate matching; deleting a part of bits at any position of each encoded code block and a part of bits at any position of each check data block; performing code block cascading on the encoded code blocks from which the part of bits are deleted, and on the check data blocks from which the part of bits are deleted, wherein the code block cascading is performed by: connecting in series bits of the encoded code blocks from which the part of bits has been deleted and bits of the check data blocks from which the part of bits has been deleted; and putting the check data blocks from which the part of bits has been deleted behind the encoded code blocks from which the part of bits has been deleted.
A non-transitory computer readable storage media comprising instructions for code block division, wherein the instructions configure a processor to perform a method comprising: determining a maximum information block length according to a division related parameter; and dividing a Transport Block (TB) having a length greater than the maximum information block length into two or more code blocks; wherein an information length after code block division is less than the determined maximum information block length; wherein the maximum information block length according to the division related parameter is determined by: determining a reference information block length of a code block according to a division related parameter; and determining the maximum information block length according to the reference information block length and a hardware parameter; wherein the TB having a length greater than the maximum information block length is divided into two or more code blocks according to the division related parameter and the determined maximum information block length; and wherein when the division related parameter comprises at least one of a physical channel resource parameter or a spectral efficiency parameter, the spectral efficiency parameter comprises any one or more of the following parameters: a modulation scheme (M) of a transmission signal, a coding rate (R) of a TB, and a number (Nlayer) of spatial layers occupied by the transmission signal, and the physical channel resource parameter comprises a number (Ntb) of Orthogonal Frequency Division Multiplexing (OFDM) symbols occupied by the TB in a time domain and a number (Nsubcarrier) of frequency-domain subcarriers occupied by the transmission signal; and wherein the reference information block length (KR) of the code block is determined according to the physical channel resource parameter and the spectral efficiency parameter.
Claim 12 is anticipated by claim 11 of the patent.
Claim 13 is anticipated by claim 11 of the patent.
Claim 14 is anticipated by claim 11 of the patent.
Claim 15 is anticipated by claim 4 of the patent.
Response to Arguments
Applicant’s arguments, filed November 11, 2025, with respect to the rejection(s) of claim(s) 1-15 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of XU et al. (U.S. Patent Application Publication # 2016/0241682 A1).
Conclusion
The prior art made of record and not relied upon is considered pertinent to Applicant’s disclosure.
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/Suk Jin Kang/
Examiner, Art Unit 2477
February 21, 2026