Prosecution Insights
Last updated: May 29, 2026
Application No. 17/931,681

CONTROLLING ELECTRICAL POWER FLOWING FROM A BATTERY

Final Rejection §103
Filed
Sep 13, 2022
Priority
Aug 16, 2022 — provisional 63/371,624
Examiner
JEPPSON, PAMELA J
Art Unit
2859
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Microsoft Technology Licensing, LLC
OA Round
2 (Final)
65%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
86%
With Interview

Examiner Intelligence

Grants 65% — above average
65%
Career Allowance Rate
65 granted / 100 resolved
-3.0% vs TC avg
Strong +21% interview lift
Without
With
+20.6%
Interview Lift
resolved cases with interview
Typical timeline
3y 4m
Avg Prosecution
33 currently pending
Career history
161
Total Applications
across all art units

Statute-Specific Performance

§101
1.1%
-38.9% vs TC avg
§103
93.2%
+53.2% vs TC avg
§102
1.8%
-38.2% vs TC avg
§112
3.6%
-36.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 100 resolved cases

Office Action

§103
DETAILED ACTION Status of the Claims In the communication dated December 31, 2025, claims 1-20 are pending. Claims 1-3 and 5-6 are currently amended. Response to Arguments Regarding claim 1, Applicant argues that Rodriguez fails to teach the amended portion of claim 1 of “a first power channel including a first first-stage regulator having a current limiter configured to dynamically limit, to the first current limit value, a first current flowing from the battery to the first processing unit and resulting in a first voltage droop on a first- stage output voltage; and a second power channel including a second first-stage regulator having a current limiter configured to dynamically limit, to the second current limit value, a second current flowing from the battery to the second processing unit and resulting in a second voltage droop on a second first-stage output voltage”. Particularly that Rodriguez teaches that the first regulator controls a supply adjustment block in response to the differences in voltage and the second regulator controls the supply adjustment block to raise the adjusted voltage above a droop level threshold (see pages 11-12 of applicant remarks). Rodriguez is used to reject “a first regulator . . . resulting in a first voltage droop on a first stage output voltage”. Rodriguez teaches that the DLVR produces a droop threshold level (see Rodriguez ¶24-25). It should be noted that although the applicant is arguing, with regard to claim 1 the second regulator, claim 1 does not recite a second-stage regulator. Thus, the arguments are not considered persuasive. Regarding claim 8, the Applicant argues that Rodriguez fails to teach a power channel as recited in the claim arguing that in contrast to the claims Rodriguez teaches that a first regulator controls a supply adjustment block in response to differences in voltage and a second regulator controls the supply adjustment block to raise the adjusted voltage above a droop threshold (see page 13-15 of the applicant remarks). However, it is uncertain what portion of Rodriguez is contrary to the claim language. As detailed in the rejection below, Rodriguez teaches that the DLVR 22 (first regulator) produces the droop threshold and outputs to FDD 26 (second regulator) (see Rodriguez ¶23-24), thus, teaching “a first-stage regulator (22A) including and resulting in a voltage droop on a first-stage output voltage”. Marchand is used to teach that a regulator is known to include a current limiter which regulates either in a voltage or a current controlled mode (see ¶48-49 of Marchand). When the control modes are applied to Rodriguez, the current flow is controlled such that the current from the processing unit will be controlled. When the supply voltage reaches or falls below the droop level (thus, not meeting the droop threshold condition) FDD generates a signal to increase the voltage. When the condition is met, then the voltage is lower (Rodriguez ¶24-25). Thus the arguments are not considered to be persuasive. The applicant is reminded that the language of the specification cannot be read into the claims. Regarding claim 14, the applicant argues the arguments relating to claim 8 apply. Thus, the response to claim 14 arguments are the same as with claim 8. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-5, 7-17 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Rodriguez et al. US20160342185A1 in view of Marchand et al. US20150061633A1 and Kumar et al. US20120319653A1. Regarding claim 1. Rodriguez discloses a power management system for a computing device having a power source (VDD) configured to power a first processing unit (16A) and a second processing unit (16B) comprising: a controller (14) a first power channel (to section A) including a first first-stage regulator (22A) resulting in a first voltage droop on a first- stage output voltage (¶24-25 – DLVR produces the droop threshold level) a second power channel (to section B) including a second first-stage regulator (22B) resulting in a second voltage droop on a second first-stage output voltage (¶24-25 – DLVR produces the droop threshold level) Rodriguez does not explicitly disclose to a battery providing the power, a controller to receive a relative state-of-charge of the battery compute a first current limit value and a second current limit value based at least on the relative state-of-charge; regulator having a current limiter configured to dynamically limit, to the first current limit value, a first current flowing from the battery to the first processing unit; and regulator having a current limiter configured to dynamically limit, to the second current limit value, a second current flowing from the battery to the second processing unit. Marchand discloses a battery (302) providing the power (FIG. 3), Marchand discloses a regulator having a current limiter configured to dynamically limit, to the current limit value, a current flowing from the battery to the first processing unit (¶49 – regulator fixes the output current to the maximum allowable output current Imax). It would be obvious to a person of ordinary skill in the art to provide a current limiter to each of the regulators of Rodriguez in order to allow the processing hardware to operate at peak performance and allow voltage regulation to accommodate peak current levels (Marchand; ¶6). Marchand does not explicitly disclose a controller to receive a relative state-of-charge of the battery; compute a first current limit value and a second current limit value based at least on the relative state-of-charge. Kimar discloses a controller to receive a relative state-of-charge of the battery (¶28/32 – SOC is monitored by a monitoring system 40) Kimar discloses to compute a current limit value and a current limit value based at least on the relative state-of-charge (¶35 – regulators limit the discharge current of a battery based on the state of charge of the cell string). It would have been obvious to one having ordinary skill in the art at the time the invention was made to use the state of charge to determine the current limit value of the regulators of Rodriguez since it was known in the art that the state of charge monitors the changes in health and operating conditions of the battery (Kimar; ¶35). Regarding claim 2. Rodriguez discloses that the first first-stage regulator (22A) of the first power channel (to section A) is a first-stage regulator configured to dynamically limit the first current and resulting in the first voltage droop on the first-stage output voltage (¶24 – DLVR 22 produces the droop threshold level) , and the first power channel further includes a second-stage regulator (FDD 26) configured to detect the first voltage droop on the first-stage output voltage and lower a second-stage output voltage by an amount in response to the first voltage droop meeting a droop threshold condition (¶24- when the adjusted supply voltage reaches or falls below the droop threshold level FDD 26 generates a charge injection signal 28), the second-stage output voltage configured to power the first processing unit (¶25 – processor core includes a supply port for receiving the adjusted power supply voltage and a charge). Regarding claim 3 and claim 9. Rodriguez discloses that the second-stage regulator (26) is configured to lower the second-stage output voltage by the amount for a duration of time (¶24 – when the adjusted supply voltage reaches or falls below the droop threshold level for a period of time) and then raise the second-stage output voltage by the amount after the duration of time in response to the first voltage droop on the first-stage output voltage meeting the droop threshold condition (¶24 – FDD 26 generates a charge injection signal, thus raising the output voltage. This would occur after the amount of time until the adjusted supply voltage drops below the threshold). Regarding claim 4. Rodriguez discloses that the second-stage regulator is implemented in a power management integrated circuit (PMIC) (¶77 – all components can be implemented on a single integrated circuit thus providing a PMIC). Regarding claim 5 and claim 13. Rodriguez does not explicitly disclose that the controller is configured to monitor a battery output voltage and adjust a performance parameter of the first processing unit in response to the battery output voltage meeting a battery droop threshold condition. Marchand discloses that the controller is configured to monitor a battery output voltage (Vout) and adjust a performance parameter of the first processing unit in response to the battery output voltage meeting a battery droop threshold condition (¶51 – regulator causes Vout to droop reducing the voltage needed by the regulator. The battery recovers from the drooping voltage level and provides a voltage above Vsysmin – the threshold). It would be obvious to a person of ordinary skill in the art to provide a current limiter to each of the regulators of Rodriguez in order to allow the processing hardware to operate at peak performance and allow voltage regulation to accommodate peak current levels (Marchand; ¶6). Regarding claim 7. Lee discloses that the controller (160) is implemented in a microcontroller (¶36 – the controller is a microcontroller). Regarding claim 8. Rodriguez discloses a power management system for a computing device having a power source (VDD) configured to power a processing unit (16), comprising: a controller (14) configured to a power channel (to section A) including: a first-stage regulator (22A) including and resulting in a voltage droop on a first-stage output voltage (¶24 – DLVR 22 produces the droop threshold level), and a second-stage regulator (26) configured to detect the voltage droop on the first-stage output voltage and lower a second-stage output voltage by an amount in response to the voltage droop meeting a droop threshold condition (¶24- when the adjusted supply voltage reaches or falls below the droop threshold level FDD 26 generates a charge injection signal 28), the second-stage output voltage configured to power the processing unit (¶25 – processor core includes a supply port for receiving the adjusted power supply voltage and a charge). Rodriguez does not explicitly disclose a battery providing the power; receive a relative state-of-charge of the battery, and compute a current limit value based at least on the relative state-of- charge; a current limiter configured to dynamically limit, to the current limit value, a current flowing from the battery to the processing unit. Marchand discloses a battery (302) providing the power (FIG. 3), Marchand discloses a regulator having a current limiter configured to dynamically limit, to the current limit value, a current flowing from the battery to the first processing unit (¶49 – regulator fixes the output current to the maximum allowable output current Imax). It would be obvious to a person of ordinary skill in the art to provide a current limiter to each of the regulators of Rodriguez in order to allow the processing hardware to operate at peak performance and allow voltage regulation to accommodate peak current levels (Marchand; ¶6). Marchand does not explicitly disclose a controller to receive a relative state-of-charge of the battery; compute a current limit value based at least on the relative state-of-charge. Kimar discloses a controller to receive a relative state-of-charge of the battery (¶28/32 – SOC is monitored by a monitoring system 40) Kimar discloses to compute a current limit value and a current limit value based at least on the relative state-of-charge (¶35 – regulators limit the discharge current of a battery based on the state of charge of the cell string). It would have been obvious to one having ordinary skill in the art at the time the invention was made to use the state of charge to determine the current limit value of the regulators of Rodriguez since it was known in the art that the state of charge monitors the changes in health and operating conditions of the battery (Kimar; ¶35). Regarding claim 10. Rodriguez discloses the droop threshold condition is a first droop threshold condition, the amount is a first amount (as disclosed in claim 8), and the second-stage regulator (26) is configured to lower the second-stage output voltage by a second amount in response to the voltage droop on the first-stage output voltage meeting a second droop threshold condition (when the droop voltage is above the threshold – this being the second threshold condition and not having met the first threshold condition of being below the threshold, the supply voltage is lowered until it falls below the droop threshold (¶73)). Regarding claim 11. Rodriguez discloses that the power channel further includes a second-stage regulator configured to detect the voltage droop on the first-stage output voltage and lower a second second-stage output voltage by the amount in response to the voltage droop on the first-stage output voltage meeting the droop threshold condition (¶24- when the adjusted supply voltage reaches or falls below the droop threshold level FDD 26 generates a charge injection signal 28). Although Rodriguez does not explicitly disclose a second second-stage regulator, because the second-stage regulator and the second second-stage regulator perform the same function, one of ordinary skill in the art would use the FDD 26 as the second second-stage regulator. Regarding claim 12. Rodriguez discloses that the power channel is a first power channel (section A), the processing unit is a first processing unit (16A), and further comprising a second power channel (section B) including: a second first-stage regulator (22B) a second current flowing from the battery (VDD) to a second processing unit (16B) and resulting in a voltage droop on a second first- stage output voltage (¶24 – DLVR 22B produces the droop threshold level), and a second second-stage regulator (FDD 26) configured to detect the voltage droop on the second first-stage output voltage and lower a second second-stage output voltage by an amount in response to the voltage droop on the second first-stage output voltage meeting a droop threshold condition (¶24- when the adjusted supply voltage reaches or falls below the droop threshold level FDD 26 generates a charge injection signal 28), the second second-stage output voltage configured to power the second processing unit (¶25 – processor core includes a supply port for receiving the adjusted power supply voltage and a charge). Rodriguez does not explicitly disclose the current limit value is a first current limit value, the current is a first current, the controller further is configured to compute a second current limit value based at least on the relative state-of-charge received, a second first-stage regulator including a current limiter configured to dynamically limit, to the second current limit value. Marchand discloses that the current limit value is a first current limit value, the current is a first current; a second first-stage regulator including a current limiter configured to dynamically limit, to the second current limit value (¶49 – regulator fixes the output current to the maximum allowable output current Imax). It would be obvious to a person of ordinary skill in the art to provide a current limiter to each of the regulators of Rodriguez in order to allow the processing hardware to operate at peak performance and allow voltage regulation to accommodate peak current levels (Marchand; ¶6). Marchand does not explicitly disclose that the controller further is configured to compute a second current limit value based at least on the relative state-of-charge received. Kimar discloses that the controller further is configured to compute a second current limit value based at least on the relative state-of-charge received (¶35 – regulators limit the discharge current of a battery based on the state of charge of the cell string). It would have been obvious to one having ordinary skill in the art at the time the invention was made to use the state of charge to determine the current limit value of the regulators of Rodriguez since it was known in the art that the state of charge monitors the changes in health and operating conditions of the battery (Kimar; ¶35). Regarding claim 14. Rodriguez discloses a method for controlling an electrical power flowing from on a computing device, the method comprising: limiting a current flowing from the battery to a processing unit using a first-stage regulator (22) and resulting in a voltage droop on a first-stage output voltage (¶24 – DLVR 22 produces the droop threshold level); detecting the voltage droop on the first-stage output voltage using a second-stage regulator (FDD 26) (¶24- when the adjusted supply voltage reaches or falls below the droop threshold level FDD 26 generates a charge injection signal 28); lowering a second-stage output voltage by an amount in response to the voltage droop on the first-stage output voltage meeting a droop threshold condition (¶24- when the adjusted supply voltage reaches or falls below the droop threshold level FDD 26 generates a charge injection signal 28),; and powering the processing unit using the second-stage output voltage (¶25 – processor core includes a supply port for receiving the adjusted power supply voltage and a charge). Rodriguez does not explicitly disclose a battery providing the power; estimating an available peak power envelope of the battery based at least on a relative state-of-charge of the battery; determining a current limit value based at least on the available peak power envelope; limiting, to the current limit value, a current flowing from the battery to a processing unit using a current limiter of a regulator Marchand discloses a battery (302) providing the power (FIG. 3), Marchand discloses a regulator limiting, to the current limit value, a current flowing from the battery to first processing unit of a regulator (¶49 – regulator fixes the output current to the maximum allowable output current Imax). It would be obvious to a person of ordinary skill in the art to provide a current limiter to each of the regulators of Rodriguez in order to allow the processing hardware to operate at peak performance and allow voltage regulation to accommodate peak current levels (Marchand; ¶6). Marchand does not explicitly disclose estimating an available peak power envelope of the battery based at least on a relative state-of-charge of the battery; determining a current limit value based at least on the available peak power envelope; Kimar discloses estimating an available peak power envelope of the battery based at least on a relative state-of-charge of the battery (¶28/32 – SOC is monitored by a monitoring system 40) Kimar discloses to determining a current limit value based at least on the available peak power envelope (¶35 – regulators limit the discharge current of a battery based on the state of charge of the cell string). It would have been obvious to one having ordinary skill in the art at the time the invention was made to use the state of charge to determine the current limit value of the regulators of Rodriguez since it was known in the art that the state of charge monitors the changes in health and operating conditions of the battery (Kimar; ¶35). Regarding claim 15. Rodriguez discloses lowering the second-stage output voltage in response to the voltage droop on the first-stage output voltage meeting the droop threshold condition includes lowering the second-stage output voltage by the amount for a duration of time (¶24 – when the adjusted supply voltage reaches or falls below the droop threshold level for a period of time) and then raising the second-stage output voltage by the amount after the duration of time(¶24 – FDD 26 generates a charge injection signal, thus raising the output voltage. This would occur after the amount of time until the adjusted supply voltage drops below the threshold). Regarding claim 16. Rodriguez discloses: monitoring a battery output voltage (¶24 - supply voltage), adjusting a performance parameter of the processing unit in response to the battery output voltage meeting a battery droop threshold condition (¶24 – FDD generates a charge injection signal when the adjusted supply voltage reaches or falls below the droop threshold level), and resetting the performance parameter of the processing unit in response to a power demand of the computing device meeting a system power condition (¶27 – the adjusted supply voltage adjusts to a voltage above the droop threshold level, thus once it is above the droop threshold level the supply voltage is reset). Regarding claim 17. Rodriguez does not explicitly teach that adjusting the performance parameter includes lowering an operational frequency of the processing unit. Marchand discloses adjusting the performance parameter (voltage level) includes lowering an operational frequency of the processing unit (¶46 – if the voltage level supplied by the regulator then the frequency of a processing element is also lowered). It would be obvious to a person of ordinary skill in the art to provide a current limiter to each of the regulators of Rodriguez in order to allow the processing hardware to operate at peak performance and allow voltage regulation to accommodate peak current levels (Marchand; ¶6). Regarding claim 20. Rodriguez discloses detecting the voltage droop on the second first-stage output voltage using a second second-stage regulator (FDD 26B) (¶24), and lowering a second second-stage output voltage in response to the voltage droop on the second first-stage output voltage meeting the droop threshold condition (¶24). Rodriguez does not explicitly teach determining a second current limit value based at least on the available peak power envelope, limiting, to the second current limit value, a second current flowing from the battery to a second processing unit using a current limiter of a second first-stage regulator and resulting in a voltage droop on a second first-stage output voltage in response to the second current being over the second current limit value. Marchand discloses limiting, to the second current limit value, a second current flowing from the battery to a second processing unit using a current limiter of a second first-stage regulator (¶49 – regulator fixes the output current to the maximum allowable output current Imax) and resulting in a voltage droop on a second first-stage output voltage in response to the second current being over the second current limit value (¶51 – when Imax is decreased Vout is caused to droop). It would be obvious to a person of ordinary skill in the art to provide a current limiter to each of the regulators of Rodriguez in order to allow the processing hardware to operate at peak performance and allow voltage regulation to accommodate peak current levels (Marchand; ¶6). Marchand does not explicitly disclose determining a second current limit value based at least on the available peak power envelope Kimar discloses determining a second current limit value based at least on the available peak power envelope (¶35 – regulators limit the discharge current of the battery based on a state of charge), It would have been obvious to one having ordinary skill in the art at the time the invention was made to use the state of charge to determine the current limit value of the regulators of Rodriguez since it was known in the art that the state of charge monitors the changes in health and operating conditions of the battery (Kimar; ¶35). Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Rodriguez et al. US20160342185A1 in view of Marchand et al. US20150061633A1 and Kumar et al. US20120319653A1 in further view of Molinari US20210370945A1. Regarding claim 6. Lee does not explicitly teach that one or more of the first processing unit or the second processing unit is selected from the group consisting of a processor core, a central processing unit (CPU), a graphics processing unit (GPU), a neural processing unit (NPU), a 5G baseband processor, a wireless fidelity (WIFI) processor, and a memory controller. Marchand teaches that the processing unit (202) (because the processor may be any of the processor from claim 1, the processing unit 202 may be applied to either of the processing units from Rodriguez) is selected from the group consisting of a processor core (¶34 – processing cores within the GPC’s), a central processing unit (CPU) (¶35 – CPU 102), a graphics processing unit (GPU) (¶27 – PPU 202 includes a GPU), a neural processing unit (NPU), a 5G baseband processor, a wireless fidelity (WIFI) processor, and a memory controller (¶33 – memory interface 214) implemented on a system on chip (SoC). It would be obvious to a person of ordinary skill in the art to provide a current limiter to each of the regulators of Rodriguez in order to allow the processing hardware to operate at peak performance and allow voltage regulation to accommodate peak current levels (Marchand; ¶6). Marchand does not explicitly teach that the SoC includes a neural processing unit (NPU), a 5G baseband processor, a wireless fidelity (WIFI) processor, Molinari discloses that the system on a chip (SoC) further includes a neural processing unit (NPU), a 5G baseband processor, a wireless fidelity (WIFI) processor (¶25-26; FIG. 1). It would have been obvious to one having ordinary skill in the art at the time the invention was made to the processor controlling the regulators of Rodriguez since it was known in the art that a system on chip, as taught by Molinari, is known to include the components (Molinari; ¶25). Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Rodriguez et al. US20160342185A1 in view of Marchand et al. US20150061633A1 and Kumar et al. US20120319653A1 and further in view of Ho et al. US20180183417A1. Regarding claim 18. Rodriguez does not explicitly teach counting a number of battery voltage droop events in a time period and determining when the battery droop threshold condition is met based at least on the number of battery voltage droop events counted. Ho discloses counting a number of battery voltage droop events in a time period and determining when the battery droop threshold condition is met based at least on the number of battery voltage droop events counted (¶47-48 – performance monitor tracks the number of clock cycles having voltage droop and increases a count value for each clock cycle which droop mitigation is performed). It would be obvious to one of ordinary skill in the art to monitor the number of droop events in order to properly analyze the performance (Ho; ¶48). Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over Rodriguez et al. US20160342185A1 in view of Marchand et al. US20150061633A1 and Kumar et al. US20120319653A1 in further view of Leonard US20210341539A1. Regarding claim 19. Rodriguez does not explicitly disclose determining an exponentially weighted moving average of threshold comparator output pulses and determining when the battery droop threshold condition is met based at least on the exponentially weighted moving average determined. Leonard discloses determining an exponentially weighted moving average of threshold comparator output pulses (¶23 – battery data may be an exponentially weighted average over a data period) Because using an exponentially weighted average is a common data analysis technique where greater weight is given to recent data points and exponentially less weight to older data points is a technique known in the art, a person of ordinary skill in the art would know to use the analysis method to determine when the battery droop threshold condition is met based at least on the exponentially weighted moving average determined in order to take into account more recent data and react to changes more quickly. Related Prior Art The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Krishnamurthy et al. US20190006939A1 - ¶29 - a second output voltage of a voltage regulator can be compared to a first output voltage of the voltage regulator to determine whether the second output voltage droops as compared to the first output voltage, Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to PAMELA JEPPSON whose telephone number is (571)272-4094. The examiner can normally be reached Monday-Friday 7:30 AM - 5:00 PM.. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Drew Dunn can be reached at 571-272-2312. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /PAMELA J JEPPSON/Examiner, Art Unit 2859 /DREW A DUNN/Supervisory Patent Examiner, Art Unit 2859
Read full office action

Prosecution Timeline

Sep 13, 2022
Application Filed
Oct 01, 2025
Non-Final Rejection mailed — §103
Dec 31, 2025
Response Filed
May 08, 2026
Final Rejection mailed — §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
65%
Grant Probability
86%
With Interview (+20.6%)
3y 4m (~0m remaining)
Median Time to Grant
Moderate
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