Prosecution Insights
Last updated: April 19, 2026
Application No. 17/932,366

POWER MODULES WITH TRANSISTORS SINTERED TO PEDESTALS

Non-Final OA §102
Filed
Sep 15, 2022
Examiner
QUDDUS, NUSRAT
Art Unit
2838
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Marel Power Solutions Inc.
OA Round
3 (Non-Final)
89%
Grant Probability
Favorable
3-4
OA Rounds
2y 9m
To Grant
95%
With Interview

Examiner Intelligence

Grants 89% — above average
89%
Career Allow Rate
719 granted / 808 resolved
+21.0% vs TC avg
Moderate +6% lift
Without
With
+5.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
16 currently pending
Career history
824
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
51.3%
+11.3% vs TC avg
§102
34.8%
-5.2% vs TC avg
§112
11.3%
-28.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 808 resolved cases

Office Action

§102
DETAIL ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . This Office Action is in response to Applicant’s Request for Continued Examination filed on 01/02/2026. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 55-58 are rejected under 35 U.S.C 102(a)(1) as being anticipated by Woody et al. (“Woody”, DE 10 2010 027955). PNG media_image1.png 609 1142 media_image1.png Greyscale PNG media_image2.png 433 900 media_image2.png Greyscale PNG media_image3.png 549 1160 media_image3.png Greyscale Following Excerpt, From Woody et al. (“Woody”, DE 10 2010 027955) Abstract: A stacked busbar assembly includes two or more busbar sub-assemblies, each comprising a plurality of busbars with one or more power semiconductor devices (eg, IGBTs, power diodes, and the like) attached thereto. Each bus bar has an internal integrated cooling system including one or more fluid channels in communication with an inlet and an outlet. The bus bar assemblies are stacked such that their respective inlets and outlets are aligned and thus coolant can flow through them in parallel. Description: Of the Inverter generally includes an IGBT (bipolar transistor with insulated gate electrode) and a large silicon diode. These power components are attached (soldered, for example) on DBC (Direct Bond Copper) substrates, which Copper layers with an insulating ceramic layer in between include. Wire connections or other interconnections are used to provide an electrical connection between a busbar (typically a massive copper bar) and the various components, the busbar being an electrical connection to external systems provides (i.e., using 520) …. Each bus bar points an internal integrated cooling system including one or more fluid channels in conjunction with an inlet and an outlet. The busbar arrangements are stacked in such a way that their corresponding inlets and outlets are aligned and a coolant then flow through it in parallel can. Power devices integrated in this way can be one improved heat dissipation provide, thereby reducing costs, weight, and space requirements resulting performance component can be reduced…. As mentioned above an inverter used in conjunction with a motor, typically one or more IGBTs … coupled with corresponding diodes … These components are typically based on DBC (Direct Bond Copper) substrates mounted (soldered, for example), with the opposite Side of the DBC acts as the interface to a heat sink. The chip and diode side are respectively connected to the bus bar terminals (by wires or similar) ….at least one of the busbars 160, 162 and/or 164 a plurality of continuous channels through which a dielectric cooling fluid may flow, each channel having a first end and a second end, respectively in fluid communication with first and second manifolds 120 and 130. The channels may be integrally formed in each busbar, or may be formed by attaching a sealing plate to a body having a plurality of recesses formed in a surface. For example, … DC busbar 100 sealing plates 310 which are on an upper surface of body 312 are arranged and fixed thereto (for example, using solder), wherein a first plurality of channels 314 is formed. In any case, the channels point 314 an inlet and an outlet, each in fluid communication with the first manifold 120 and second distributor 130…. Stacked busbar arrangement … comprising polymer insulating layers between the plurality of power semiconductor devices. … the plurality of bus bars comprises a copper alloy. … a substrate made of an integrated metal. Claims: Vehicle inverter module, … comprising a Stacked busbar arrangement …a majority bus bar sub-assemblies, each having a plurality of bus bars pairing associated IGBT devices and power diodes includes, as well as an integrated cooling system including one Inlet, an outlet, and one or more fluid channels in conjunction with the inlet and the outlet; wherein the plurality of busbar assemblies is stacked so that their respective inlets and outlets aligned are, leaving a coolant flows in parallel through each of the plurality of bus bars….the integrated cooling system inside each bus bar subassembly comprises one or more micro-fines/microchannels. … further comprising Polymer insulating layers between the plurality of power semiconductor devices. … Circulating a coolant through busbars so that the coolant flows in parallel through the busbars, and heat generated by the power semiconductor devices is transported thereto. … providing a plurality of busbars provide bus bars having a plurality of disposed in the fluid channels includes micro fines. … providing a plurality of busbars provide bus bars having a plurality of disposed in the fluid channels microchannels includes… the coolant water-based with low conductivity. For quick understanding and clarity Examiner has provided above annotated Fig. ‘1-3 & 7-8’ and related excerpt of Woody (DE 10 2010 027955) Regarding independent claim 55, Woody teaches (Fig. 1-10 being different perspective of same invention, wherein see entire description & claims for citation. For quick understanding and clarity Examiner has provided above annotated Fig. ‘1-3 & 7-8’ and related excerpt) an apparatus (Fig. 1-10) comprising: a pipe through which fluid may flow (distributor 120 & 130 carrying coolant fluid passing through cited inlet (122, 604 ot 904) & outlet (i.e., 132, 605 or 904) pipes); a first metal bus bar (i.e., any one of the above cited & annotated +/DC electrodes bus bars and AC electrode bus bar) formed around (note Applicant never claims how the ‘around’ formation being done. Under BRI, from above Fig. it is evident that +/-DC & AC bars are placed around the taught pipe’s inlet/outlet) the pipe (distributor 120 & 130 carrying coolant fluid passing through cited inlet (122, 604 ot 904) & outlet (i.e., 132, 605 or 904) pipes), wherein the first metal bus bar (i.e., any one of the above cited & annotated +/DC electrodes bus bars and AC electrode bus bar) comprises a surface (i.e., see, Fig. 2-3 & 7-8; and above excerpt) configured for electrical and thermal connection to a first transistor (i.e., semiconductor power elements being formed, using IGBTs); wherein the pipe (distributor 120 & 130 carrying coolant fluid passing through cited inlet (122, 604 ot 904) & outlet (i.e., 132, 605 or 904) pipes) electrically insulates the fluid (coolant fluid) from the first metal bus bar (i.e., any one of the above cited & annotated +/DC electrodes bus bars and AC electrode bus bar) when fluid (coolant fluid) flows through the pipe (distributor 120 & 130 carrying coolant fluid passing through cited inlet (122, 604 ot 904) & outlet (i.e., 132, 605 or 904) pipes), and; wherein the pipe (distributor 120 & 130 carrying coolant fluid passing through cited inlet (122, 604 ot 904) & outlet (i.e., 132, 605 or 904) pipes) transfers heat (i.e., of hear sink & power elements) between the first metal bus bar (i.e., any one of the above cited & annotated +/DC electrodes bus bars and AC electrode bus bar) and the fluid (coolant fluid) when the fluid flows through the pipe (distributor 120 & 130 carrying coolant fluid passing through cited inlet (122, 604 ot 904) & outlet (i.e., 132, 605 or 904) pipes). Regarding independent claim 56, Woody teaches a second metal bus bar (i.e., any one of, other than or except for selected 1st metal bus bar, as noted in the above cited & annotated +/DC electrodes bus bars and AC electrode bus bar) formed around (note Applicant never claims how the ‘around’ formation being done. Under BRI, from above Fig. it is evident that +/-DC & AC bars are placed around the taught pipe’s inlet/outlet) the pipe (distributor 120 & 130 carrying coolant fluid passing through cited inlet (122, 604 ot 904) & outlet (i.e., 132, 605 or 904) pipes), wherein the second metal bus bar (i.e., any one of, other than or except for selected 1st metal bus bar, as noted in the above cited & annotated +/DC electrodes bus bars and AC electrode bus bar) comprises a surface (i.e., see, Fig. 2-3 & 7-8; and above excerpt) configured for electrical and thermal connection to a second transistor (i.e., semiconductor power elements being formed, using another IGBTs); wherein the pipe electrically insulates the fluid (coolant fluid) from the second metal bus bar when fluid flows through the pipe (distributor 120 & 130 carrying coolant fluid passing through cited inlet (122, 604 ot 904) & outlet (i.e., 132, 605 or 904) pipes), and; wherein the pipe transfers heat between the second metal bus bar (i.e., any one of, other than or except for selected 1st metal bus bar, as noted in the above cited & annotated +/DC electrodes bus bars and AC electrode bus bar) comprises a surface (i.e., see, Fig. 2-3 & 7-8; and above excerpt) and the fluid (coolant fluid) when the fluid flows through the pipe (distributor 120 & 130 carrying coolant fluid passing through cited inlet (122, 604 ot 904) & outlet (i.e., 132, 605 or 904) pipes), and; wherein the first (i.e., any one of the above cited & annotated +/DC electrodes bus bars and AC electrode bus bar) and second metal bus bars (i.e., any one of, other than or except for selected 1st metal bus bar, as noted in the above cited & annotated +/DC electrodes bus bars and AC electrode bus bar) are electrically isolated from each other (i.e., Fig. 2-3 demonstrating isolated arrangements between +/-DC &AC). Regarding claim 57, Woody teaches wherein the pipe (distributor 120 & 130 carrying coolant fluid passing through cited inlet (122, 604 ot 904) & outlet (i.e., 132, 605 or 904) pipes) comprises a dielectric material (polymer insulating layers) that electrically insulates the fluid (coolant fluid) from the first metal bus bar (i.e., any one of the above cited & annotated +/DC electrodes bus bars and AC electrode bus bar) when fluid flows through the pipe (distributor 120 & 130 carrying coolant fluid passing through cited inlet (122, 604 ot 904) & outlet (i.e., 132, 605 or 904) pipes). Regarding claim 58, Woody teaches wherein the first metal bus bar (i.e., any one of the above cited & annotated +/DC electrodes bus bars and AC electrode bus bar) is formed by attaching (screws, blots, sealing, etc) first (i.e., any one of the above cited & annotated +/DC electrodes bus bars and AC electrode bus bar) and second metal portions (i.e., any one of, other than or except for selected 1st metal bus bar, as noted in the above cited & annotated +/DC electrodes bus bars and AC electrode bus bar) around (note Applicant never claims how the ‘around’ formation being done. Under BRI, from above Fig. it is evident that +/-DC & AC bars are placed around the taught pipe’s inlet/outlet) the pipe (distributor 120 & 130 carrying coolant fluid passing through cited inlet (122, 604 ot 904) & outlet (i.e., 132, 605 or 904) pipes). Allowable Subject Matter Claims 1 and 36-52 are allowed. The following is an examiner’s statement of reasons for allowance: Regarding independent claims 1, 43, 55, Johan (from Applicant’s submitted IDS based NPL, Title: “Implementation and Switching Behavior of a PCB DBC IGBT Module Based on the Power Chip-on-Chip 3D Concept”) teaches (Fig. 3-5, 7; section II-III & V) an apparatus (Fig. 3) comprising: a first device (Fig. 3b; upper side IGBT, diode and gate driver) comprising: a first metal conductor comprising oppositely facing upper and lower surfaces (Fig. 3b; plural conductors between IGBT and diode, wherein 1st metal conductor is one of collector or emitter of IGBT); a second metal conductor comprising oppositely facing upper and lower surfaces (Fig. 3b; plural conductors between IGBT and diode, wherein 2nd metal conductor is another of collector or emitter of IGBT); a first transistor (Fig. 3b; upper IGBT), which comprises first and second terminals (Fig. 3b-c; upper and lower side terminals of IGBT being emitter and collector) between which current is transmitted when the first transistor is activated (when IGBT is on), and a first gate terminal for controlling the first transistor (Fig. 3b; see connection from gate driver to IGBT); an electric terminal extending between first and second ends (i.e. electric conductor/terminal that connects IGBT’s collector, diode’s anode and feedback line to the gate driver); wherein the first end of the electric terminal (i.e. electric conductor/terminal that connects IGBT’s collector, diode’s anode and feedback line to the gate driver) is sintered to the second metal conductor (Fig. 3b; plural conductors between IGBT and diode, wherein 2nd metal conductor is another of collector or emitter of IGBT); wherein the second end of the electric terminal (i.e. electric conductor/terminal that connects IGBT’s collector, diode’s anode and feedback line to the gate driver) is sintered to the second terminal (Fig. 3b-c; upper and lower side terminals of IGBT being emitter and collector), and; wherein the first terminal is sintered to the first surface (Section V C. last para: sintering is foreseen as one solution to manufacture the device. Section III: substrate’s respective surface connection with corresponding terminal(s)). [ NOTE: Johan also teaches a first printed circuit board (PCB) comprising traces (Fig. 3b; 4 layers PCB with traces); and wherein the first gate terminal is electrically connected to a first trace of the traces (Fig. 3b; see trace part from gate driver to the gate of IGBT)]. However, Golland et al. (“Golland”, US Pub 2015/0102383) teaches (Fig. 10; Para 57 & 14) use of a metal pedestal to be contact with respective the electric terminal of the transistor and metal conductor (metal pedestal 56 in contact with emitter and gate pad and respective terminals). However, cited prior art(s) failed to teach “a first transistor sandwiched between the first and second metal conductors, which comprises oppositely facing first and second pads between which current is transmitted when the first transistor is activated; a pedestal formed of a composite material comprising metal, wherein the pedestal is sandwiched between the first transistor and the first metal conductor, wherein the pedestal comprises oppositely face upper and lower flat ends; wherein the upper flat end of the pedestal is sintered to the lower surface of the first metal conductor, wherein the second lower flat end of the pedestal is sintered to a flat surface of the first transistor’s second pad, and; wherein a flat surface of the first transistor’s first pad is sintered to the upper surface of the second metal conductor”, as claimed in claim 1; and “a first transistor sandwiched between the first and second metal conductors, which comprises oppositely facing first and second pads between which current is transmitted when the first transistor is activated; a pedestal comprising multiple layers of different metals, wherein the pedestal is sandwiched between the first transistor and the first metal conductor, wherein the pedestal comprises oppositely facing upper and lower flat ends; wherein the upper flat end of the pedestal is sintered to the lower surface of the first metal conductor, wherein the lower flat end of the pedestal is sintered to a flat surface of the first transistor’s second pad, and, wherein a flat surface of the first transistor’s first pad is sintered to the upper surface of the second metal conductor”, as claimed in claim 43. Claims ‘36-42’, ‘44-52’ and ’55-58’ are depending from claims 1 and 55, respectively. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to NUSRAT QUDDUS whose telephone number is (571)270-7921. The examiner can normally be reached on M-Th 9-4PM ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, CRYSTAL L. HAMMOND can be reached at (571) 270-1682. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /NUSRAT QUDDUS/Examiner, Art Unit 2838
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Prosecution Timeline

Sep 15, 2022
Application Filed
Aug 29, 2023
Response after Non-Final Action
Dec 13, 2024
Non-Final Rejection — §102
Apr 18, 2025
Response Filed
Apr 30, 2025
Final Rejection — §102
Sep 08, 2025
Request for Continued Examination
Sep 09, 2025
Response after Non-Final Action
Jan 02, 2026
Request for Continued Examination
Jan 21, 2026
Response after Non-Final Action
Jan 23, 2026
Non-Final Rejection — §102 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
89%
Grant Probability
95%
With Interview (+5.9%)
2y 9m
Median Time to Grant
High
PTA Risk
Based on 808 resolved cases by this examiner. Grant probability derived from career allow rate.

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