DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-4, 6-11, 13, 14 and 16-19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Takezawa [U.S. Publication No. 2014/0253277 A1] in view of Sakai et al. [U.S. Publication No. 2016/0316566 A1].
Regarding claim 1, Takezawa discloses a coil component (e.g., 10, Fig. 1-2, Paragraph 0021) comprising:
a multilayer body (e.g., 12) including a plurality of insulating layers (e.g., 16a to 16n, Paragraph 0022, Fig. 2) and a plurality of coil conductor layers (e.g., 18a-18d, 19a to 19d, on their respective insulating layers, Paragraph 0024) which are stacked in a stacking direction (e.g., y-direction, Fig. 2), and a first via conductor (e.g., v1, v2, v3, v8, v9, v10, Fig. 2) and a second via conductor (e.g., v4, v7, Fig. 2) that electrically connect the coil conductor layers.
Takezawa discloses the instant claimed invention discussed above except for wherein the first via conductor is smaller than the second via conductor,
in cross-sectional view. the first via conductor and the second via conductor have a taper shape which widens in the stacking direction, and the smallest width of the taper shape of the first via conductor is smaller than the smallest width of the taper shape of the second via conductor.
Sakai discloses first via conductor (e.g., 21D, Paragraph 0037, Fig. 1) is smaller than second via conductor (e.g., 12D, Paragraph 0035, Fig. 1),
in cross-sectional view, the first via conductor 21D and the second via conductor 12D have a taper shape which widens in the stacking direction, and the smallest width of the taper shape of the first via conductor 21D is smaller than the smallest width of the taper shape of the second via conductor 12D (see Fig. 1).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have the second via conductor larger than the first via conductor as taught by Sakai to the component of Takezawa to be able to handle the increased current value from the parallel connected coil turns to therefore avoid rise in temperature during operation and improve inductance value as well.
Regarding claim 2, Takezawa discloses the first via conductor (e.g., v1, v2, v3, v8, v9, v10, Fig. 2) is a via conductor which electrically connects in parallel coil conductor layers (e.g., v1-v3 connects coil conductor layers 18a to 18d in parallel and v8-v10 connects coil conductor layers 19a-19d in parallel) that are adjacent to each other in the stacking direction (see Paragraph 0035-0036), and
the second via conductor (e.g., v4, v7, Fig. 2) is a via conductor which electrically connects in series coil conductor layers (e.g., connects the parallel coil conductor layers 18a to 18d in series with parallel coil conductor layers 19a to 19d, Fig. 2) that are adjacent to each other in the stacking direction.
Regarding claim 3, Takezawa discloses wherein
the coil conductor layers (e.g., 18a, 18b and 19a, 19b) connected by the first via conductor have the same shape (Paragraph 0024, 0029, Fig. 2), and
the coil conductor layers (e.g., 18d and 19a) connected by the second via conductor (e.g., v4, v7) have different shapes (see Fig. 2).
Regarding claim 4, Takezawa discloses wherein
the first via conductor (e.g., v1, v2, v3) and the second via conductor (e.g., portion v4 of the second via conductor) are arranged in the same straight line.
Regarding claim 6, Takezawa in view of Sakai discloses the instant claimed invention discussed above except for wherein in cross-sectional view, the smallest width of the first via conductor is from 0.5 times to less than 0.75 times the smallest width of the second via conductor.
However, Sakai discloses first via conductor 21D is smaller in via diameter than second via conductor 12D (see Paragraph 0037, Fig. 1).
It would have been obvious to one having ordinary skill in the art at the time the invention was made to have the smallest width of the first via conductor is from 0.5 times to less than 0.75 times the smallest width of the second via conductor, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. Please note that in the instant application, Paragraph 0076, Specification, applicant has not disclosed any criticality for the claimed limitations.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have the smallest width of the first via conductor is from 0.5 times to less than 0.75 times the smallest width of the second via conductor as discussed above for the component to be able to handle the appropriate conductor size for the desired current distribution of the parallel connected coil turns and maintain the right number of turns to therefore avoid rise in temperature during operation while maintaining and improving inductance value.
Regarding claim 7, Takezawa discloses wherein
adjacent coil conductor layers which are located on the outermost side of the multilayer body (e.g., outer portions of 18a-18d) each has an extended portion (e.g., portions 25a-25d) electrically connected to an outer electrode (e.g., 14a, see Fig. 1-2).
Regarding claim 8, Takezawa discloses wherein
the coil conductor layers having the extended portions (e.g., extended portions 25a-25d) are electrically connected to each other by the first via conductor (e.g., v1, v2, v3).
Regarding claim 9, Takezawa discloses wherein
at least two extended electrode layers (e.g., extended portions 25a, 25b) which are electrically connected to an outer electrode 14a are adjacent to each other on the outer side of the coil conductor layers (see Fig. 2).
Regarding claim 10, Takezawa discloses wherein
the extended electrode layers (e.g., extended portions 25a, 25b) are electrically connected to each other by the first via conductor (e.g., v1, v2, v3).
Regarding claim 11, Takezawa discloses wherein
the extended electrode layer (e.g., extended portions 25a, 25b) and the coil conductor layer (e.g., 18a, 18b) are electrically connected by the second via conductor (e.g., v4, v7, see Fig. 2).
Regarding claim 13, Takezawa discloses wherein
the coil conductor layers (e.g., 18a, 18b and 19a, 19b) connected by the first via conductor have the same shape (Paragraph 0024, 0029, Fig. 2), and
the coil conductor layers (e.g., 18d and 19a) connected by the second via conductor (e.g., v4, v7) have different shapes (see Fig. 2).
Regarding claim 14, Takezawa discloses wherein
the first via conductor (e.g., v1, v2, v3) and the second via conductor (e.g., portion v4 of the second via conductor) are arranged in the same straight line.
Regarding claim 16, Takezawa in view of Sakai discloses the instant claimed invention discussed above except for wherein in cross-sectional view, the smallest width of the first via conductor is from 0.5 times to less than 0.75 times the smallest width of the second via conductor.
However, Sakai discloses first via conductor 21D is smaller in via diameter than second via conductor 12D (see Paragraph 0037, Fig. 1).
It would have been obvious to one having ordinary skill in the art at the time the invention was made to have the smallest width of the first via conductor is from 0.5 times to less than 0.75 times the smallest width of the second via conductor, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. Please note that in the instant application, Paragraph 0076, Specification, applicant has not disclosed any criticality for the claimed limitations.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have the smallest width of the first via conductor is from 0.5 times to less than 0.75 times the smallest width of the second via conductor as discussed above for the component to be able to handle the appropriate conductor size for the desired current distribution of the parallel connected coil turns and maintain the right number of turns to therefore avoid rise in temperature during operation while maintaining and improving inductance value.
Regarding claim 17, Takezawa discloses wherein
adjacent coil conductor layers which are located on the outermost side of the multilayer body (e.g., outer portions of 18a-18d) each has an extended portion (e.g., portions 25a-25d) electrically connected to an outer electrode (e.g., 14a, see Fig. 1-2).
Regarding claim 18, Takezawa discloses wherein
at least two extended electrode layers (e.g., extended portions 25a, 25b) which are electrically connected to an outer electrode 14a are adjacent to each other on the outer side of the coil conductor layers (see Fig. 2).
Regarding claim 19, Takezawa discloses wherein
the extended electrode layer (e.g., extended portions 25a, 25b) and the coil conductor layer (e.g., 18a, 18b) are electrically connected by the second via conductor (e.g., v4, v7, see Fig. 2).
Claim(s) 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Takezawa [U.S. Publication No. 2014/0253277 A1] in view of Sakai et al. [U.S. Publication No. 2016/0316566 A1] as applied to claim 1 above, and further in view of Takai [JP 2021108326A] (provided in IDS).
Regarding claim 12, Takezawa in view of Sakai discloses the instant claimed invention discussed above except for wherein a gap portion is between the coil conductor layer and the insulating layer.
Takai discloses a gap portion (e.g., 21, Paragraph 0008, Fig. 3) is between coil conductor layer (e.g., 15) and insulating layer (e.g., 11).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have a gap portion between the coil conductor layer and the insulating layer as taught by Takai to the coil and insulator layers of Takezawa in view of Sakai to provide the component with stress relaxation portions to avoid cracking of the component body.
Claim(s) 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Takezawa [U.S. Publication No. 2014/0253277 A1] in view of Sakai et al. [U.S. Publication No. 2016/0316566 A1] as applied to claim 2 above, and further in view of Takai [JP 2021108326A] (provided in IDS).
Regarding claim 20, Takezawa in view of Sakai discloses the instant claimed invention discussed above except for wherein a gap portion is between the coil conductor layer and the insulating layer.
Takai discloses a gap portion (e.g., 21, Paragraph 0008, Fig. 3) is between coil conductor layer (e.g., 15) and insulating layer (e.g., 11).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have a gap portion between the coil conductor layer and the insulating layer as taught by Takai to the coil and insulator layers of Takezawa in view of Sakai to provide the component with stress relaxation portions to avoid cracking of the component body.
Regarding claim 21, Takezawa discloses wherein the first via conductor is coaxial with the second via conductor (first via conductor, e.g., v1, v2, v3, and the second via conductor, e.g., portion v4, are arranged in the same straight line, see Fig. 2).
Regarding claim 22, Takezawa discloses coil component (e.g., 10, Fig. 1-2, Paragraph 0021) comprising:
a multilayer body (e.g., 12) including a plurality of insulating layers (e.g., 16a to 16n, Paragraph 0022, Fig. 2) and a plurality of coil conductor layers (e.g., 18a-18d, 19a to 19d, on their respective insulating layers, Paragraph 0024) which are stacked in a stacking direction (e.g., y-direction, Fig. 2), and a first via conductor (e.g., v1, v2, v3, v8, v9, v10, Fig. 2) and a second via conductor (e.g., v4, v7, Fig. 2) that electrically connect the coil conductor layers,
the first via conductor is coaxial with the second via conductor (first via conductor, e.g., v1, v2, v3, and the second via conductor, e.g., portion v4, are arranged in the same straight line, see Fig. 2).
Takezawa discloses the instant claimed invention discussed above except for wherein the first via conductor is smaller than the second via conductor.
Sakai discloses first via conductor (e.g., 21D, Paragraph 0037, Fig. 1) is smaller than second via conductor (e.g., 12D, Paragraph 0035, Fig. 1).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have the first via conductor smaller than the second via conductor as taught by Sakai to the component of Takezawa to be able to provide the appropriate conductor size in handling increased current and parallel connected coil turns to therefore minimize production cost.
Response to Arguments
Applicant's amendment and arguments with respect to claims 1-4, 6-14 and 16-22 have been considered but are moot in view of the new ground(s) of rejection.
Claim 1 has been amended to recite, “…the first via conductor is smaller than the second via conductor,
in cross-sectional view. the first via conductor and the second via conductor have a taper shape which widens in the stacking direction, and the smallest width of the taper shape of the first via conductor is smaller than the smallest width of the taper shape of the second via conductor…”.
Sakai discloses first via conductor (e.g., 21D, Paragraph 0037, Fig. 1) is smaller than second via conductor (e.g., 12D, Paragraph 0035, Fig. 1). In cross-sectional view, the first via conductor 21D and the second via conductor 12D have a taper shape which widens in the stacking direction, and the smallest width of the taper shape of the first via conductor 21D is smaller than the smallest width of the taper shape of the second via conductor 12D (see Fig. 1). It would have been obvious to one having ordinary skill in the art to have the second via conductor larger than the first via conductor as taught by Sakai to the component of Takezawa to be able to handle the increased current value from the parallel connected coil turns to therefore avoid rise in temperature during operation and improve inductance value as well.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOSELITO SASIS BAISA whose telephone number is (571)272-7132. The examiner can normally be reached M-F, 8AM to 4PM.
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/J.S.B/ Examiner, Art Unit 2837
/SHAWKI S ISMAIL/ Supervisory Patent Examiner, Art Unit 2837
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