Prosecution Insights
Last updated: April 19, 2026
Application No. 17/933,683

SELECTIVE TUNGSTEN CONTACT PLUGS ABOVE GATE AND SOURCE/DRAIN CONTACTS

Non-Final OA §102§103§112
Filed
Sep 20, 2022
Examiner
NGUYEN, SOPHIA T
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Qualcomm Incorporated
OA Round
3 (Non-Final)
45%
Grant Probability
Moderate
3-4
OA Rounds
2y 8m
To Grant
58%
With Interview

Examiner Intelligence

Grants 45% of resolved cases
45%
Career Allow Rate
230 granted / 509 resolved
-22.8% vs TC avg
Moderate +13% lift
Without
With
+13.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
86 currently pending
Career history
595
Total Applications
across all art units

Statute-Specific Performance

§103
51.4%
+11.4% vs TC avg
§102
17.0%
-23.0% vs TC avg
§112
26.7%
-13.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 509 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendment Applicant’s amendment dated 07/31/2025, in which claims 1, 6, 10, 13, 16, 18 were amended, has been entered. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 6, 10-12, 16-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Regarding claim 6, claim 6 recites the limitation " a first portion disposed on and in direct contact with at least the portion of the S/D barrier layer that is in direct contact with the gate spacer". There is insufficient antecedent basis for the limitation “the gate spacer” in the claim. For the purpose of this Action, the above limitation of claim 6 will be interpreted and examined as -- a first portion disposed on and in direct contact with at least the portion of the S/D barrier layer that is in direct contact with the gate spacers.-- Regarding claim 10, claim 10 recites the limitation "a first portion disposed on and in direct contact with at least the portion of the S/D barrier layer that is in direct contact with the gate spacer". There is insufficient antecedent basis for the limitation “the gate spacer” in the claim. For the purpose of this Action, the above limitation of claim 10 will be interpreted and examined as -- a first portion disposed on and in direct contact with at least the portion of the S/D barrier layer that is in direct contact with the one of the gate spacers.-- Regarding claim 16, claim 16 recites the limitation "a first portion disposed on the S/D barrier layer and in direct contact with at least the portion of the S/D barrier layer that is in direct contact with the gate spacer". There is insufficient antecedent basis for the limitation “the gate spacer” in the claim. For the purpose of this Action, the above limitation of claim 16 will be interpreted and examined as -- a first portion disposed on the S/D barrier layer and in direct contact with at least the portion of the S/D barrier layer that is in direct contact with the one of the gate spacers --. In addition, claim 16 recites “a second portion comprising tungsten” and “the second portion of the S/D contact comprises selective tungsten.” A single claim that includes both a broad and a narrower limitation for the same claimed feature render the claim indefinite when the boundaries of the claim are not discernible. It is unclear whether the second portion comprising tungsten or comprises selective tungsten. It is unclear the structural/material difference between “tungsten” and “selective tungsten”. For the purpose of this Action, the limitation “selective tungsten” will be interpreted and examined as --tungsten material is selectively formed within a contact hole--. Regarding claim 18, claim 18 recites “wherein depositing forming the first portion of the S/D contact comprises depositing a first portion of the S/D contact using a chemical vapor deposition (CVD) process.” It is unclear if “a first portion” is the same or different from “the first portion”. For the purpose of this Action, the limitation “a first portion” will be interpreted and examined as – the first portion --. Claims depending from the rejected claims noted above are rejected at least on the same basis as the claim(s) from which the dependent claims depend. Appropriate correction is required. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 10-12, 16-17 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Wang et al. (US Pub. 20230268223), hereafter Wang223. Regarding claim 10, Wang223 discloses in Fig. 14 a semiconductor structure, comprising: a transistor, comprising: a source region [one of 111]; a drain region [another 111]; a channel region, the channel region being disposed between the source region [one of 111] and the drain region [another 111]; a gate structure [401 and 403] disposed above the channel region, comprising a metal gate disposed between gate spacers [203][paragraph [0045]-[0048]]; and a source or drain (S/D) contact structure [603 and 707], the S/D contact structure [603 and 707] comprising: an S/D barrier layer [barrier layer of contact plug 603] disposed above at least a portion of the source region or the drain region [111][paragraph [0053], “the source/drain plugs 603 each include a barrier layer and a conductive material over the barrier layer”], wherein at least a portion of the S/D barrier layer is in direct contact with one of the gate spacers [contact plug 603 is in direct contact with one of the gate spacers 203. Thus, barrier layer of plug 603 must be in direct contact with one of the gate spacers 203]; and an S/D contact [707 and a conductive material of 603], comprising a first portion [a conductive material of 603] disposed on and in direct contact with at least the portion of the S/D barrier layer [barrier layer of plug 603] that is in direct contact with the one of the gate spacers [paragraph [0053]], and a second portion [707] comprising tungsten [paragraph [0059]], disposed above the first portion [a conductive material of 603] and in direct contact with the first portion [a conductive material of 603][Fig. 14 shows contact 707 is disposed on and in direct contact with the contact 603. Thus, contact 707 must be disposed on and in direct contact with the conductive material of contact 603]. Regarding claims 11 and 12, Wang223 discloses in paragraph [0053] wherein the S/D barrier layer [barrier layer of plug 603] comprises titanium (Ti) or titanium nitride (TiN); wherein the first portion [a conductive material of 603] of the S/D contact comprises tungsten or cobalt. Regarding claim 16, Wang223 discloses in Fig. 4-Fig. 11 a method of fabricating a source or drain (S/D) contact structure for a transistor comprising a source region [one of 111], a drain region [another 111], a channel region disposed between the source region [one of 111] and the drain region [another 111], and a gate structure [401 and 403] disposed above the channel region and between gate spacers [203], wherein the gate structure comprises a metal gate a dielectric layer [403] at least partially surrounds the metal gate [401][paragraph [0045]-[0048]], the method comprising: depositing a S/D barrier layer [barrier layer of contact plug 603] above at least a portion of the source region or the drain region [111], wherein at least a portion of the S/D barrier layer is in direct contact with one of the gate spacers [203][paragraph [0053], “the source/drain plugs 603 each include a barrier layer and a conductive material over the barrier layer”][contact plug 603 is in direct contact with one of the gate spacers 203. Thus, barrier layer of plug 603 must be in direct contact with one of the gate spacers 203]; and depositing an S/D contact [707 and a conductive material of 603] comprising forming a first portion [a conductive material of 603] disposed on the S/D barrier layer [barrier layer of plug 603] and in direct contact with at least the portion of the S/D barrier layer [barrier layer of plug 603] that is in direct contact with the one of the gate spacers [203], and forming a second portion [707] comprising tungsten, disposed above the first portion [a conductive material of 603], and in direct contact with the first portion [a conductive material of 603][Fig. 14 shows contact 707 is disposed on and in direct contact with the contact 603. Thus, contact 707 must be disposed on and in direct contact with the conductive material of contact 603], wherein the second portion of the S/D contact [707] comprises selective tungsten [paragraph [0059] discloses “a first conductive fill material is deposited to fill the first openings for source/drain contacts 707 to form the source/drain contacts 707… the first conductive fill material comprises a metal such as tungsten…the first conductive fill material may be deposited using a deposition process such as a chemical vapor deposition (CVD)”; paragraph [0073] discloses “the conductive fill material may be deposited using a deposition process such as a chemical vapor deposition (CVD) to perform a bottom-up selective loss free deposition”. Further, Fig. 7 shows tungsten contact 707 is selectively formed at a specific location. Thus, the S/D contact [707] comprises selective tungsten]. Regarding claim 17, Wang223 discloses in paragraph [0053] wherein depositing the S/D barrier layer [barrier layer of plug 603] comprises depositing titanium (Ti) or titanium nitride (TiN). Claims 10 and 12 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Xie et al. (US Pub. 20190131430). Regarding claim 10, Xie et al. discloses in Fig. 14, Fig. 14A a semiconductor structure, comprising: a transistor, comprising: a source region [one of 18]; a drain region [another 18]; a channel region, the channel region being disposed between the source region [one of 18] and the drain region [another 18]; a gate structure [34] disposed above the channel region, comprising a metal gate disposed between gate spacers [16][paragraph [0027], [0029]]; and a source or drain (S/D) contact structure [20, 42, 60], the S/D contact structure [20, 42, 60] comprising: an S/D barrier layer [20] disposed above at least a portion of the source region or the drain region [18], wherein at least a portion of the S/D barrier layer [20]is in direct contact with one of the gate spacers [16]; and an S/D contact [42 and 60], comprising a first portion [42] disposed on and in direct contact with at least the portion of the S/D barrier layer [20] that is in direct contact with the one of the gate spacers [16], and a second portion [60] comprising tungsten [paragraph [0040]], disposed above the first portion [42] and in direct contact with the first portion [42]. Notes, “S/D barrier layer” directs to intended function of a layer. A claim containing a "recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus" if the prior art apparatus teaches all the structural limitations of the claim. Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987). MPEP 2114 (II). Further, the elements must be arranged as required by the claim, but this is not an ipsissimis verbis test, i.e., identity of terminology is not required. In re Bond, 910 F.2d 831, 15 USPQ2d 1566 (Fed. Cir. 1990). MPEP 2131. Regarding claim 12, Xie et al. discloses in paragraph [32] wherein the first portion [42] of the S/D contact comprises tungsten or cobalt. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-9, 16-18 are rejected under 35 U.S.C. 103 as being unpatentable over Wang et al. (US Pub. 20230268223), hereafter Wang223 and Xie et al. (US Pub. 20190131430) Regarding claim 1, Wang223 discloses in Fig. 14 a transistor, comprising: a gate structure, comprising: a metal gate [401][paragraph [0046]-[0047]]; a dielectric layer [403] at least partially surrounding the metal gate [401][paragraph [0045]]; a metal cap [501] disposed over a portion of the metal gate [401] that is not surrounded by the dielectric layer [403][paragraph [0049]]; and a gate contact [1101] comprising tungsten, disposed over, and in direct contact with, the metal cap [501][paragraph [0073]]; and a second dielectric layer [701 and/or 703 and/or 705] disposed over the gate structure [paragraph [0054]-0056]], wherein: the metal gate [401], the dielectric layer [403], the metal cap [501], and a first portion of the gate contact [1101] are disposed between gate spacers [205]; a second portion of the gate contact [1101] extends above the first portion of the gate contact [1101] and through the second dielectric layer [[701 and/or 703 and/or 705]; and the gate contact [1101] is in direct contact with the second dielectric layer [701 and/or 703 and/or 705]. Wang223 fails to disclose the gate contact is in direct contact with the gate spacers. Xie et al. discloses in Fig. 14A, paragraph [0039]-[0040] the gate contact [62] is in direct contact with the gate spacers [16]. It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to incorporate the teachings of Xie et al. into the method of Wang223 to include the gate contact is in direct contact with the gate spacers. The ordinary artisan would have been motivated to modify Wang223 in the above manner for the purpose of providing suitable configuration of a gate contact, increasing contact area and reducing contact resistance between the gate contact and the gate structure. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007). Alternatively, Regarding claim 1, Xie et al. discloses in Fig. 14, Fig. 14A a transistor, comprising: a gate structure [34], comprising: a metal gate [gate electrode] [paragraph [0029]]; a dielectric layer [gate dielectric] [paragraph [0029]]; and a gate contact [62] comprising tungsten [paragraph [0040]]; and a second dielectric layer [46 and/or 48] disposed over the gate structure [34][paragraph [0035]], wherein: the metal gate [gate electrode], the dielectric layer [gate dielectric], and a first portion of the gate contact [62] are disposed between gate spacers [16]; a second portion of the gate contact [62] extends above the first portion of the gate contact [62] and through the second dielectric layer [46 and/or 48]; and the gate contact [62] is in direct contact with the gate spacers [16] and the second dielectric layer [46 and/or 48]. Xie et al. fails to disclose the gate structure comprising: the dielectric layer at least partially surrounding the metal gate; a metal cap disposed over a portion of the metal gate that is not surrounded by the dielectric layer; the gate contact disposed over, and in direct contact with, the metal cap; the metal cap is disposed between gate spacers. Wang223 discloses in Fig. 14 the gate structure, comprising: the dielectric layer [403] at least partially surrounding the metal gate [401][paragraph [0045]]; a metal cap [501] disposed over a portion of the metal gate [401] that is not surrounded by the dielectric layer [403][paragraph [0049]]; and the gate contact [1101] comprising tungsten, disposed over, and in direct contact with, the metal cap [501][paragraph [0073]]; and the metal cap [501] is disposed between gate spacers [205]. It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to incorporate the teachings of Wang223 into the method of Xie et al. to include the gate structure comprising: the dielectric layer at least partially surrounding the metal gate; a metal cap disposed over a portion of the metal gate that is not surrounded by the dielectric layer; the gate contact disposed over, and in direct contact with, the metal cap; the metal cap is disposed between gate spacers. The ordinary artisan would have been motivated to modify Xie et al. in the above manner for the purpose of providing suitable configuration of a gate structure having a gate contact layer so that the formation of the gate contacts may be formed by the bottom-up deposition process and preventing seams from forming within the second conductive fill material during the formation of the gate electrode contacts [paragraph [0080] of Wang223]. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007). Regarding claims 2-3, Wang223 discloses in paragraph [0045] wherein the dielectric layer [403] comprises a material with a dielectric constant greater than 3.9 [high-k gate dielectric]; wherein the dielectric layer [403] comprises hafnium oxide (HfO2). Regarding claim 4, Wang223 discloses in paragraph [0046]-[0047] wherein the metal gate [401] comprises titanium nitride (TiN) or titanium aluminum carbon (TiAlC). Regarding claim 5, Wang223 discloses in paragraph [0049] wherein the metal cap [501] comprises tungsten or cobalt. Regarding claim 6, Wang223 discloses in Fig. 14 wherein the transistor further comprises: a source region [111]; a drain region [another 111]; and a source or drain (S/D) contact structure [603 and 707], the S/D contact structure [603 and 707] comprising: an S/D barrier layer [barrier layer of plug 603] disposed above at least a portion of the source region or the drain region [111], wherein at least a portion of the S/D barrier layer [barrier layer of plug 603] is in direct contact with one of the gate spacers [203][paragraph [0053], “the source/drain plugs 603 each include a barrier layer and a conductive material over the barrier layer”]; and an S/D contact [707 and a conductive material of 603], comprising a first portion [a conductive material of 603] disposed on and in direct contact with at least the S/D barrier layer [barrier layer of plug 603] that is in direct contact with one of the gate spacers [203][paragraph [0053]], and a second portion [707] comprising tungsten [paragraph [0059]], disposed above the first portion [a conductive material of 603], and in direct contact with the first portion [a conductive material of 603][Fig. 14 shows contact 707 is disposed above the contact 603 and in direct contact with the contact 603. Thus, contact 707 must be disposed above the conductive material of contact 603 and in direct contact with the conductive material of contact 603]. Xie et al. also discloses in Fig. 14 wherein the transistor further comprises: a source region [18]; a drain region [another 18]; and a source or drain (S/D) contact structure [20, 42 and 60], the S/D contact structure [20, 42 and 60] comprising: an S/D barrier layer [20] disposed above at least a portion of the source region or the drain region [18], wherein at least a portion of the S/D barrier layer [20] is in direct contact with one of the gate spacers [16]; and an S/D contact [42 and 60], comprising a first portion [42] disposed on and in direct contact with at least the portion of the S/D barrier layer [20] that is in direct contact with the gate spacers [16], and a second portion [60] comprising tungsten, disposed above the first portion [42], and in direct contact with the first portion [42]. Regarding claim 7, Wang223 discloses in paragraph [0053] wherein the S/D barrier layer [barrier layer of plug 603] comprises titanium (Ti) or titanium nitride (TiN); wherein depositing the S/D barrier layer [barrier layer of plug 603] comprises depositing titanium (Ti) or titanium nitride (TiN). Regarding claim 8, Wang223 discloses in paragraph [0053] wherein the first portion [a conductive material of 603] of the S/D contact comprises tungsten or cobalt. Regarding claim 9, Wang223 discloses in paragraph [0001] wherein the transistor is part of an apparatus selected from the group consisting of a music player, a video player, an entertainment unit, a navigation device, a communications device, a mobile device, a mobile phone, a smartphone, a personal digital assistant, a fixed location terminal, a tablet computer, a computer, a wearable device, an Internet of things (IoT) device, a laptop computer, a server, an access point, a base station, and a device in an automotive vehicle. Regarding claims 16-17, Xie et al. discloses in Fig. 7, Fig. 14, Fig. 14A a method of fabricating a source or drain (S/D) contact structure for a transistor comprising a source region [one of 18], a drain region [another 18], a channel region disposed between the source region [one of 18] and the drain region [another 18], and a gate structure [34] disposed above the channel region and between gate spacers [16], wherein the gate structure [34] comprises a metal gate [gate electrode] and a dielectric layer [gate dielectric] [paragraph [0029]], the method comprising: depositing a S/D barrier layer [20] above at least a portion of the source region or the drain region [18], wherein at least a portion of the S/D barrier layer [20] is in direct contact with one of the gate spacers [16][Fig. 7, paragraph [0031]]; and depositing an S/D contact [42 and 62] comprising forming a first portion [42] disposed on the S/D barrier layer [20] and in direct contact with at least the portion of the S/D barrier layer [20] that is in direct contact with the one of the gate spacers [16][Fig. 14], and forming a second portion [60] comprising tungsten, disposed above the first portion [42], and in direct contact with the first portion [42][Fig. 14, paragraph [0040]], wherein the second portion [60] of the S/D contact [707] comprises selective tungsten [Fig. 14 shows tungsten is selectively formed within the S/D contact hole]. Xie et al. fails to disclose the gate structure comprising: the dielectric layer at least partially surrounding the metal gate; wherein depositing the S/D barrier layer comprises depositing titanium (Ti) or titanium nitride (TiN). Wang223 discloses in Fig. 14 the gate structure, comprising: the dielectric layer [403] at least partially surrounding the metal gate [401][paragraph [0045]]; wherein depositing the S/D barrier layer [barrier layer of plug 603] comprises depositing titanium (Ti) or titanium nitride (TiN) [paragraph [0053]] Wang223 further discloses in Fig. 8, paragraph [0059]-[0060], [0073] the second portion [707] of the S/D contact comprises selective tungsten [“a first conductive fill material is deposited to fill the first openings for source/drain contacts 707 to form the source/drain contacts 707. In an embodiment, the first conductive fill material comprises a metal such as tungsten... the first conductive fill material may be deposited using a deposition process such as a chemical vapor deposition (CVD)… the conductive fill material may be deposited using a deposition process such as a chemical vapor deposition (CVD) to perform a bottom-up selective loss free deposition”]. It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to incorporate the teachings of Wang223 into the method of Xie et al. to include the gate structure comprising: the dielectric layer at least partially surrounding the metal gate; wherein depositing the S/D barrier layer comprises depositing titanium (Ti) or titanium nitride (TiN). The ordinary artisan would have been motivated to modify Xie et al. in the above manner for the purpose of providing suitable configuration of a gate dielectric layer of a gate structure; providing suitable material of a barrier layer of a S/D contact structure; providing suitable configuration of a gate structure having a gate contact layer so that the formation of the gate contacts may be formed by the bottom-up deposition process and preventing seams from forming within the second conductive fill material during the formation of the gate electrode contacts [paragraph [0053], [0080] of Wang223]. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007). Regarding claim 18, Xie et al. discloses in Fig. 8, Fig. 14, paragraph [0040] wherein forming the first portion [42] of the S/D contact comprises depositing the first portion [42] of the S/D contact and wherein forming the second portion [60] of the S/D contact above the first portion [42] of the S/D contact comprises depositing the second portion [60] of the S/D contact by selective deposition of tungsten [“The contacts 60, 62 may be composed of a conductive material, such as tungsten (W) or cobalt (Co), deposited by chemical vapor deposition (CVD), physical vapor deposition (PVD), electrochemical plating (ECP)”]. Wang223 discloses in Fig. 7, paragraph [0059], [0073] wherein forming first portion [a conductive material of 603] of the S/D contact [707 and a conductive material of 603] comprises depositing the first portion [a conductive material of 603] of the S/D contact and wherein forming the second portion [707] of the S/D contact above the first portion [a conductive material of 603] of the S/D contact comprises depositing the second portion [707] of the S/D contact by selective deposition tungsten [“a first conductive fill material is deposited to fill the first openings for source/drain contacts 707 to form the source/drain contacts 707. In an embodiment, the first conductive fill material comprises a metal such as tungsten, cobalt (Co), alloys thereof, and the like. Furthermore, the first conductive fill material may be deposited using a deposition process such as a chemical vapor deposition (CVD)… the conductive fill material may be deposited using a deposition process such as a chemical vapor deposition (CVD) to perform a bottom-up selective loss free deposition”]. Wang223 and Xie et al. fails to explicitly disclose depositing the first portion of the S/D contact using a chemical vapor deposition (CVD) process. However, Wang223 discloses in paragraph [0053], a first portion [a conductive material of 603] comprises conductive material such as cobalt (Co), ruthenium (Ru), titanium (Ti), tungsten (W), copper (Cu), a copper alloy, silver (Ag), gold (Au), aluminum (Al), nickel (Ni), or the like. Wang223 discloses in paragraph [0059], [0073] conductive fill material may be deposited using a deposition process such as a chemical vapor deposition (CVD). It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to modify the method of Wang223 and Xie et al. to include depositing the first portion of the S/D contact using a chemical vapor deposition (CVD) process. The ordinary artisan would have been motivated to modify Wang223 in the above manner for the purpose of providing suitable loss free deposition for forming the first portion of the S/D contact to prevent seams from forming in the first portion of the S/D contact [paragraph [0073] of Wang223]. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007). Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Xie et al. (US Pub. 20190131430) as applied to claim 10 above and in view of Wang et al. (US Pub. 20230268223), hereafter Wang223. Regarding claim 11, Xie et al. fails to disclose wherein the S/D barrier layer comprises titanium (Ti) or titanium nitride (TiN). Wang223 discloses in Fig. 14 and paragraph [0053] wherein the S/D barrier layer [barrier layer of plug 603] comprises titanium (Ti) or titanium nitride (TiN). It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to incorporate the teachings of Wang223 into the method of Xie et al. to include wherein the S/D barrier layer comprises titanium (Ti) or titanium nitride (TiN). The ordinary artisan would have been motivated to modify Xie et al. in the above manner for the purpose of providing suitable material of a barrier layer of a S/D contact structure [paragraph [0053] of Wang223]. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007). Claims 13-15 are rejected under 35 U.S.C. 103 as being unpatentable over by Wang et al. (US Pub. 20230268223), hereafter Wang223, in view of Xie et al. (US Pub. 20190131430) and Cho et al. (US Pub. 20210210613). Regarding claims 13-15, Wang223 discloses in Fig. 4-Fig. 11 a method of fabricating a gate contact structure for a transistor, the transistor comprising a metal gate [401], a dielectric layer [403] at least partially surrounding the metal gate [401], and gate spacers [203], wherein the metal gate [401] and the dielectric layer [403] are disposed between the gate spacers [203][paragraph [0045]-[0048]], the method comprising: etching a top portion of the metal gate [401] to create a first recess [recess filled by 501 and 503] within the gate spacers [203] having a first depth [Fig. 4-Fig. 5, paragraph [0049]]; depositing a metal cap [501] to fill the first recess [recess filled by 501 and 503] within the gate spacers [203][Fig. 5, paragraph [0049]]; and forming selective tungsten [1101] above and in direct contact with the metal cap [501][Fig. 11, paragraph [0073]]; wherein depositing the metal cap [501] comprises depositing tungsten or cobalt [paragraph [0049]]; wherein forming selective tungsten [1101] above and in direct contact with the metal cap [501] comprises: forming selective tungsten [1101] at least within a second recess [recess filled by gate mask 503] within the gate spacers [203] having a second depth [equal to thickness of 503] less than the first depth [equal to the combined thickness of 501 and 503] and in direct contact with the metal cap [501]. Wang223 fails to disclose wherein the selective tungsten is in direct contact with the gate spacers. Xie et al. discloses in Fig. 13A, 14A, paragraph [0039]-[0040] the selective tungsten [62] is in direct contact with the gate spacers [16]. It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to incorporate the teachings of Xie et al. into the method of Wang223 to include wherein the selective tungsten is in direct contact with the gate spacers. The ordinary artisan would have been motivated to modify Wang223 in the above manner for the purpose of providing suitable configuration of a gate contact, increasing contact area and reducing contact resistance between the gate contact and the gate structure. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007). Wang223 fails to disclose depositing the metal cap to substantially fill the first recess; and etching a top portion of the metal cap to create the second recess. Cho et al. discloses in Fig. 27-Fig. 28, paragraph [0171]-[0172] of depositing the metal cap [131’] to substantially fill the first recess [T3]; and etching a top portion of the metal cap [131’] to create the second recess. Cho et al. further discloses in Fig. 26, paragraph [0093] forming selective tungsten [CB1] at least within the second recess [recess filled by 132] It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to incorporate the teachings of Cho et al. into the method of Wang223 to include depositing the metal cap to substantially fill the first recess; and etching a top portion of the metal cap to create the second recess. The ordinary artisan would have been motivated to modify Wang223 in the above manner for the purpose of providing suitable method for forming the conformal metal cap having desired thickness and shape [paragraph [0172] of Cho et al.]. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007). Wang223 discloses the first recess and the second recess within the gate spacers. Cho et al. discloses depositing the metal cap to substantially fill the first recess; and etching a top portion of the metal cap to create the second recess. The combination of Wang223 and Cho et al. would result to “depositing the metal cap to substantially fill the first recess within the gate spacers; and etching a top portion of the metal cap to create a second recess within the gate spacers.” Claims 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over by Wang et al. (US Pub. 20230268223), hereafter Wang223 as applied to claim 16 above, in view of Cho et al. (US Pub. 20210210613). Regarding claims 19-20, Wang223 discloses in Fig. 4-Fig. 11 prior to depositing the S/D barrier layer [a barrier layer of 603]: etching a top portion of the metal gate [401] to create a first recess [recess filled by 501 and 503] within the gate spacers [203] having a first depth [Fig. 4-Fig. 5, paragraph [0049]]; depositing a metal cap [501] to fill the first recess [recess filled by 501 and 503] within the gate spacers [203][Fig. 5, paragraph [0049]]; and depositing a second dielectric layer [503] to substantially fill a second recess [recess filled by 503] within the gate spacers [203] having a second depth less than the first depth [Fig. 5, paragraph [0050]]; after depositing the S/D contact [conductive material of 603 and 707][Fig. 7]: etching the second dielectric layer [503] to expose the second recess within the gate spacers [203][Fig. 9-10]; and forming selective tungsten [1101] at least within the second recess [recess filled by gate mask 503] and in direct contact with the metal cap [501][Fig. 11, paragraph [0073]]. Wang223 fails to disclose depositing the metal cap to substantially fill the first recess; and etching a top portion of the metal cap to create the second recess. Cho et al. discloses in Fig. 27-Fig. 28, paragraph [0171]-[0172] of depositing the metal cap [131’] to substantially fill the first recess [T3]; and etching a top portion of the metal cap [131’] to create the second recess. Cho et al. further discloses in Fig. 26, paragraph [0093] forming selective tungsten [CB1] at least within the second recess [recess filled by 132]. It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to incorporate the teachings of Cho et al. into the method of Wang223 to include depositing the metal cap to substantially fill the first recess; and etching a top portion of the metal cap to create the second recess. The ordinary artisan would have been motivated to modify Wang223 in the above manner for the purpose of providing suitable method for forming the conformal metal cap having desired thickness and shape [paragraph [0172] of Cho et al.]. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007). Wang223 discloses the first recess and the second recess within the gate spacers. Cho et al. discloses depositing the metal cap to substantially fill the first recess; and etching a top portion of the metal cap to create the second recess. The combination of Wang223 and Cho et al. would result to “depositing the metal cap to substantially fill the first recess within the gate spacers; and etching a top portion of the metal cap to create a second recess within the gate spacers.” Response to Arguments Applicant’s arguments with respect to claims 1-20 have been considered but are moot in view of the new ground of rejection. Overall, Applicant’s arguments are not persuasive. The claims stand rejected and the Action is made FINAL. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to SOPHIA T NGUYEN whose telephone number is (571)272-1686. The examiner can normally be reached 9:00am -5:00 pm, Monday-Friday. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, BRITT D HANLEY can be reached at (571)270-3042. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SOPHIA T NGUYEN/ Primary Examiner, Art Unit 2893
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Prosecution Timeline

Sep 20, 2022
Application Filed
Mar 25, 2025
Non-Final Rejection — §102, §103, §112
Jul 30, 2025
Response Filed
Aug 19, 2025
Final Rejection — §102, §103, §112
Nov 04, 2025
Request for Continued Examination
Nov 12, 2025
Response after Non-Final Action
Dec 19, 2025
Non-Final Rejection — §102, §103, §112 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
45%
Grant Probability
58%
With Interview (+13.3%)
2y 8m
Median Time to Grant
High
PTA Risk
Based on 509 resolved cases by this examiner. Grant probability derived from career allow rate.

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