DETAILED ACTION
This Office action is in response to application filed on 10/20/2025.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
1. A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 10/20/2025 has been entered.
2. Applicant filed Declaration by Rowshon Ara Mannan Munny under 37 CFR § 1.130 on 10/20/2025 is acknowledged.
Response to Amendment
3. Applicant’s amendments filed on 10/20/2025 to claims are accepted and entered. In this amendment:
Claims 2, 4, 14 and 18 have been amended.
Claims 1-20 have been examined.
Response to Arguments
4. Applicant’s arguments filed on 10/20/2025 have been fully considered. However,
Applicant’s argument regarding “Term interpretation” for impedance and
resistance is persuasive. Thus, the term "impedance" is not merely "resistance."
Regarding the 101 rejection: Applicant’s arguments that claims 1 and 11 do not
recite a mental process when they do not contain limitations that can practically be performed in the human mind, for instance when the human mind is not equipped to perform the claim limitations. The court has held that "a claim to detecting suspicious activity by using network monitors and analyzing network packets," (SRI Int'/, 930 F.3d at 1304) does not recite mental processes because it cannot be practically performed in the human mind. See SRI Int'/, Inc. v. Cisco Systems, Inc. (Remark, page 10).
In response, the Examiner respectfully disagrees. Claims 1 and 11 recite abstract ideas of using mental process including “selecting an impedance threshold …”; and using both math and mental processes such as “calculating an average impedance …” and “determining that the integrated circuit is a victim …” Thus, Step 2A – Prong One is yes. The claims recited additional limitations of “acquiring an impedance …” which is insignificantly extra-solution activity (i.e., mere data gathering) using elements recited at a high level of generality (e.g., voltage and current detection systems) and “responding to the power side channel attack”, which is also insignificantly extra-solution activity recited in generality. These additional limitations do not provide a practical application under Step 2A- Prong Two, or significantly more under Step 2B.
Regarding SRI Int’l, Inc., SRI had performed considerable research and development on network intrusion detection, i.e., accessing for authorized users, it also increases a network's susceptibility to attacks from hackers, malware, and other security threats.
Unlike SRI Int’l, Inc., the current claims do not recite detecting network intrusion
or authorization for users accessing into the network. Thus, claims 1 and 11 are not eligible.
Applicant further argues that even if claims 1-16 are found to contain a
mathematical operation, the claims contain significantly more because the claims as a whole improve the function of an integrated circuit. This is analogous to the claims found eligible in Example 3 ("Digital Image Processing") of the 2014 Interim Eligibility Guidance ("2014 IEG"), which recited a "method for halftoning a gray scale image". See 2014 IEG at Page 7. Although the claims in the example were found to be directed to
mathematical operation (i.e., generating a blue noise mask), the USPTO concluded that the claims amount to significantly more because the claims as a whole improve the functioning of the computer itself. See id. at Pages 9-10. Such improvements included using "less memory", achieving "faster computation", and producing "an improved digital image". Id. at Page 9. Similarly, the current claims contain significantly more than a mathematical operation, because the claims as a whole improve the function of an integrated circuit by providing devices and methods that determine that the integrated circuit is a victim of a power side channel attack and responding to the power side channel attack. (Remark, pages 11-12).
In response, the Examiner respectfully disagrees. Example 3 of USPTO
Guidance on Subject Matter Eligibility, "allows the computer to use less memory results in faster computation time, and produces an improved digital image.” Unlike Example 3, the current claims 1 and 11 do not recite any technical relationship to improve digital image nor using less memory resulting in faster computation time. Thus, claims 1 and 11 are not eligible.
Applicant’s arguments that the Office Action also asserts that dependent claims
2-10 and 12-16 do not disclose limitations considered to be significantly more than an abstract idea. Applicant respectfully disagrees and submits that the dependent claims are not directed to an abstract idea, and even if they include an abstract idea, include significantly more and provide a practical application. For example, claim 2 details the response to the power side channel attack. Claim 4 details further steps in the method for acquiring the impedance of the battery. Claim 5 includes utilizing a fuel-gauge having a coulomb counter, which further limits the invention with additional components and a practical application. Additionally, claim 12 further describes the components of the current detection system as comprising "a fuel-gauge having a coulomb counter, the fuel-gauge configured to determine the voltage and the current." A fuel-gauge is not a type of data or an order of parts of an analysis. Claim 13 further describes the physical components of the voltage detection system detailing components as comprising "an analog to digital converter operable to determine an open circuit voltage of the battery and a voltage of a monitoring node."
In response, the Examiner respectfully disagrees. Dependent claims 2, 5, and 12-13 extend (or narrow) the abstract idea which do not amount for "significant more" because it merely adds details to the algorithm which forms the abstract idea as discussed in the 101 rejection below. Claim 4 recites acquiring the impedance of the battery is data gathering which does not provide any significantly extra-solution activity. Thus, the above dependent claims do not provide any practical application.
Claim Rejections - 35 USC § 101
5. 35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
6. Claims 1-2 and 4-16 are rejected under 35 U.S.C. 101 as the claimed invention is directed to a judicial exception (i.e., a law of nature, a natural phenomenon,
or an abstract idea) without significantly more.
Under Step 1 of the 2019 Revised Patent Subject Matter Eligibility Guidance, the
claims are directed to a process/device/system (claims 1 and 11), which are statutory categories.
However, evaluating claims 1 and 11, under at Step 2A, Prong One, the claims are directed to the judicial exception of an Abstract idea using the groupings of mental processes including “selecting an impedance threshold for a battery in electrical communication with an integrated circuit”; and mental processes and math concepts including “calculating an average impedance of the battery for a period of time” and “determining that the integrated circuit is a victim of a power side channel attack when the average impedance of the battery for the period of time exceeds the impedance threshold”.
Next, Step 2A, Prong Two evaluates whether additional elements of the claims
"integrate the abstract idea into a practical application" in a manner that imposes a
meaningful limit on the judicial exception, such that the claims are more than a drafting effort designed to monopolize the exception. The additional limitation of “acquiring an impedance of the battery …” (claims 1 and 11) amount to mere data gathering, which is a form of insignificant extra-solution activity; the voltage and current detection systems (claim 1), integrated circuit, and impedance monitoring system (claim 11) are generic elements used for extra-solution activities (e.g., selecting a particular data source or type to be manipulated), and “responding to the power side channel attack” (claims 1 and 11) is insignificant extra-solution activity recited in generality.
These additional limitations do not integrate the abstract idea into a practical application because they do not impose any meaningful limits on practicing the abstract idea. The claims are directed to the abstract idea. Thus, the claims are not patent eligible.
At Step 2B, consideration is given to additional elements that may make the
abstract idea significantly more. Under Step 2B, there are no additional elements that
make the claim significantly more than the abstract idea.
The additional limitations as recited above in step 2A Prong Two, are considered insignificant extra-solution activities that are not sufficient to integrate the claims into a practical application. The above additional limitations have been considered individually and as a whole and do not amount to significantly more than the abstract idea itself.
Dependent claims 2, and 4-10 and 12-16 do not disclose limitations considered to be significantly more which would render the claimed invention a patent eligible application of the abstract idea. The claims mere extends (or narrow) the abstract idea which do not amount for “significant more” because it merely adds details to the algorithm which forms the abstract idea as discussed above.
Claim 3 recites additional elements that integrate the judicial exception into a practical application when considering the claim as a whole, by effecting a particular transformation or reduction of a particular article to a different state or thing (i.e., responding to the power side channel attack further includes halting operation of the integrated circuit). Thus, claim 3 is eligible.
Claim 17 recites no abstract idea. Thus, claim 17 is eligible. Dependent claims 18-20 are also eligible based on the analysis.
Claim Rejections - 35 USC § 103
7. The following is a quotation under AIA of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action.
A patent may not be obtained though the invention is not identically disclosed or described as set forth in section 102 of this title, if the differences between the subject matter sought to be patented and the prior art are such that the subject matter as a whole would have been obvious at the time the invention was made to a person having ordinary skill in the art to which said subject matter pertains. Patentability shall not be negatived by the manner in which the invention was made.
8. Claims 1-6, 11-15, and 17-19 are rejected under 35 U.S.C. 103 as being obvious over US patent 7856328 of Barsoukov et al., hereinafter “Barsoukov” in view of US patent 9774614 of Patne et al., hereinafter Patne.
As per Claim 1, Barsoukov teaches a method, comprising:
selecting an impedance threshold for a battery in electrical communication with an integrated circuit (impedance R1,…,R5 respectively, col 4 lines 17-25. Fig 2: embedded processor 113 considered an integrated circuit. Multi-cell battery 186 communicates with embedded processor 113, see col 5 lines 36-47, i.e., impedance R <threshold X, impedance R>threshold Y, see col 11 lines 14-25);
acquiring an impedance of the battery (total internal impedance, col 4 lines 22-25 and 55-56) based on a first measurement of a voltage detection system and a second measurement of a current detection system (Fig 4 step 310: measure voltage “first measurement” and current ‘second measurement”, see col 2 lines 3-4, Fig 2: sense resistor 134 considered “current detection system”, voltage regulator 122 considered “voltage detection system”, see col 6 lines 40-52);
calculating an average impedance of the battery for a period of time (average impedance value, col 11 lines 22-25, an average rate of change of impedance battery considered “average impedance of battery over time/period of time”, see col 3 lines 1-7, col 11 lines 39-43); and
determining that the integrated circuit is error (i.e., battery system 510 same as battery system 100 in Fig 2 having an embedded processor 113 “IC” determines and sends error message as shown in Fig 6) when the average impedance of the battery for the period of time exceeds the impedance threshold (the rate of change of impedance of the battery exceeds the threshold, see col 2 lines 55-62, col 4 lines 55-61),
Barsoukov does not teach determining that the integrated circuit is a victim of power side channel attack and responding to the power side channel attack.
Patne teaches determining that the integrated circuit is a victim of power side channel attack (computing device includes system-on-chip (SOC) considered “integrated circuit”, see col 9 lines 25-36, col 6 lines 16-35 and 43-51) and responding to the power side channel attack (Fig 4, step 412: responds to attack, the computing device performs obfuscation to protect a computing device, col 24 lines 3-12, col 27 lines 11-27).
Therefore, it would have been obvious to a person of ordinary skill in the art, before the effective filing date of the present claimed invention, to modify the teaching of Barsoukov to determining and responding a computing device is a victim of power side channel attack as taught by Patne that would perform any of a variety of obfuscation and actuation techniques to protect a computing device from ongoing side channel attack (Patne, col 27 lines 11-14).
As per Claim 2, Barsoukov in view of Patne teaches the method of claim 1, Barsoukov does not teach wherein responding to the power side channel attack further includes notifying a user of the power side channel attack via one or more of an auditory feedback, a haptic feedback, or a visual feedback. Patne teaches responding to the power side channel attack further includes notifying a user of the power side channel attack (col 11 lines 8-10) via one or more of an auditory feedback, a haptic feedback, or a visual feedback (see col 13 line 58 to col 14 line 5). It would have been obvious to a person of ordinary skill in the art, before the effective filing date of the present claimed invention, to modify the teaching of Barsoukov to notify the user via audio or haptic feedback in response to a computing device is a victim of power side channel attack as taught by Patne that would perform any of a variety of obfuscation and actuation techniques to protect a computing device from ongoing side channel attack (Patne, col 27 lines 11-14).
As per Claim 3, Barsoukov in view of Patne teaches the method of claim 1, Barsoukov does not teach wherein responding to the power side channel attack further includes halting operation of the integrated circuit. Patne teaches responding to the power side channel attack further includes halting operation of the integrated circuit (col 7 lines 42-50). It would have been obvious to a person of ordinary skill in the art, before the effective filing date of the present claimed invention, to modify the teaching of Barsoukov to include stopping or eliminating the computing device if power side channel attack determined as taught by Patne that would perform any of a variety of obfuscation and actuation techniques to protect a computing device from ongoing side channel attack (Patne, col 27 lines 11-14).
As per Claim 4, Barsoukov in view of Patne teaches the method of claim 1, Barsoukov teaches wherein acquiring the impedance of the battery includes: acquiring an open circuit voltage of the battery (Fig 3 shows unloaded voltage 220 measured considered “acquired open circuit voltage”, see col 7 line 61 to col 8 line 20) and a voltage at a monitoring node as the first measurement, and a current as the second measurement (Fig 2: voltage regulator 122 and sense resistor 134, and battery monitoring 100 considered “a monitoring node”, see col 5 lines 36-39); and calculating the impedance of the battery using the open circuit voltage, the voltage at the monitoring node, and the current (see col 7 line 61 to col 8 line 20).
As per Claim 5, Barsoukov in view of Patne teaches the method of claim 4, Barsoukov teaches wherein acquiring the open circuit voltage of the battery, the voltage at the monitoring node, and the current includes using a fuel-gauge having a coulomb counter (col 6 lines 11-14. It is noted fuel-gauges do include coulomb counters).
As per Claim 6, Barsoukov in view of Patne teaches the method of claim 1, Barsoukov teaches wherein acquiring the impedance of the battery is performed more than once and each performance of acquiring the impedance of the battery is separated from a prior performance of acquiring the impedance of the battery by a second period of time (col 2 lines 26-31- calculate “a first/second rate” considered “first/second period of times” of impedance based on measuring a first and second battery cell).
As per Claim 11, Barsoukov teaches a computerized device comprising:
a battery having a battery impedance (R is internal impedance of the battery in Fig 3, see col 7 lines 65-67, col 2 lines 7-10);
an integrated circuit coupled to the battery (Fig 2: embedded processor 113 considered an integrated circuit “IC” and IC 113 communicates with multi-cell battery 186, see col 5 lines 36-47); and
an impedance monitoring system disposed between the battery and the integrated circuit (battery monitoring 100 considered “a monitoring node” that communicates with battery pack and embedded processor “IC” 113, see col 5 lines 36-47), the impedance monitoring system comprising a current detection system and a voltage detection system to monitor an impedance of the battery (Fig 2: sense resistor 134 considered “current detection system”, voltage regulator 122 can be considered “voltage detection system”, see col 6 lines 40-52), the impedance monitor system (Fig 2: battery monitoring system 100 considered impedance monitoring system as it includes internal impedance calculation 182, col 5 lines 36-47) further comprising a processor, and a non-transitory computer readable medium storing computer executable instructions that when executed by the processor (col 1 lines 48-56), causes the processor to:
acquire an impedance of the battery (total internal impedance, col 4 lines 22-25 and 55-56); calculate an average impedance of the battery for a period of time (average impedance value, col 11 lines 22-25, an average rate of change of impedance battery considered “average impedance of battery over time “period of time”, see col 3 lines 1-7, col 11 lines 39-43);
determining that the integrated circuit is error (i.e., battery system 510 same as battery system 100 in Fig 2 having an embedded processor 113 “IC” determines and sends error message as shown in Fig 6) when the average impedance of the battery for the period of time exceeds the impedance threshold (the rate of change of impedance of the battery exceeds the threshold, see col 2 lines 55-62, col 4 lines 55-61).
Barsoukov does not teach determining that the integrated circuit is a victim of power side channel attack and responding to the power side channel attack.
Patne teaches determining that the integrated circuit is a victim of power side channel attack (computing device includes system-on-chip (SOC) considered “integrated circuit”, see col 9 lines 25-36, col 6 lines 16-35 and 43-51) and responding to the power side channel attack (Fig 4, step 412: responds to attack, the computing device performs obfuscation to protect a computing device, col 24 lines 3-12, col 27 lines 11-27).
Therefore, it would have been obvious to a person of ordinary skill in the art, before the effective filing date of the present claimed invention, to modify the teaching of Barsoukov to determining and responding a computing device is a victim of power side channel attack as taught by Patne that would perform any of a variety of obfuscation and actuation techniques to protect a computing device from ongoing side channel attack (Patne, col 27 lines 11-14).
As per Claim 12, Barsoukov in view of Patne teaches the computerized device of claim 11, Barsoukov teaches wherein the current detection system comprises a fuel-gauge having a coulomb counter, the fuel-gauge configured to determine the voltage and the current (col 6 lines 11-14. It is noted fuel-gauge chip does include a coulomb counter, the fuel gauge chip measures both voltage and current this achieved through the use of a coulomb counter).
As per Claim 13, Barsoukov in view of Patne teaches the computerized device of claim 11, Barsoukov teaches wherein the voltage detection system comprises an analog to digital converter operable to determine an open circuit voltage of the battery and a voltage of a monitoring node (col 6 lines 30-52, Fig 3: unloaded voltage 220 measured considered “acquired open circuit voltage”, see col 7 line 61 to col 8 line 20).
As per Claim 14, Barsoukov in view of Patne teaches the computerized device of claim 11, wherein the non-transitory computer readable medium further stores computer executable instructions that when executed by the processor causes the processor. Barsoukov does not teach to respond to the power side channel attack by one or more of notifying a user of the power side channel attack via one or more of an auditory feedback, a haptic feedback, or a visual feedback or halting operation of the integrated circuit. Patne teaches to respond to the power side channel attack by one or more of notifying a user of the power side channel attack via one or more of an auditory feedback, a haptic feedback, or a visual feedback or halting operation of the integrated circuit (col 13 line 52 to col 14 line). It would have been obvious to a person of ordinary skill in the art, before the effective filing date of the present claimed invention, to modify the teaching of Barsoukov to notify the user via audio or haptic feedback in response to a computing device is a victim of power side channel attack as taught by Patne that would perform any of a variety of obfuscation and actuation techniques to protect a computing device from ongoing side channel attack (Patne, col 27 lines 11-14).
As per Claim 15, Barsoukov in view of Patne teaches the computerized device of claim 11, Barsoukov teaches wherein the impedance threshold is determined by a user or is determined by the processor by setting the impedance threshold to value above the average impedance of the battery by a threshold percentage (col 13 lines 10-21 – impedance value corresponding to 50% state of charge of the first cell considered part of battery’s impedance, and 50% considered “above average”).
As per Claim 17, Barsoukov teaches an impedance monitoring system comprising:
a current detection system (Fig 2: sense resistor 134 considered “current detection system”, col 6 lines 50-52) having a fuel gauge with impedance measurement capabilities (col 6 lines 11-14. It is noted fuel-gauges do include coulomb counters), the current detection system being operable to detect a current from a battery to an integrated circuit (Fig 2 shows a sense resistor 134 considered “current detection system” and detect a current from multi-cell battery 186 to “embedded processor 113” considered integrated circuit “IC”, col 6 lines 40-61);
a voltage detection system having an analog to digital converter and a transistor operable to selectively apply a load resistor to a battery, the voltage detection system operable to detect an open circuit voltage (voltage regulator 122 considered “voltage detection system”, sense resistor 134 considered a type of load resistor, see col 6 lines 40-52, col 6 lines 30-52, Fig 3 shows unloaded voltage 220 measured considered “acquired open circuit voltage”, see col 7 line 61 to col 8 line 33), and a voltage at a monitoring node (Fig 2: battery monitoring system 100 considered impedance monitoring system as it includes internal impedance calculation 182, col 5 lines 36-47);
a first processor (embedded processor 113 considered “first processor”); and a non-transitory computer readable medium storing computer executable instructions that when executed by the first processor (col 1 lines 48-56), causes the first processor to:
transmit at least one of the current, the open circuit voltage and the voltage at the monitoring node to a second processor separate from the first processor (Fig 2: battery system 100 considered a monitoring node having an embedded processor 113 “first processor” includes measuring voltage, current, and open circuit voltage as addressed above. As shown in Fig 6, battery system 510 considered same as battery system 100 in Fig 2, battery system 510 sends error data to electronic system 520 having a processor considered “a second processor” that is separate from embedded processor).
Barsoukov does not explicitly teach receiving a signal from the first processor indicative of a power side channel attack; and respond to the power side channel attack.
Patne teaches receive a signal from the first processor indicative of a power side channel attack (“attacked device” considered “a first processor” receives encrypted emails from “attacker device” considered “second processor”, col 6 lines 19-27), and respond to the power side channel attack (Fig 4 step 412: respond to attack, the computing device performs obfuscation to protect a computing device, col 24 lines 3-12, col 27 lines 11-27, col 6 lines 27-35).
It would have been obvious to a person of ordinary skill in the art, before the effective filing date of the present claimed invention, to modify the teaching of Barsoukov to receive a signal indicating a power side channel attack as taught by Patne that would perform any of a variety of obfuscation and actuation techniques to protect a computing device from ongoing side channel attack (Patne, col 27 lines 11-14).
As per Claim 18, Barsoukov in view of Patne teaches the impedance monitoring system of claim 17, Barsoukov teaches wherein the non- transitory computer readable medium further stores computer executable instructions that when executed by the first processor. Barsoukov does not teach causing the first processor to respond to the power side channel attack by one or more of notifying a user of the power side channel attack via one or more of an auditory feedback, a haptic feedback, or a visual feedback, or halting operation of an integrated circuit. Patne teaches responding to the power side channel attack by one or more of notifying a user of the power side channel attack via one or more of an auditory feedback, a haptic feedback, or a visual feedback, or halting operation of an integrated circuit (see col 13 line 52 to col 14 line). It would have been obvious to a person of ordinary skill in the art, before the effective filing date of the present claimed invention, to modify the teaching of Barsoukov to notify the user via audio or haptic feedback in response to a computing device is a victim of power side channel attack as taught by Patne that would perform any of a variety of obfuscation and actuation techniques to protect a computing device from ongoing side channel attack (Patne, col 27 lines 11-14).
As per Claim 19, Barsoukov in view of Patne teaches the impedance monitoring system of claim 17, Barsoukov teaches wherein the voltage detection system detects the voltage at the monitoring node by selectively applying the load resistor by supplying a base signal to the transistor (Fig 2: voltage regulator 122 and sense resistor 134, and “battery monitoring” considered “a monitoring node”, see col 4 line 14. voltage regulator 122 considered “voltage detection system”, sense resistor 134 considered a type of load resistor, power transistor 139 operates as a discharge transistor and power transistor 38 operates as charge transistor, see col 6 lines 30-63).
9. Claim 7 is rejected under 35 U.S.C. 103 as being obvious over Barsoukov in view of Patne and further US patent 8908581 of Ho et al., hereinafter Ho.
As per Claim 7, Barsoukov in view of Patne teaches the method of claim 6, Barsoukov and Patne do not teach the second period of time is about 22 ms. Ho teaches the second period of time is about 22 ms (a second period of time in the repeating pattern can be a plurality of “transmission period times” TTIs, e.g., 5 ms, col 2 lines 31-32, see col 8 line 46, where switching any length of time/number of TTIs, more than 5 ms, see col 8 lines 42-46. Thus, it is obvious more than 5 ms can be 22 ms as anticipated “any length of time”. It would have been obvious to a person of ordinary skill in the art, before the effective filing date of the present claimed invention, to modify the teachings of Barsoukov and Patne having a second period of time of 22 ms as taught by Ho that would facilitate to extend a second period of time to any length of time.
10. Claims 8-10 are rejected under 35 U.S.C. 103 as being obvious over Barsoukov in view of Patne and further US patent 6,765,389 of Moore.
As per Claim 8, Barsoukov in view of Patne teaches the method of claim 1, Barsoukov teaches wherein acquiring the impedance of the battery further includes storing, by a processor, the impedance of the battery (col 11 lines 36-44, col 5 lines 9-15, as recited in claim 1). Barsoukov does not teach the data stored in a first-in, first-out (FIFO) stack in a memory. Moore teaches the data stored in a first-in, first-out (i.e., the data is stored in memory buffer as FIFO, col 5 lines 9-11). It would have been obvious to a person of ordinary skill in the art, before the effective filing date of the present claimed invention, to modify the teachings of Barsoukov and Patne having the data stored in memory buffer as FIFO as taught by Moore that would ensure the data is processed in the same order it is received.
As per Claim 9, Barsoukov in view of Patne and Moore teaches the method of claim 8, Barsoukov in view of Patne teaches wherein calculating the average impedance of the battery for the period of time includes averaging each impedance of the battery stored as recited in claim 1. Barsoukov and Patne do not teach stored records in the FIFO stack Moore teaches the data stored in a first-in, first-out (i.e., the data is stored in memory buffer as FIFO, col 5 lines 9-11). It would have been obvious to a person of ordinary skill in the art, before the effective filing date of the present claimed invention, to modify the teachings of Barsoukov and Patne having the data stored in memory buffer as FIFO as taught by Moore that would ensure the data is processed in the same order it is received.
As per Claim 10, Barsoukov in view of Patne and Moore teaches the method of claim 8, Barsoukov teaches wherein acquiring the impedance of the battery further includes storing impedance, by the processor as recited in claim 1, Barsoukov and Patne do not teach at least a previous ten (10) records of the battery in the FIFO stack in the memory. Moore teaches at least a previous ten (10) records of the battery in the FIFO stack in the memory (Fig 2 shows a history table 44 comprises FIFO buffer having, i.e.,10 entries considered previous 10 records, col 5 lines 9-11). It would have been obvious to a person of ordinary skill in the art, before the effective filing date of the present claimed invention, to modify the teachings of Barsoukov and Patne having the data stored in memory buffer, i.e., 10 records stored in table having FIFO as taught by Moore that would ensure the data is processed in the same order it is received.
11. Claim 16 is rejected under 35 U.S.C. 103 as being obvious over Barsoukov in view of Patne and further CN 111398835A of Hu Yu, hereinafter Hu.
As per Claim 16, Barsoukov in view of Patne teaches the computerized device of claim 15, the combination does not teach wherein the threshold percentage is 7%. Hu teaches the threshold percentage is 7% (the impedance threshold, i.e., when increasing by approx. 20%, can be considered increases to 7%, see page 14 para 3, page 16 last 2 lines). It would have been obvious to a person of ordinary skill in the art, before the effective filing date of the present claimed invention, to modify the teachings of Barsoukov and Patne having the threshold impedance of 7% as taught by Hu that would facilitate more choices for selecting by increasing to 7% before approx. 20%.
12. Claim 20 is rejected under 35 U.S.C. 103 as being obvious over Barsoukov in view of Patne and further US patent 6522489 of Nagaraj.
As per Claim 20, Barsoukov in view of Patne teaches the impedance monitoring system of claim 17, Barsoukov in view of Patne teaches analog to digital converter, but does not explicitly teach the converter is at least a 6-bit analog to digital converter. Nagaraj teaches analog to digital converter is at least 6 bit analog to digital (col 2 lines 65-66). It would have been obvious to a person of ordinary skill in the art, before the effective filing date of the present claimed invention, to modify the teachings of Barsoukov and Patne having at least six bit analog to digital converter as taught by Nagaraj that would provide a technique for simplifying the analog-to-digital converter implementation by taking advantage of the unique properties of the disk drive signal.
Conclusion
13. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Navyata et al. Power side channel attack analysis and detection, 2020.
US 2021/0150071 of Vincent et al., Power Rail Noise Monitoring to Detect Attempted Security Tampering or Side Channel Attacks.
US 2016/0055736 of Xie et al., Advanced battery early warning and monitoring system.
US 2021/0405124 of Lan et al., Battery control device and battery capacity estimation method.
14. Any inquiry concerning this communication or earlier communications from the
examiner should be directed to LYNDA DINH whose telephone number is (571) 270-
7150. The examiner can normally be reached on M-F 10 PM-6 PM ET.
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/LYNDA DINH/Examiner, Art Unit 2857
/LINA CORDERO/Primary Examiner, Art Unit 2857