Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1, 3-5, 7-12, 27, 31, 33-35, 37-43, 45-50 is/are rejected under 35 U.S.C. 102 as being anticipated by Abedini US 20210203469
1. A network node for wireless communication, comprising:
one or more memories (Abedini: fig. 2, unit 256); and
one or more processors, coupled to the one or more memories, individually or collectively configured (Abedini: fig. 2, unit 258) to cause the network node to:
transmit, to a user equipment (UE), or receive, from the UE (Abedini: fig. 8 [0081-0087] the full-duplex symbols may be explicitly indicated in any of the common TDD configuration, the dedicated RRC signaling, or the SFI carried in the DCI for the wireless node 820), an indication of whether a first downlink channel or downlink reference signal is permitted to overlap in time, in a full-duplex configuration, with a second uplink channel or uplink reference signal (Abedini: fig. 8 [0086-0097] signaling may implicitly indicate one or more symbols that can be used for full-duplex communications. For example, to implicitly indicate that a symbol can be used for full-duplex communications, the dedicated signaling may relabel a downlink symbol as an uplink symbol or a flexible symbol or may relabel an uplink symbol as a downlink symbol or a flexible symbol. For example, the common TDD configuration may initially indicate that a symbol is a downlink-only or an uplink-only symbol and the dedicated signaling or SFI may relabel the symbol as an uplink/flexible symbol or a downlink/flexible symbol to implicitly indicate that the symbol is configured for full-duplex communications…).
wherein the indication is based at least in part on: a first channel type or reference signal type of the first downlink channel or downlink reference signal, and a second channel type or reference signal type of the second uplink channel or uplink reference signal (Abedini: fig. 8 [0090, 0094, 0132] signal types associated with the uplink communication and the downlink communication (for example, prioritizing a downlink SSB over an uplink SR or PUSCH)); and
schedule a communication of a user equipment (UE) based at least in part on whether the first downlink channel or downlink reference signal is permitted to overlap in time, in the full-duplex configuration, with the second uplink channel or uplink reference signal (Abedini: fig. 8 [0086-0097] perform for dynamically-scheduled communications).
3. (Original) The network node of claim 1, wherein identifying whether the first downlink channel or reference signal is permitted to overlap in time, in the full-duplex configuration, with the second uplink channel or reference signal is based at least in part on a prioritization rule or a legacy rule (Abedini: fig. 8 [0090, 0094, 0096] prioritizing rule).
4. (Original) The network node of claim 1, wherein the one or more processors, to identify whether the first downlink channel or reference signal is permitted to overlap in time, in the full-duplex configuration, with the second uplink channel or reference signal, are configured to identify whether channels or signals of the first channel type or reference signal type are permitted to overlap in time with channels or signals of the second channel type or reference signal type (Abedini: fig. 8 [0090, 0094-0099]).
5. (Original) The network node of claim 1, wherein identifying whether the first downlink channel or reference signal is permitted to overlap in time, in the full-duplex configuration, with the second uplink channel or reference signal is based at least in part on the first downlink channel or reference signal and the second uplink channel or reference signal being associated with a beam pair (Abedini: [0089] beam pair).
7. (Original) The network node of claim 1, wherein the first downlink channel or reference signal overlaps, in the full-duplex configuration, with the second uplink channel or reference signal at the network node based at least in part on the network node being a full- duplex network node (Abedini: fig. 8).
8. (Original) The network node of claim 1, wherein the first downlink channel or reference signal overlaps, in the full-duplex configuration, with the second uplink channel or reference signal at the UE based at least in part on the UE being a full-duplex UE (Abedini: fig. 8).
9. (Original) The network node of claim 1, wherein the first channel type or reference signal type comprises at least one of:
a synchronization signal block (SSB) type,
a physical downlink control channel (PDCCH) type,
a physical downlink shared channel (PDSCH) type,
a channel state information reference signal (CSI-RS) type, or
a positioning reference signal (PRS) type (Abedini: [0096] downlink SSB).
10. (Original) The network node of claim 1, wherein the second channel type or reference signal type comprises at least one of:
a physical uplink control channel (PUCCH) type,
a physical uplink shared channel (PUSCH) type,
a physical random access channel (PRACH) type,
a sounding reference signal (SRS) type, or
an uplink positioning reference signal (PRS) type (Abedini: [0096] uplink SR or PUSCH).
11. (Original) The network node of claim 1, wherein identifying whether the first downlink channel or reference signal is permitted to overlap in time, in the full-duplex configuration, with the second uplink channel or reference signal is based at least in part on a use case of the first downlink channel or reference signal or on a use case the second uplink channel or reference signal (Abedini: fig. 8, unit 850).
12. (Original) The network node of claim 1, wherein the full-duplex configuration comprises at least one of:
a sub-band full-duplex configuration,
a partially overlapped full-duplex configuration, or
a fully overlapped full-duplex configuration (Abedini: fig. 8, full-duplex).
45. The network node of claim 1, wherein the one or more processors are configured to cause the network node to: receive, from the UE, the indication (Abedini: [0036]).
46. The network node of claim 1, wherein the one or more processors are configured to cause the network node to: receive the indication in uplink control information (Abedini: [0036, 0091]).
47. The network node of claim 1, wherein the one or more processors are configured to cause the network node to: transmit, to the UE, the indication (Abedini: [0036]).
48. The network node of claim 1, wherein the one or more processors are configured to cause the network node to: transmit the indication in radio resource control (RRC) signaling, downlink control information (DCI) signaling, or a medium access control control element (MAC-CE) (Abedini: [0130]).
Regarding claims 27, 31, 33-35, 37-43, 49-50 the independent claim and each dependent claim are related to the same limitation set for hereinabove in claims 1, 3-5, 7-12, 45-48 where the difference used is a “UE” with a processor and a memory (Abedini: fig. 2, unit 258 & 256) and the wordings of the claims were interchanged within the claim itself or some of the claims were presented as a combination of two or more previously presented limitations. This change does not affect the limitation of the above treated claims. Adding these phrases to the claims arid interchanging the wording did not introduce new limitations to these claims. Therefore, these claims were rejected for similar reasons as stated above.
Response to Amendment
Applicant's arguments with respect to claim(s) 1, 3-5, 7-12, 27, 31, 33-35, 37-43, 45-50 have been considered but are moot in view of the new ground(s) of rejection.
Remark(s):
The examiner stresses that the claims are too broad and require detail or specialization of the steps as recited in the claims. Alone and as claimed, the limitations are too open.
Examiner has cited particular portions of the references as applied to each claim limitation for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner.
Regarding all other arguments presented by applicant, the arguments are substantially the same as those which have already been addressed above and in the interest of brevity; the Examiner directs the applicant to those responses above.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Sulaiman Nooristany whose telephone number is 571-270-1929. The examiner can normally be reached on Monday thru Friday: 8:30am to 5:00pm (EST). If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jeff Rutkowski can be reached on 571-270-1215. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/SULAIMAN NOORISTANY/
Primary Examiner, Art Unit 2415
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