DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of the Claims
Claim 1 is amended. Claims 2-12 are as previously presented. Claim 13 is newly added. Therefore, claims 1-13 are currently pending and have been considered below.
Response to Amendment
The amendment filed on October 17, 2025 has been entered.
Response to Arguments
Applicant’s arguments, see Pages 6-16, filed on 10/17/2025, with respect to the rejection(s) of claim(s) 1-12 under U.S.C. 103 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of applicant’s amendment regarding the current flow between the first and second conductor layer and newly found prior art regarding that feature.
Priority
Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d). The certified copy has been filed in parent Application No. JP2021-176702, filed on 10/28/2021.
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1, 7-8, and 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yamanaka et al. (US 9203213 B2, hereinafter Yamanaka) in view of Watabe et al. (JP 2010236934 A, hereinafter Watabe) and Roh (KR 20180029409 A).
Regarding claim 1, Yamanaka discloses a thermal radiation element (Section 12, lines 24-26, “semiconductor light-emitting device 1 mounted on the package 81, the Joule heat generated in the semiconductor light-emitting element 10”, where thermal radiation is emitted through the joule heat produced) comprising:
a substrate, made of a semiconductor (Section 6, lines 3-6, “Aluminum nitride (AlN) ceramic, silicon carbide (SiC) ceramic, alumina (Al2O3 ) ceramic, or silicon (Si), etc., can be used as the insulating substrate 21.”, where the insulating substrate 21 can be made from silicon, which is a semiconductor), having a first principal plane and a second principal plane (Modified Fig. 1, where the first and second principal planes are shown);
a first conductor layer and a second conductor layer provided on the first principal plane and the second principal plane, respectively (Section 7, lines 24-26, “In the first heat sink 20, a first conductive film 22 formed of sequentially stacked titanium (Ti)/platinum (Pt)/gold (Au), for example”, and Section 7, lines 35-37, “The second conductive film 23 extends from a region under the via electrode 36 to a region under the semiconductor light-emitting element 10.”); and
an electrode pair provided connected to the first conductor layer (Section 8, lines 11-14, “lower surface of the first electrode 32 and a lower surface of the second electrode 33 provided on the second heat sink 30. Each of the adhesive layers 43, 44 can be formed of SnAgCu solder (i.e., an alloy of Sn, Ag and Cu)”, and Section 8, line 6, “adhesive layer 42”, where the adhesive layers 42 and 43 connects the electrodes 32 and 33 to the second conductor layer 23, as shown in Fig. 1).
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Modified Figure 1, Yamanaka
Yamanaka does not disclose:
an electrode pair provided in an outer edge region of the first conductor layer;
wherein the substrate is configured to allow current to flow from the first conductor layer to the second conductor layer.
However, Watabe discloses, in the similar field of thermal radiation elements (Abstract, “infrared radiation element”), where the pair of electrodes can be connected to the outer edges of a conductor layer (Abstract, “a temperature of the radiation layer 4 is raised to radiate an infrared ray.”, and Page 6, Para. 2 from end, “applying a voltage to the electrode 7, heat is transferred from the reflective layer 6 to the radiating layer 4 through the transmissive layer 5”). It would have been obvious for one of ordinary skill in the art before the effective filling date of the claimed invention to have modified the electrode connection to the conductor in Yamanaka have the electrodes be located on both sides of the conductor as taught by Watabe.
One of ordinary skill in the art would have been motivated to make this modification in order to gain the advantage having another configuration for the electrode to conductor connection, where splitting the electrodes allows for the light emission to be controlled, as stated by Watabe, Page 5, Para. 4, “For example, by applying a sinusoidal voltage of about 100 V between both electrodes 7, it is possible to design to emit infrared light having a peak wavelength of 3 to 4 [μm]. If the voltage is adjusted, It is also possible to emit infrared rays having a peak wavelength of 4 [μm] or more.”.
It has also been held that mere rearrangement of parts is an obvious modification to make. In re Kuhle, 526 F.2d 553, 188 USPQ 7 (CCPA 1975). Yamanaka shows that electrodes connected to a conductor layer is possible, where the electrodes are arranged above the layer. Watabe then shows that having the electrodes provided in an outer edge region of a layer is also possible. It is the Examiner’s position that either configuration still allows for energy to be transferred through the electrodes to the conductor layer, where only rearrangement of the electrode contact location is made. As a result, altering the electrode contact location with the conductor layer would be a mere matter of user design choice.
Further, Roh discloses, in the similar field of thermal radiation elements (Abstract, “A thermoelectric device”, and Page 3, Para. 4 from end, “That is, the first substrate 10 and the second substrate 50 may perform a heat transfer between the external device and the semiconductor device 30.”), where there is a first conductor and second conductor layer (Page 3, Para. 3 from end, “The substrates 10 and 50 may be made of a metal having an excellent thermal conductivity. For example, the substrate 10, 50 may be made of aluminum, copper, or the like. It is possible to realize endothermic efficiency and heat generation efficiency and thinness by using a metal substrate.”), where there are a pair of electrodes connected to the first conductor layer on the outer edge region (Page 4, Para. 8 from end, “The terminal electrode 41 may be disposed on an upper portion of the semiconductor device disposed at the outermost of the plurality of semiconductor devices. As shown in the figure, two terminal electrodes 41 may be disposed on one side of the substrate and the outermost one side of the substrate.”), and where the substrate between the two conductor layers allows current to flow from the first conductor layer to the second conductor layer (Page 4, last Para., “The semiconductor device is formed by a circuit line L1 or L2 through which current is supplied to the semiconductor device through an electrode”, and Fig. 3 shows that the L1 or L2 current supplied would enter the first conductor layer and travel through the substrate to the second conductor layer; where the substrate is made of a semiconductor that allows current to flow, Page 4, Para. 5, “A plurality of semiconductor elements 30 may be arranged between the substrates 10 and 50 such that the first semiconductor elements 31 and the second semiconductor elements 32 are paired”, and Page 3, Para. 4 from end, “The first substrate 10 and the second substrate 50 are bonded to an external device to absorb heat from the outside through heat exchange of the semiconductor elements 30 or dissipate heat to the outside.”). It would have been obvious for one of ordinary skill in the art before the effective filling date of the claimed invention to have modified the thermal radiation element substrate in modified Yamanaka to include the doped semiconductors that allow for current to flow as taught by Roh, where the substrate 30 with a second conductor layer from Roh can be added under the first conductor layer in Yamanaka to maintain the insulating substrate from Yamanaka.
One of ordinary skill in the art would have been motivated to make this modification in order to gain the advantage of being able to unlock a power generation function for the substrate, where the incorporation of P-type and N-type semiconductors allow for a user to be able to gain access to power generation and temperature control, which can expand the useability of the system, as stated by Roh, Para. 1, last Para., “a thermoelectric conversion element is a structure that forms a PN junction pair by bonding a P-type thermoelectric material and an N-type thermoelectric material between metal electrodes. When a temperature difference is given between the PN junction pairs, the power is generated by the Seeback effect, so that the thermoelectric device can function as a power generation device. Further, the thermoelectric element may be used as a temperature control device by a Peltier effect in which one of the PN junction pair is cooled and the other is heated.”.
Regarding claim 7, modified Yamanaka teaches the apparatus according to claim 1, as set forth above, discloses wherein a thickness of the substrate is 100 µm or more and 1 mm or less (Yamanaka, modified Fig. 1.2, where the thickness of the substrate is shown to range from approximately 20-200 µm, where 200 µm would be more than 100 µm; Section 9, lines 26-28, “adhesive layers 43, 44 that are bumps formed, for example, of AuSn solder and preferably of SnAgCu solder with a thickness of about 5 μm to about 50 μm”).
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Modified Figure 1.2, Yamanaka
Regarding claim 8, modified Yamanaka teaches the apparatus according to claim 1, as set forth above, discloses wherein the substrate is made of silicon (Yamanaka, Section 6, lines 3-6, “Aluminum nitride (AlN) ceramic, silicon carbide (SiC) ceramic, alumina (Al2O3 ) ceramic, or silicon (Si), etc., can be used as the insulating substrate 21.”, where the insulating substrate 21 can be made from silicon, which is a semiconductor).
Regarding claim 13, modified Yamanaka teaches the apparatus according to claim 1, as set forth above, discloses where the operating temperature can reach 200°C (Yamanaka, Section 6, lines 12-14, “The temperature of a light-emitting portion of the semiconductor light-emitting element 10 varies from a room temperature (about 20° C.) to about 200° C.”).
Modified Yamanaka does not disclose:
wherein an operating temperature of the thermal radiation element is in a temperature range between 300°C to 1200°C.
However, Watabe discloses where the operating temperature range of a thermal radiation element can have a temperature range between 300°C to 1200°C (Page 8, Para. 3 from end, “By the way, TaN is used for the radiation layer 4 and the resistance temperature coefficient is set to -0.001 [1 / ° C.], the maximum temperature reached during driving is 500 [° C.]”). It would have been obvious for one of ordinary skill in the art before the effective filling date of the claimed invention to have modified the radiation element in modified Yamanaka to include the temperature range as taught by Watabe.
One of ordinary skill in the art would have been motivated to make this modification in order to gain the advantage of being able to use a radiation layer element composition that allows for the maximum temperature to be increased, where the element composition can be selected by a user depending on their desired temperatures, as stated by Watabe, Page 8, Para. 4 from end, “Further, when TaN is used, the radiation layer 4 has a negative resistance temperature coefficient in which the sheet resistance decreases as the temperature increases.”, and Page 8, Para. 2 from end, “As described above, by giving the radiation layer 4 a negative temperature coefficient of resistance, when the power supply voltage is boosted by a booster circuit in order to obtain a voltage to be applied to the radiation layer 4, the maximum temperature reached is increased.”.
Claims 2-4 and 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yamanaka et al. (US 9203213 B2, hereinafter Yamanaka) in view of Watabe et al. (JP 2010236934 A, hereinafter Watabe) and Roh (KR 20180029409 A) in further view of Chen et al. (“Tunable near-infrared plasmonic perfect absorber based on phase-change materials” NPL, hereinafter Chen).
Regarding claim 2, modified Yamanaka teaches the apparatus according to claim 1, as set forth above.
Modified Yamanaka does not disclose:
further comprising an insulator layer and a third conductor layer stacked in order on a surface of the first conductor layer or the second conductor layer, the insulator layer and the third conductor layer constituting a plasmonic perfect absorber together with the first conductor layer or the second conductor layer.
However, Chen discloses, in the similar field of thermal radiation elements (Introduction, Para. 1, “This extraordinary property could be promising in a variety of applications, for instance, optical modulation, communication, and thermal imaging.”), where an insulator layer and a conductor layer can be stacked on another conductor in order to create a plasmonic perfect absorber (Abstract, “A tunable plasmonic perfect absorber with a tuning range of ∼650 nm is realized by introducing a 20 nm thick phase-change material Ge2Sb2Te5 layer into the metal–dielectric–metal configuration.”, where dielectrics are insulators). It would have been obvious for one of ordinary skill in the art before the effective filling date of the claimed invention to have modified a conductor layer in modified Yamanaka to include the plasmonic perfect absorber as taught by Chen.
One of ordinary skill in the art would have been motivated to make this modification in order to gain the advantage using an adjustable plasmonic perfect absorber in the thermal radiation field for the high amounts of radiation absorption, where this could benefit Yamanaka with allowing for thermal radiation produced from heat to be absorbed, as stated by Chen, Introduction, last Para., “By varying the crystallization level of GST, the plasmonic resonance of the structure can be continuously tuned in a large range of 650 nm. The absorption is kept above 0.96 and the Q-factor of the absorption peak is maintained above 4 across the entire tuning range. This highly efficient tunable plasmonic absorber is promising in applications for multi-band optical communication and thermal imaging etc.”.
Regarding claim 3, modified Yamanaka teaches the apparatus according to claim 2, as set forth above.
Modified Yamanaka does not disclose:
wherein the third conductor layer includes a plurality of conductor patterns two-dimensionally and regularly arranged, the plurality of conductor patterns each being in a circular shape or a regular polygonal shape.
However, Chen discloses where the third conductor layer includes two-dimensionally and regularly arranged patterns, where the patterns are circular in shape (Introduction, Para. 1, “Noble metals, such as copper, silver, and gold, are excellent reflectors in infrared (IR) regime. By patterning such metals in nanoscale, strong absorption can be produced due to the excitation of plasmonic resonance [1–10].”, and modified Fig. 1.1, where the patterning of the metals on the top layer shown in pink include circular patterns regularly arranged). It would have been obvious for one of ordinary skill in the art before the effective filling date of the claimed invention to have modified the third conductor layer in modified Yamanaka to include the features as taught by Chen.
One of ordinary skill in the art would have been motivated to make this modification in order to gain the advantage being able to use plasmonic resonance through the patterning of the conductor layer to achieve strong absorption, as stated by Chen, Introduction, Para. 1, “By patterning such metals in nanoscale, strong absorption can be produced due to the excitation of plasmonic resonance”.
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Modified Figure 1.1, Chen
Regarding claim 4, modified Yamanaka teaches the apparatus according to claim 3, as set forth above.
Modified Yamanaka does not disclose:
wherein a thickness t1 of the conductor layer, out of the first conductor layer and the second conductor layer, constituting the plasmonic perfect absorber together with the insulator layer and the third conductor layer, and a thickness t3 of the third conductor layer satisfies a relationship of t1 > 1.5 x t3.
However, Chen discloses where the thickness of a conductor layer making up the plasmonic perfect absorber is greater than 1.5 times the thickness of the third conductor layer (Modified Fig. 1.1, where the first or second conductor layer would be the layer labelled “Metal Mirror”, where the third conductor layer is the regularly arranged circular structure one, where from the figure it can be seen that metal mirror layer is at least 5 times greater than the thickness of the third conductor layer). It would have been obvious for one of ordinary skill in the art before the effective filling date of the claimed invention to have modified the plasmonic perfect absorber in modified Yamanaka to include the features as taught by Chen.
One of ordinary skill in the art would have been motivated to make this modification in order to gain the advantage being able to control the optical response of the plasmonic platform through the geometric parameter and material properties, where a user would be able to alter geometric parameters as part of their design choices in order to achieve the desired optical absorption response from the plasmonic perfect absorber, as stated by Chen, Introduction, Para. 1, “the optical response from this plasmonic platform is fixed, which is determined by its geometric parameters and material properties.”.
Regarding claim 6, modified Yamanaka teaches the apparatus according to claim 2, as set forth above.
Modified Yamanaka does not disclose:
wherein the insulator layer is made of at least one of SiO2, Al2O3, and AlN.
However, Chen discloses where the insulator layer can be made from SiO2 (Design and Simulation, Para. 1, “A layer of SiO2 insulating spacer is sandwiched between the GST film and the metal mirror at the bottom.”). It would have been obvious for one of ordinary skill in the art before the effective filling date of the claimed invention to have modified the material of the plasmonic perfect absorber in modified Yamanaka to be as taught by Chen.
One of ordinary skill in the art would have been motivated to make this modification in order to gain the advantage being able to use different materials in order to shape the desired optical response from the plasmonic perfect absorber, as stated by Chen, Introduction, Para. 1, “the optical response from this plasmonic platform is fixed, which is determined by its geometric parameters and material properties.”.
Claims 5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yamanaka et al. (US 9203213 B2, hereinafter Yamanaka) in view of Watabe et al. (JP 2010236934 A, hereinafter Watabe) and Roh (KR 20180029409 A) in further view of Chen et al. (“Tunable near-infrared plasmonic perfect absorber based on phase-change materials” NPL, hereinafter Chen) and Nagao et al. (US 10067270 B2, hereinafter Nagao).
Regarding claim 5, modified Yamanaka teaches the apparatus according to claim 2, as set forth above.
Modified Yamanaka does not disclose:
wherein the conductor layer, out of the first conductor layer and the second conductor layer, constituting the plasmonic perfect absorber together with the insulator layer and the third conductor layer, and the third conductor layer are made of HfN.
Examiner notes that Chen discloses where the optical response of a plasmonic perfect absorber can be altered through the use of different materials (Introduction, Para. 1, “the optical response from this plasmonic platform is fixed, which is determined by its geometric parameters and material properties.”).
However, Nagao discloses, in the similar field of plasmonic perfect absorbers (Section 1, lines 16-22, “an electromagnetic wave absorbing/radiating material (light collecting/radiating material) which has a simple structure and is capable of selectively and efficiently absorbing or radiating electromagnetic waves at a desired wavelength in a range of ultraviolet light to far infrared light”), where the two conductor layers that sandwich an insulator can be both made from HfN (Section 8, lines 6-11, “In addition, a highly heat resistant material such as Mo, W, Nb, Ta, Re, MoSi2 , TiN, ZrN, HfN, TiC, TaC, LaB6 , or AIB2 can also be used. Further, the same conductive material may be used or different materials may be used for the first metal layer 12 and the second metal disc layer 16.”). It would have been obvious for one of ordinary skill in the art before the effective filling date of the claimed invention to have modified the material of the conductor layers in the plasmonic perfect absorber in modified Yamanaka to be HfN as taught by Nagao.
One of ordinary skill in the art would have been motivated to make this modification in order to gain the advantage being able to use a heat resistant metal for the absorber, where Chen teaches that different materials can be selected to achieve different optical responses, as stated by Nagao, Section 8, lines 6-11, “In addition, a highly heat resistant material such as Mo, W, Nb, Ta, Re, MoSi2 , TiN, ZrN, HfN, TiC, TaC, LaB6 , or AIB2 can also be used.”.
Claims 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yamanaka et al. (US 9203213 B2, hereinafter Yamanaka) in view of Watabe et al. (JP 2010236934 A, hereinafter Watabe) and Roh (KR 20180029409 A) in further view of Hody et al. (ES 2805529 T3, hereinafter Hody).
Regarding claim 9, modified Yamanaka teaches the apparatus according to claim 1, as set forth above, discloses wherein the substrate is made of silicon (Yamanaka, Section 6, lines 3-6, “Aluminum nitride (AlN) ceramic, silicon carbide (SiC) ceramic, alumina (Al2O3 ) ceramic, or silicon (Si), etc., can be used as the insulating substrate 21.”, where the insulating substrate 21 can be made from silicon, which is a semiconductor).
Modified Yamanaka does not disclose:
the first principal plane or the second principal plane is provided with a nanoscale rough structure.
However, Hody discloses, in the similar field of thermal radiation elements (Abstract, “solar energy systems”), where the surface of a substrate can have nanoscale roughness (Page 7, last Para., “In the second case (Figure 27b), the surface presents a much rougher structure and is densely covered with some type of pyramids. These pyramids have a height of around 5 pm, are defined by different types of polygons, such as their base area whose dimensions are often around 100 pm to 120 pm and have pronounced nanostructured side walls.”). It would have been obvious for one of ordinary skill in the art before the effective filling date of the claimed invention to have modified the principal planes of the substrate in modified Yamanaka to include nanoscale rough structures as taught by Hody.
One of ordinary skill in the art would have been motivated to make this modification in order to gain the advantage being able to increase the amount of radiation transmitted through the substrate, where the increased nanoscale roughness increases antireflection properties, as stated by Hody, Page 7, last Para., “The measured gain in solar transmittance can be explained by the antireflection properties resulting from the microscale pattern in combination with a modification of the nanoscale roughness.”.
Claims 10 and 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yamanaka et al. (US 9203213 B2, hereinafter Yamanaka) in view of Watabe et al. (JP 2010236934 A, hereinafter Watabe) and Roh (KR 20180029409 A) in further view of Park (US 8878200 B2).
Regarding claim 10, modified Yamanaka teaches the apparatus according to claim 1, as set forth above, discloses a thermal radiation element module comprising: the thermal radiation element according to claim 1 (Yamanaka, Section 11, lines 25-28, “the first heat sink 20, the semiconductor light-emitting element 10, and the second heat sink 30 are adhered together on the mounting surface 82c”); and
a housing provided with a cavity housing the thermal radiation element (Yamanaka, Section 11, lines 7-11, “In the present embodiment, a cap with a glass window for air-tightly encapsulating the semiconductor light-emitting element 10 is not shown, but it is possible to provide such a cap according to the necessity of the semiconductor light-emitting device”, where the housing is construed to be the package 81 with a cap, where inside the cap is the cavity that the thermal radiation element is secured to) and a power terminal supplying power to the electrode pair (Section 10, 66-end, “The third electrode 34 and the fourth electrode 35 formed on the upper surface of the second heat sink 30 are electrically connected to the lead pin 84 and the lead pin 85, respectively, by fine gold wires 91, 92.”, where the pins 84, 85, and 88 are the power terminals), where the substrate is secured to the cavity (Section 10, lines 63-66, “In a package 81 having the above configuration, the semiconductor light-emitting device 1 is adhered to the upper surface of the post 82b such that the first heat sink 20 and the post 82b are in contact with each other.”).
Modified Yamanaka does not disclose:
in an inside of the cavity, at least a part of the substrate is secured to the cavity using a bonding member.
However, Park discloses, in the similar field of radiation emitting elements (Abstract, “light emitting package, including: a base; a light emitting device on the base”), where there is a cavity formed within a base that the substrate containing the light emitting portion is placed in (Section 6, lines 53-54, “light emitting device 360a is placed in a removal region B from which the metal base 350a is removed.”), where the light emitting package is secured to the cavity using a bonding member (Section 6, lines 60-63, “Besides, the light emitting device 360a is inserted into the removal region B, thus allowing the bottom surface to be attached by a thermal conductive hardening agent.”). It would have been obvious for one of ordinary skill in the art before the effective filling date of the claimed invention to have modified the connection between the substrate with a light emitted portion to the cavity in modified Yamanaka to be secured via a bonding member as taught by Park.
One of ordinary skill in the art would have been motivated to make this modification in order to gain the advantage of specifically stating what type of adhering material is used, as Yamanaka discloses adhering the substrate but does not specifically mention the material, where the conductive hardening agent from Park allows a user to understand how the two pieces are adhered together, as stated by Park, Section 5, lines 12-14, “And, the light emitting device 360 is combined by a bonding member, such as a heat conductive hardening agent, when it is mounted on the metal base 350.”.
Regarding claim 12, modified Yamanaka teaches the apparatus according to claim 10, as set forth above, discloses a thermal radiation light source comprising: the thermal radiation element module (Yamanaka, Section 19, lines 55-56, “first heat sink 20, the semiconductor light-emitting element 10”, where light source releases thermal radiation, Section 20, lines 4-8, “the semiconductor light-emitting device 580 of the second embodiment can efficiently dissipate Joule heat from the semiconductor light-emitting element 10 to the outside the semiconductor light-emitting device 580.”).
Claims 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yamanaka et al. (US 9203213 B2, hereinafter Yamanaka) in view of Watabe et al. (JP 2010236934 A, hereinafter Watabe) and Roh (KR 20180029409 A) in further view of Park (US 8878200 B2) and Mi (CN 211480084 U).
Regarding claim 11, modified Yamanaka teaches the apparatus according to claim 10, as set forth above.
Modified Yamanaka does not disclose:
wherein in a case where an opening portion of the cavity is viewed in a planar view, the opening portion includes the thermal radiation element, the opening portion is sealed by an optical window having translucency, and pressure inside the cavity is lower than pressure outside the cavity.
However, Park discloses where the cavity when view from planar view has an opening where the thermal radiation element is placed (Section 6, lines 53-54, “light emitting device 360a is placed in a removal region B from which the metal base 350a is removed.”) and where the opening portion includes an optical window having translucency (Section 6, lines 58-59, “top surface of the lens portion 310a establishes equilibrium”). It would have been obvious for one of ordinary skill in the art before the effective filling date of the claimed invention to have modified the cavity in modified Yamanaka to be structure as taught by Park.
One of ordinary skill in the art would have been motivated to make this modification in order to gain the advantage of allowing for the light emission efficiency to be increased, as the cavity position allows for light to be directed upwards, as stated by Park, Section 7, lines 34-39, “Namely, in a case where the light emitting device 360a light emits within the cylindrical recess B, the inclined surface of the metal base 350a reflects almost all of the light upward, and thus the light emission efficiency of the light emitting device 360 can be increased.”.
Further, Mi discloses, in the similar field of radiation emitting elements (Abstract, “ultraviolet LED device”), where the glass cover seals the cavity in to create a vacuum with the thermal radiation element inside (Page 5, last Para., “ultraviolet LED chip 3 light emitting process, the ultraviolet LED chip 3 will appear heating phenomenon, and the light transmission component 4, the annular bracket 2 and the base component 1 of the air in the sealed space to generate chemical reaction to be corroded. Therefore, in the actual application, the sealed cavity can be vacuumized”). It would have been obvious for one of ordinary skill in the art before the effective filling date of the claimed invention to have modified the glass cover in modified Yamanaka to create a vacuum sealed cavity as taught by Mi.
One of ordinary skill in the art would have been motivated to make this modification in order to gain the advantage being able to reduce the possibility of corrosion to the light emitting device, where the LED would correspond to the light-emitting element from Yamanaka, Page 5, last Para., “Therefore, in the actual application, the sealed cavity can be vacuumized, or when assembling the ultraviolet LED device, it can be carried out in the similar vacuum environment, so as to reduce the possibility of corrosion of ultraviolet LED device.”.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Blomberg et al. (US 5827438 A1, hereinafter Blomberg) discloses a similar substrate with two conductors, however the substrate is made from an insulator and not a semiconductor. Wang et al. (CN 109449237 A, hereinafter Wang) discloses a plasmonic perfect absorber, however an insulator between metal layers is not mentioned.
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KEVIN GUANHUA WEN whose telephone number is (571)272-9940 and whose email is kevin.wen@uspto.gov. The examiner can normally be reached Monday-Friday 9:00 am - 5:00 pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ibrahime Abraham can be reached on 571-270-5569. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/KEVIN GUANHUA WEN/Examiner, Art Unit 3761
12/23/2025
/IBRAHIME A ABRAHAM/Supervisory Patent Examiner, Art Unit 3761
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