DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 1/28/2026 has been entered.
The Examiner respectfully notes that the claims contain amendments not previously indicated. While such an amendment may not have been intended, the amendment is still present. On line 12 of Claim 1, the phrase “the chip includes a top surface” has changed to “the chip includes a top sur face.” Another similar issue is with the phrase “top surface” that has become “top sur face” on line 2 of the second to last paragraph. Such an amendment was not previously indicated. It is requested that applicant address this issue in the next response.
Response to Arguments
Applicant's arguments filed 1/28/2026 have been fully considered but they are not persuasive.
With regard to the arguments on pages 7-8 directed towards the previous 112 rejections,
The previous 112(a),(b) rejections are withdrawn in view of the instant amendments.
With regard to the arguments on pages 8-1 directed towards OTA et al. (OTA) (US 2021/0181241),
Applicant argues that OTA cannot be interpreted to include the new claim language because OTA does not show the entire of the magnetoresistive elements 21 and 31, but the Examiner respectfully disagrees. The issue here is that at applicant is claiming “areas” and “sections” of magnetoresistive elements without any limit, and the defines those element within each area or section to be in positional relationships as claimed. In light of applicant’s disclosure, applicant is selecting specific groups of elements and designating them as sections or areas of elements, and the prior art is therefore being interpreted in a similar manner. Because there is no restriction on how the sections or areas must be selected, groups of elements can be selected to meet the claim requirements, and where elements in these groups (areas/sections) are positioned in the manner claimed. For example, as argued, the claims do not require that all elements in any row be selected, such as all elements of magnetoresistive elements 21 and 31. Instead, applicant requires elements within the designated areas to be nearest a third side, as applicant expressly claims “in the first area, all of the plurality of first magnetoresistive elements are arranged in a plurality rows.” As such, any reference to rows for the first elements pertain to those “in the first area.” But, the first area is not required to include every possible element for any vertically extending column/row in any figure.
That stated, the Examiner further respectfully notes the figures may still be relied upon for all that they disclose, and it is reasonable to conclude that either those elements shown in Figures 11A-14 are all elements, of that more exist but that are the same as shown, just with more extending upwards/downwards. In that case, the exact same areas can be selected as shown, just extended up/down as necessary. As such, the Examiner respectfully disagrees.
Claim Objections
Claim 1 is objected to because of the following informalities:
As to Claim 1,
On line 12 of Claim 1, the phrase “the chip includes a top surface” has changed to “the chip includes a top sur face.” Another similar issue is with the phrase “top surface” that has become “top sur face” on line 2 of the second to last paragraph. These amendments raise an objection because the phrase “sur face” contains a typographical issue.
Appropriate correction is required.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-4, 6-9, 11, and 13 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by OTA et al. (US 2021/0181241).
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As to Claim 1,
OTA discloses A magnetic sensor comprising: a plurality of resistor sections (note the resistors of in the areas of YZ1-YZ4 such as those indicated above, where the first area for the above YZ1 section is an example area for each YZ section, and where the elements in each area are collectively considered a resistor section) each including a plurality of magnetoresistive elements (Figures 10A-14), (Paragraph [0112]); and a plurality of structural bodies (only those 2R,2L that include two or more magnetoresistive elements) each structured to cause the plurality of magnetoresistive elements to detect a specific component of a target magnetic field (Figure 11B), (Paragraph [0113] / note that like applicant, placing the sensing elements at a specific angle will control what specific of a magnetic field they will detect, which is noted in Paragraph [0118] which explains that by orienting the magnetic sensing elements in the disclosed manner, a three axis magnetic field detection device can be implemented), a power supply port (P3) (Paragraphs [0089],[0109]-[0112]), (Figures 7,10B); a ground port (P4) (Paragraphs [0089],[0109]-[0112]), (Figures 7,10B); a first output port (P1) (Paragraphs [0089],[0109]-[0112]), (Figures 7,10B); a second output port (P2) (Paragraphs [0089],[0109]-[0112]), (Figures 7,10B); and a chip (2) including the plurality of resistor sections, the plurality of structural bodies, the power supply port, the ground port, the first output port, and the second output port (see above figures / note the above noted chip must be a chip as the elements formed as part of it are formed using semiconductor manufacturing techniques, such as sputtering as mentioned in paragraph [0086]), (Paragraphs [0046],[0089]), (Figure 10A), wherein: the chip includes a top surface and a bottom surface that are positioned opposite to each other, a first side surface, a second side surface, a third side surface, and a fourth side surface that connect the top surface and the bottom surface (see above figures), (Figures 10A,11B / note the chip is a three dimensional object in a rectangular shape, and thus must include these features, and note 11B is cited to demonstrate that the chip has a top and bottom surface, where the top surface is the surface the MR elements are formed on), and an element layout area (see above figures) for laying out the plurality of magnetoresistive elements (Figure 10A); the first side surface and the second side surface are located at both ends of the chip in a first reference direction: the third side surface and the fourth side surface are located at both ends of the chip in a second reference direction orthogonal to the first reference direction (see above figures); the element layout area includes a plurality of areas (see above first area as example, but where there are four such areas) corresponding respectively to the plurality of resistor sections (Figure 11A), (Paragraph [0113] / note each area and resistor includes resistors within the above noted section/area, such as MRL1 and MRR1, and where the area, such as the above seen first area, for each YZ section are the respective plurality of resistor sections), the plurality of magnetoresistive elements are disposed dividedly in the plurality of areas (Figure 10A),(see above figures as an example of an area for YZ1 and where each of YZ1-YZ4 includes the same area as seen above); the plurality of areas are disposed to be arranged in the first reference direction (see above figures); the plurality of resistor sections include a first resistor section provided between the power supply port and the first output port (Figures 10B,11A), (see above figures / note the first resistor section corresponds to those elements in the first area as seen above for elements 21,31, and where these resistors in these combined areas include resistors between Vcc and P1 such as those in sensor element 21), a second resistor section provided between the ground port and the first output port (Figures 10B,12), (see above figures / note the second resistor section corresponds to those elements in the second area, similar to the above first area, for elements 22,32 similar to those seen above, and where these resistors in these combined areas include resistors between GND and P1 such as those in sensor element 22), a third resistor section provided between the ground port and the second output port (Figures 10B,13), (see above figures / note the third resistor section corresponds to those elements in the third area, similar to the above first area, for elements 23,33 similar to those seen above,, and where these resistors in these combined areas include resistors between GND and P2 such as those in sensor element 23), and a fourth resistor section provided between the power supply port and the second output port (Figures 10B,14), (see above figures / note the second resistor section corresponds to those elements in the fourth area, similar to the above first area, for elements 24,34 similar to those seen above, and where these resistors in these combined areas include resistors between Vcc and P2 such as those in sensor element 24), the plurality of magnetoresistive elements include a plurality of first magnetoresistive elements (those elements from the first area of elements 21,31) (Paragraph [0113]), (Figure 11A), a plurality of second magnetoresistive elements (those elements from the second area of elements 22,32) (Paragraph [0115]), (Figure 12), a plurality of third magnetoresistive elements (those elements from the third area of elements 23,33) (Paragraph [0116]), (Figure 13), and a plurality of fourth magnetoresistive elements (those elements from the fourth area of elements 24,34) (Paragraph [0117]), (Figure 14): the first resistor section is constituted of only the plurality of first magnetoresistive elements (Figure 11A), (see above figure / the first resistor section is defined to be those elements in the first area for YZ1 as seen above); the second resistor section is constituted of only the plurality of second magnetoresistive elements (Figure 12), (see above figure / the second resistor section is defined to be those elements in the second area for YZ2 similar to the first area seen above for YZ1); the third resistor section is constituted of only the plurality of third magnetoresistive elements (Figure 13), (see above figure / the third resistor section is defined to be those elements in the third area for YZ3 similar to the first area seen above for YZ1); the fourth resistor section is constituted of only the plurality of fourth magnetoresistive elements (Figure 14), (see above figure / the fourth resistor section is defined to be those elements in the fourth area for YZ4 similar to the first area seen above for YZ1); the plurality of areas include a first area where all of the plurality of first magnetoresistive elements are disposed (see above figure / the first resistor section is defined to be those elements in the first area for YZ1 as seen above), a second area where all of the plurality of second magnetoresistive elements are disposed (Figure 12), (see above figure / the second resistor section is defined to be those elements in the second area for YZ2 similar to that seen above for the first area for YZ1), a third area where all of the plurality of third magnetoresistive elements are disposed (Figure 13), (see above figure / the third resistor section is defined to be those elements in the third area for YZ3 similar to that seen above for the first area for YZ1); and a fourth area where all of the plurality of fourth magnetoresistive elements are disposed (Figure 14), (see above figure / the fourth resistor section is defined to be those elements in the fourth area for YZ4 similar to that seen above for the first area for YZ1); an arrangement of the plurality of first magnetoresistive elements in the first area, an arrangement of the plurality of second magnetoresistive elements in the second area, arrangement of the plurality of third magnetoresistive elements in the third area, and an arrangement of the plurality of fourth magnetoresistive elements in the fourth area are same (Figures 11A-14), (see above figures / note the elements for each of the defined first-fourth areas are the same): in the first area, all of the plurality of first magnetoresistive elements are arranged in a plurality of rows (see above figures / note the rows are in the up/down direction for each area), each row extending in the second reference direction between the third side surface and the fourth side surface of the chip (see above figures), and the plurality of rows arranged along the first reference direction (Figure 10A), (see above marked up figures / note the rows of elements within the areas such as YZ1 are being interpreted to extend from the top to the bottom of the chip for the purpose of compact prosecution); the plurality of rows include a first row disposed at position nearest to the first side surface of the chip and a second row adjoining the first row (see above figures) and the first row and the second row have a predetermined gap there-between, in the first reference direction (see above figures); the plurality of first magnetoresistive elements include a first specific magnetoresistive element and a second specific magnetoresistive element (see above figures / note the top element in each row is the respective first and second specific magnetoresistive element), the first specific magnetoresistive element is disposed at a position nearest to the third side of the surface of the chip in the first row (see above figures), the second specific magnetoresistive element is disposed at a position nearest to the third side surface of the chip in the second row(see above figures), each of the structural bodies extends such that, an acute angle that each of the structure bodies forms with respect to the second reference direction is larger than an acute angle that each of the structural bodies forms with respect to a first direction ( (Figure 11A), (see above figures), wherein the first direction is defined as follows: a center of gravity of the first specific magnetoresistive element as viewed in a direction perpendicular to the top surface of the chip is referred to as a first center of gravity (see above figures), a center of gravity of the second specific magnetoresistive element as viewed in the direction perpendicular to the top surface of the chip is referred to as a second center of gravity (see above figures), and a direction parallel to a direction from the first center of gravity to the second center of gravity is referred to as the first direction (see above figures), and the plurality of structural bodies include a structural body extending across at least two of the first area, the second area, the third area, and the fourth area see above figures / note the inclined areas 2R and 2L extend beyond each area as seen above and in Figure 11A).
(Note: Applicant does not place any limitation on how the areas or sections are defined, and in light of the disclosure, the above interpretation is reasonable because areas and sections have been selected that reasonably encompass magnetoresistors in a similar manner as applicant. Also note that the above element area from the first figure is merely shown as an example of the area to generally show the area, but that this area is intended to conform with the more specific areas shown with regard to the first area above (or respective second-fourth areas) indicated in the marked up figure above.)
As to Claim 2,
OTA the first direction is a direction intersecting with each of the first reference direction and the second reference direction (see above figures / note that this direction will intersect both the first and second reference direction).
As to Claim 3,
OTA discloses an angle formed by the first reference direction and the first direction is an acute angle (see above figures / note that an angle between the first reference direction, which is in the left/right direction, and the first direction will be acute as the first direction forms an angle less than 90 degrees with respect to the first direction).
As to Claim 4,
OTA discloses the plurality of magnetoresistive elements are disposed such that two or more magnetoresistive elements are arranged along each of the plurality of structural bodies (Figures 10A,11A).
As to Claim 6,
OTA discloses wherein the plurality of structural bodies include a plurality of inclined surfaces each inclined relative to a reference plane parallel to the first reference direction and the second reference direction (Figures 10A,11A), (Paragraph [0113]).
As to Claim 7,
OTA discloses the plurality of magnetoresistive elements are disposed such that two or more magnetoresistive elements are arranged on each of the plurality of inclined surfaces (Figures 10A,11A / note only those structure bodies, and thus inclined surfaces, that include two or more magnetoresistive elements are considered the bodies or surfaces for the purpose of the claim language).
As to Claim 8,
OTA discloses a dimension of the element layout area in the first reference direction is greater than a dimension of the element layout area in the second reference direction (see above figures and note that like applicant, the element layout area of OTA is rectangular with the long dimension in the first reference direction).
As to Claim 9,
OTA discloses a dimension of each of the plurality of areas in the first reference direction is smaller than a dimension of each of the first area, the second area, the third area, and the fourth area in the first reference direction (see above figures and note that the dimension of each of the plurality of areas in the first reference direction (left/right direction) is smaller than a dimension in the second reference direction (up/down direction).
As to Claim 11,
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OTA discloses each of the plurality of structural bodies includes a first end portion (left end) and a second end portion (right end) located at both ends of the each structural body in a longitudinal direction and a third end portion (top end) and a fourth end portion (bottom end) located at both ends of the each structural body in a short direction (Note each element MRR1 and MRL1 as seen in Figure 11A, for example, has a top, bottom, left, and right end that can be said to be the above end portions), the plurality of areas include a first specific area and a second specific area (see above figures / note that the above areas are examples), a center of gravity of the first specific area and a center of gravity of the second specific area are displaced from each other by a gap between (1) a third end portion of one of two adjoining structural bodies of the plurality of structural bodies and (ii) a third end portion of the other of the two adjoining structural bodes in the second refence direction (Figures 10A, 11A, 11B / note that OTA discloses similarly inclined structures along a similar tilted angle with respect to the X axis as applicant, and therefore if applicant can state that such a feature is disclosed by applicant’s structures, then OTA can also reasonably be said to disclose such a feature, and because any two third end portions between adjoining structural bodies located above and below the first and second specific areas can be selected to meet the above claim limitation).
As to Claim 13,
OTA discloses wherein the first specific magnetoresistive element is positioned nearer to the third side surface of the chip than the second specific magnetoresistive element is positioned, in the second reference direction (see above figures / note the topmost element in the area including leftmost row is closer to the third side surface than the topmost element in the above defined area for the second row).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DAVID M. SCHINDLER whose telephone number is (571)272-2112. The examiner can normally be reached 8am-4:30pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lee Rodak can be reached at 571-270-5628. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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DAVID M. SCHINDLER
Primary Examiner
Art Unit 2858
/DAVID M SCHINDLER/Primary Examiner, Art Unit 2858