Prosecution Insights
Last updated: October 27, 2026
Application No. 17/951,134

LIGHT EMITTING ELEMENT, LIGHT EMITTING ELEMENT ARRAY, LIGHT EMITTING COMPONENT, OPTICAL DEVICE, AND OPTICAL MEASUREMENT APPARATUS

Final Rejection §102§112
Filed
Sep 23, 2022
Priority
Mar 28, 2022 — JP 2022-052355
Examiner
TOBERGTE, NICHOLAS J
Art Unit
2817
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Fujifilm Holdings Corporation
OA Round
2 (Final)
95%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
97%
With Interview

Examiner Intelligence

Grants 95% — above average
95%
Career Allowance Rate
873 granted / 923 resolved
+26.6% vs TC avg
Minimal +2% lift
Without
With
+2.2%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 9m
Avg Prosecution
17 currently pending
Career history
951
Total Applications
across all art units

Statute-Specific Performance

§101
1.9%
-38.1% vs TC avg
§103
40.6%
+0.6% vs TC avg
§102
28.9%
-11.1% vs TC avg
§112
12.2%
-27.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 923 resolved cases

Office Action

§102 §112
DETAILED ACTION This action is responsive to communication filed 01/30/2026. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of Species 1 in the reply filed on 01/30/2026 is acknowledged. Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Information Disclosure Statement The information disclosure statements (IDS) submitted on 09/23/2022, 01/28/2026, and 04/29/2026 are acknowledged. The submissions are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner. Claim Objections Claim 17 is objected to because of the following informalities: the term “light emitting component” has been used to refer to both the combination of all elements in the claim and to a single element of the claim. For the purposes of examination the combination of all elements in the claim will be referred to as a “light emitting device” and the single element will continue to be referred to as a “light emitting component”. Appropriate correction is required. Claim 18 is objected to because of the following informalities: the limitation requiring the layer through which the current flows from the electrode being in contact with the transfer thyristor has “a higher resistance than the low resistance layer” is not further limiting as claim 17 from which 18 depends already requires the low resistance layer to have a resistance lower than the layer through which the current flows from the electrode being in contact with the transfer thyristor. For the purposes of examination claim 18 has been interpreted as solely having the limitation “wherein the layer through which the current flows from the electrode being in contact with the transfer thyristor is a semiconductor layer”. Appropriate correction is required. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 18-19 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claims 18-19 recite the limitation "the light emitting component". There is insufficient antecedent basis for this limitation in the claims. For the purposes of examination the examiner will interpret the limitation to be drawn to the combination of elements defined as a “light emitting device” as defined in Claim Objections above. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-8 and 14-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kondo et al. (US 20200244039 A1). Regarding claim 1, Kondo et al. (see, e.g., FIG. 3) discloses a light emitting element (LD/S11) comprising: a substrate (80); a light emitting unit that is laminated on the substrate (LD, 86, 87, 88, and paragraph [0072]); and a thyristor (S, 81, 82, 83, 84, 89, and paragraph [0070]) that is laminated on the light emitting unit and performs setting so as to cause the light emitting unit to emit light or increase an amount of emitted light by being turned into an ON state (paragraph [0058]), the thyristor having a low resistance layer (85) with a resistance which does not electrically separate the thyristor at a position where a current flows from an electrode (92 and 321) being in contact with the thyristor (See Fig. 7C and paragraph [0137] where it is shown that current through 85 is nonzero when a voltage differential is present, thus not electrically separating the thyristor from the electrode) . (Note: Applicant’s Specification does not provide a specific definition for the terms “contact” or “laminated on”. Thus, the broadest reasonable interpretation of the term could be indirect contact via an intervening surface.) Regarding claim 2, Kondo et al. discloses the light emitting element according to claim 1, wherein: a signal (ϕI) for controlling the ON state and an OFF state of the thyristor is supplied to the electrode (paragraphs [0051] and [0096]). Regarding claim 3, Kondo et al. (see, e.g., FIG. 3) discloses the light emitting element according to claim 1, further comprising: a supply electrode (75) that supplies a current for light emission to the light emitting unit. Claim 4 is similarly rejected as claim 3 above. Regarding claim 5, Kondo et al. discloses the light emitting element according to claim 1, wherein: the low resistance layer is a p-type semiconductor layer (85b) and has an impurity concentration of 1 x 1019/cm3 or more and 1 x 1021/cm3 or less (paragraph [0160]: “1x1020/cm3”). Claims 6-8 are similarly rejected as claim 5 above. Regarding claim 14, Kondo et al. (see, e.g., FIG. 2) discloses a light emitting element array (LD/S11-LD/S44) comprising: a plurality of light emitting elements according to claim 1, wherein: the thyristor included in each of the plurality of light emitting elements is connected via a connection part (301 and paragraphs [0042] and [0097]), and the electrode is disposed on the connection part. Regarding claim 15, Kondo et al. (see, e.g., FIG. 3) discloses a light emitting element array comprising a plurality of light emitting elements according to claim 1, wherein: the electrode between the plurality of light emitting elements is shared (see Fig. 3: while each LD/S has a unique electrode portion 321, electrode portion 92 is shared between at least LD/S11 and LD/S12). Regarding claim 16, Kondo et al. (see, e.g., FIGS. 1, 2, and 8) discloses the light emitting element array according to claim 14, wherein: a plurality of light emitting element groups (Fig. 1: #1-#4) each having the plurality of light emitting elements (Fig. 2: LD/S11-LD/S44) are arranged, and the thyristor included in the light emitting elements of each light emitting element group of the plurality of light emitting element groups is turned on at different time in each light emitting element group (see Fig. 8 and paragraph [0168]). Regarding claim 17, Kondo et al. (see, e.g., FIGS. 1-3) discloses a light emitting device (Fig. 2: 10) comprising: a substrate (Fig. 3: 80); a plurality of light emitting components (Fig. 1: LD11-LD44 and Fig. 3: 86, 87, 88, and paragraph [0072]) that are laminated on the substrate; a plurality of setting thyristors (Fig. 1: S11-S44 and Fig. 3: 81, 82, 83, 84, 89, and paragraph [0070]) that are each laminated on the plurality of light emitting components and perform setting such that the light emitting components emit light or increase an amount of emitted light by being turned into an ON state (paragraph [0058]); and a plurality of transfer thyristors (Fig. 1: T1-T4) that are connected to each of the plurality of the setting thyristors and sequentially transfer the ON state so as to enable the connected setting thyristor to shift to the ON state (paragraph [0058]), wherein a low resistance layer (Fig. 3: 85) with a resistance lower than a resistance of a layer (Fig. 3: 81) through which a current flows from an electrode (Fig. 3: 92 and 322) being in contact with a transfer thyristor is provided at a position where a current flows from an electrode (Fig. 3: 92 and 321) being in contact with the setting thyristor (see paragraphs [0156] and [0160], where both 81 and 8 are extrinsic semiconductors of the same material resistivity is inversely proportional to doping concentration and 85 has a higher doping concentration than 81). Regarding claim 18, Kondo et al. discloses the light emitting device according to claim 17, wherein: the layer through which the current flows from the electrode being in contact with the transfer thyristor is a semiconductor layer (paragraph [0156]). Regarding claim 19, Kondo et al. (see, e.g., FIG. 14) discloses an optical device (30) comprising: the light emitting device according to claim 17 (10); and an optical element (LZ and paragraphs [0218]-[0220]) that sets a direction or a spread angle of light emitted from each light emitting element group (#1-#9) in a plurality of light emitting element groups included in the light emitting device to a predetermined direction or a predetermined spread angle. Regarding claim 20, Kondo et al. (see, e.g., FIG. 15) discloses an optical measurement apparatus (1) comprising: the optical device according to claim 19 (30); a light receiving unit (11) that receives reflected light from a target object (13) irradiated with light from the optical device; and a processing unit (12) that processes information about light received by the light receiving unit to measure a distance from the optical device to the target object or a shape of the target object (paragraph [0224]). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to AIDAN D BANKLER whose telephone number is (571)272-0883. The examiner can normally be reached Monday through Thursday 7:00-5:00. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kretelia Graham can be reached at (571)272-5055. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /AIDAN D BANKLER/Examiner, Art Unit 2817 /NICHOLAS J TOBERGTE/Primary Examiner, Art Unit 2817
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Prosecution Timeline

Sep 23, 2022
Application Filed
May 14, 2026
Non-Final Rejection mailed — §102, §112
Aug 05, 2026
Response Filed
Oct 23, 2026
Final Rejection mailed — §102, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
95%
Grant Probability
97%
With Interview (+2.2%)
1y 9m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 923 resolved cases by this examiner. Grant probability derived from career allowance rate.

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