Prosecution Insights
Last updated: August 06, 2026
Application No. 17/951,809

APPARATUS AND METHOD FOR CONVERSION BETWEEN ANALOG AND DIGITAL DOMAINS WITH A TIME STAMP

Non-Final OA §103
Filed
Sep 23, 2022
Priority
Sep 16, 2010 — provisional 61/403,480 +7 more
Examiner
CADEAU, WEDNEL
Art Unit
2632
Tech Center
2600 — Communications
Assignee
Benjamin J Sheahan
OA Round
7 (Non-Final)
72%
Grant Probability
Favorable
7-8
OA Rounds
0m
Est. Remaining
91%
With Interview

Examiner Intelligence

Grants 72% — above average
72%
Career Allowance Rate
388 granted / 543 resolved
+9.5% vs TC avg
Strong +19% interview lift
Without
With
+19.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
29 currently pending
Career history
583
Total Applications
across all art units

Statute-Specific Performance

§101
2.1%
-37.9% vs TC avg
§103
76.2%
+36.2% vs TC avg
§102
4.7%
-35.3% vs TC avg
§112
15.8%
-24.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 543 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Prior arts cited in this office action: Schweitzer, III et al. (US 20030200038 A1, hereafter “Schweitzer”) Rieser et al. (US 20010034223 A1, hereinafter “Rieser”) Lee et al. (US 6546063 B1, hereinafter “Lee”) Harthcock et al. (US 5809397 A, hereinafter “Harthcock”) Ueno et al. (US 6486922 B1, hereinafter “Ueno”) Delagnes (US 20100026545 A1, hereinafter “Delagnes”) Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 07/06/2026 has been entered. Claim Objections Claim 21 is objected to under 37 CFR 1.75 as being a substantial duplicate of claim 1. When two claims in an application are duplicates or else are so close in content that they both cover the same thing, despite a slight difference in wording, it is proper after allowing one claim to object to the other as being a substantial duplicate of the allowed claim. See MPEP § 608.01(m). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 1, 11 and 20-21 are rejected under 35 U.S.C. 103 as being unpatentable over Schweitzer, III et al. (US 20030200038 A1, hereafter “Schweitzer”) in view of Harthcock et al. (US 5809397 A, hereinafter “Harthcock”) and in view of Ueno et al. (US 6486922 B1, hereinafter “Ueno”). Regarding claims 1, 11, 20 and 21: Schweitzer teaches a method for converting an analog channel input to a digital data (Schweitzer [0013]-[0016], figs. 1 and 2, where Schweitzer teaches a method and system for converting an analog signal into a digital signal) comprising: receiving the analog channel input for conversion to the digital data, the digital data having at least one bit (Schweitzer [0013]-[0016], [0035], figs. 1-2 and 4, where Schweitzer teaches receiving an analog signal from channel (12) and a time stamp (fs) from time synch (28) or (20) that is driven by a local clock or GPS receiver); receiving a defined absolute reference time stamps (Schweitzer [0013]-[0016], [0035], figs. 1-2 and 4, where Schweitzer teaches receiving an analog signal from channel (12) and a time stamp (fs) from time synch (28) or (20) that is driven by a local clock or GPS receiver which provides a series of time considered the absolute time stamp); and converting the analog channel input to the digital data (Schweitzer [0013]-[0016], [0035]); wherein the defined absolute reference time stamp represents an absolute reference time associated with the converting the analog channel input to the digital data (Schweitzer [0013]-[0016], figs. 1 and 2, Where Schweitzer teaches converting the analog signal to digital data using the associated time stamp (fs). wherein the defined absolute reference time stamp is used to decrease an error associated with the digital data (Schweitzer [0015], [0021], [0035], where Schweitzer teaches using the absolute time reference to synchronize the clock with the sampling/or the converting of the analog signal to the digital signal, in other words to reduce error in the converting from analog to digital such that the obtained digital signal has reduce error). Schweitzer fails to explicitly teach wherein associating a defined absolute reference time stamp from the series of defined absolute reference time stamps with the converting the analog channel input to the digital data, wherein the defined absolute reference time stamp represents an absolute reference time of converting the analog channel input to the digital data; selecting one defined absolute reference time stamp from the series of defined absolute reference time stamps to be a selected defined absolute reference time stamp. However, Schweitzer teaches associating one of the appropriate times from a plurality of time stamps (fs) to sample the analog signal in order to convert it to digital signal and absolute time reference is used to provide timing (measurement phasor values) for the analog to digital convert, in this each fs or trigger is considered the absolute reference time stamp. The host computer 116 will parse the received data from several different devices communicating with it in the network, according to the time stamp and the sample number in each data packet. (Schweitzer [0002], [0015], [0021], [0024], [0032]-[0035], figs. 1-4). Furthermore, Harthcock teaches a method and apparatus for system synchronization in messaging system wherein using time division or alternatively it can further rely on an absolute time reference, such as an atomic clock or cesium clock, but preferably a GPS time stamp from a GPS receiver 27 is used to generate the timing information. Harthcock further teaches the time stamp associated with the signal can be received and used to generate a clock that is then used to sample the analog signal in the analog to digital converter to generate the digital signal. Harthcock teaches “a C-NET protocol has time marks that are embedded in the C-NET data stream. The C-NET stream consists of equal sized frames. The point in time that goes with each time mark is marked by a frame boundary and the time of day that goes with each time mark is encoded in the data stream in the frame(s) following the time mark frame boundary. (Harthcock col. 2 line 56- col. 3 line 45, col. 5 lines 31- lines 55, col. 7 line 35-col. 8 line 10). Therefore, it would have been obvious to one of ordinary skill in the art at the time of the effective filing date of the application to arrive at the invention as claimed, by associating a time stamp among a plurality of time stamps from a GPS device as the absolute time stamp to use in performing analog to digital conversion such that error can be corrected. Schweitzer in view of Hathcock teaches all the limitations of this claim except wherein the define absolute time stamp is encoded along with the digital data. However, Ueno teaches a digital transport stream obtained by multiplexing a digital video bit stream being frame-coded or field-coded, and a time stamp signal, comprising: de-multiplexing means for extracting the digital video bit stream and the time stamp signal from the digital transport stream; first clock reproducing means for reproducing a first clock signal from the time stamp signal (Ueno col. 2 lines 8-25, col. 5 lines 11-33). Therefore, taking the teachings of Schweitzer, Hathcock and Ueno as a whole, it would have been obvious to one of ordinary skill in the art at the time of the effective filing date of the application to encode the digital data stream with corresponding time stamps, in order to avoid sending two separate signal streams while allowing good signal stream decoding by transmitting the time stamp with the data stream. Claims 2-3 and 12-13 are rejected under 35 U.S.C. 103 as being unpatentable over Schweitzer, III et al. (US 20030200038 A1, hereafter “Schweitzer”) in view of Harthcock et al. (US 5809397 A, hereinafter “Harthcock”) in view of Ueno et al. (US 6486922 B1, hereinafter “Ueno”) and in view of Lee et al. (US 6546063 B1, hereinafter “Lee”). Regarding claims 2 and 12: Schweitzer in view of Hathcock and in view of Ueno teaches all the limitation of this claim except wherein a comparator receives the analog channel input for converting the analog channel input to the digital data. However, Lee teaches a data receiver equalization technique wherein incoming data pulse is received using comparators, for example comparator 201 and 202 (Lee col. 4 lines 39-63, figs. 1 and 2). Therefore, taking the teachings of Schweitzer, Harthcock and Lee as a whole, would have been obvious to one of ordinary skill in the art at the time of the effective filing date of the application to use a comparator in the system of Schweitzer for receiving the local analog input channel signal, in order to start receive signal when the incoming signal is at an amplitude greater than the noise floor and or allow for amplification of the difference to allow a better signal level that would facilitate further processing Regarding claims 3 and 13: Schweitzer in view of Harthcock, in view of Ueno and in view of Lee teaches wherein the comparator produces a comparator output received by a clock input of a positive edge-detecting flip flop and a clock input of a negative edge-detecting flip flop (Lee col. 4 lines 39-63, figs. 1 and 2). Claims 7-10 and 17-19 are rejected under 35 U.S.C. 103 as being unpatentable over Schweitzer, III et al. (US 20030200038 A1, hereafter “Schweitzer”) in view of Harthcock et al. (US 5809397 A, hereinafter “Harthcock”) in view of Ueno et al. (US 6486922 B1, hereinafter “Ueno”) and in view of Rieser et al. (US 20010034223 A1, hereinafter “Rieser”). Regarding claims 7 and 17: Schweitzer in view of Harthcock and in view of Ueno teaches all the limitations of this claim except wherein a counter is used to generate the defined absolute reference time stamp. However, Rieser teaches a method and system for providing location dependent and personal identification information to a public safety answering point where a global positioning system (GPS) receiver and a local clock, whose outputs are synchronized using a phase lock loop, together with a counter may be used to generate a binary time stamp (Rieser [0068], [0251], fig. 6). Therefore, taking the teachings of Schweitzer, Harthcock and Rieser as a whole it would have been obvious to one of ordinary skill in the art at the time of the effective filing date of the application to use a counter to generate the time stamps since Rieser shows that accurate time stamp can be generated using counter. Regarding claims 8 and 18: Schweitzer in view of Harthcock, in view of Ueno and in view of Rieser teaches wherein a cesium oscillator is used to generate the defined absolute reference time stamp (Riser [0322]). Regarding claims 9 and 19: Schweitzer in view of Harthcock in view of Ueno and in view of Rieser teaches wherein the series of the defined absolute reference time stamp is transmitted wirelessly (Schweitzer [0013]-[0016], figs. 1-3; Rieser [0068], [0251], fig. 6). Regarding claim 10: Schweitzer in view of Harthcock in view of Ueno and in view of Rieser teaches wherein the series of the defined absolute reference time stamp is transmitted via a wired connection (Schweitzer [0013]-[0016], [0034], figs. 2-5; Rieser [0068], [0251], fig. 6). Claim 22 is rejected under 35 U.S.C. 103 as being unpatentable over Schweitzer, III et al. (US 20030200038 A1, hereafter “Schweitzer”) in view of Harthcock et al. (US 5809397 A, hereinafter “Harthcock”) in view of Ueno et al. (US 6486922 B1, hereinafter “Ueno”) and in view of Lee et al. (US 6546063 B1, hereinafter “Lee”) and in view of Delagnes (US 20100026545 A1, hereinafter “Delagnes”). The combination above fails to explicitly teach wherein the converter transition comprises a transition of a comparator output signal generated by a comparator receiving the analog channel input, and wherein the selected defined absolute reference time stamp includes coarse time information from a running timestamp counter and fine time information from delay locked loop phases. However, as shown above Lee teaches a receiver is typically comprises a comparator and Delagnes teaches a timing generator comprising a delay lock loop that includes coarse timing and fine timing using delay circuitry (Delagnes [0011]-[0024], figs. 2a, 2b). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the application to use a comparator to receive the incoming analog signal and the timing generator to include a clock that generates a coarse time information and delay lock loop that generates fine timing information, in order to provide correct timing to sample and or convert the incoming signal. Allowable Subject Matter Claims 4-6, 14-16 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to WEDNEL CADEAU whose telephone number is (571)270-7843. The examiner can normally be reached Mon-Fri 9:00-5:00. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Chieh Fan can be reached at 571-272-3042. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /WEDNEL CADEAU/Primary Examiner, Art Unit 2632 July 9, 2026
Read full office action

Prosecution Timeline

Show 13 earlier events
Mar 14, 2025
Request for Continued Examination
Mar 18, 2025
Response after Non-Final Action
May 15, 2025
Non-Final Rejection mailed — §103
Oct 14, 2025
Response Filed
Jan 14, 2026
Final Rejection mailed — §103
Jul 06, 2026
Request for Continued Examination
Jul 07, 2026
Response after Non-Final Action
Jul 10, 2026
Non-Final Rejection mailed — §103 (current)

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Prosecution Projections

7-8
Expected OA Rounds
72%
Grant Probability
91%
With Interview (+19.4%)
2y 9m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 543 resolved cases by this examiner. Grant probability derived from career allowance rate.

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