Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of Claims
Claims 1, 3-13, 15, 17-20 are currently pending and claims 2, 14, and 16 are canceled in response to the claim amendments and remarks filed on 05/20/2026.
Response to Applicant’s Remarks
With respect to 35 U.S.C. §103 rejection:
Applicant’s claim amendments and remarks have been fully considered and are persuasive. Upon further consideration, see a new ground(s) of rejection as follows.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1, 3, 6-8, 10-12, and 15 is rejected under 35 U.S.C. 103 as being unpatentable over Distefano et al. (US-6,396,611-B1) in view of Aradhyula et al. (US 2020/0278652).
With respect to claims 1 and 8, Distefano teaches an input/output ("I/O") module (modular carrier (MC) unit including an interface unit of multiple connector slot equipment shelf 101 for housing a plurality of optical network units (ONUs) 102, fig.1 and col.1 lines 65-67 and col.2 lines 1-12), the I/O module comprising:
a plurality of channel circuits (plurality of ONUs, fig.1 and col.2 lines 1-12); and
an electronic processor (board controller of MC unit, col.1 lines 58-59) communicatively coupled to each channel circuit of the plurality of channel circuits via a corresponding dedicated hardware communication channel, wherein each channel circuit is electrically isolated from one another (each ONU is adapted for mounting into a separate connector slot to connect to the backplane card and arranged to receive the power and control signals from the MC unit, col.2 lines 4-7), the electronic processor configured to:
control a first power state for a first channel circuit included in the plurality of channel circuits by generating and transmitting a first control signal specific to the first channel circuit to the first channel circuit via a first dedicated hardware communication channel communicatively coupling the electronic processor to the first channel circuit; and control a second power state for a second channel circuit included in the plurality of channel circuits by generating and transmitting a second control signal to the second channel circuit via a second dedicated hardware communication channel communicatively coupling the electronic processor to the second channel circuit, wherein the first control signal is different from the second control signal (the board controller being responsive to the ONU present signal for (1) signaling the power unit to apply power to the connected ONU and (2) for sending control signals to connected ONU… each ONU connected into a separate connector slot to the backplane card and arranged to receive the power and control signals from the MC unit [Claim 1]; the at least one ONU includes a power filter unit for selectively controlling an application of power to itself [claim 2]; wherein the MC unit selectively controls the application of power to the at least one ONU [claim 7]).
With respect to claims 1 and 8, Distefano does not appear to teach that the plurality of channel circuits interfaces with industrial control equipment of an industrial system.
However, it is known by Aradhyula et al. (US 2020/0278652) to also teach of a system for providing remote channel reset for an input/output (“I/O”) module of industrial system (I/O module 104 of industrial process control and automation system 100, fig.1 and fig.3), the system and the I/O module (fig.1 and fig.3) comprising: a plurality of channel circuits (first I/O circuitry 302 and second I/O circuitry 304 of I/O module 104, fig.3 and [0049]) for interfacing with industrial control equipment of an industrial system (to drive different electrical signals to multiple [equipment] devices 102a-102b, [0049], of industrial process control and automation system 100, fig.1).
Because Aradhyula’s teaching is also directed to input/output ("I/O") module for a system (Aradhyula: I/O module 104 of industrial process control and automation system 100, fig.1 and fig.3; Distefano: fig.1, col.1 lines 65-67 and col.2 lines 1-12), it would have been obvious to one of ordinary skill in the art before the effective filing date to combine the teaching of the I/O module for interfacing with industrial control equipment of an industrial system as taught by Aradhyula with the I/O module as taught by Distefano for the purpose of communicating with the field devices over various I/O channels (Aradhyula: [0016]).
With respect to claims 3 and 12, Distefano and Aradhyula combined teaches wherein the electronic processor is configured to control the power state of the at least one channel circuit by disabling power to the at least one channel circuit, wherein the at least one channel circuit is unused by the industrial system (Distefano: it is interpreted when “each ONU connected into a separate connector slot to the backplane card and arranged to receive the power and control signals from the MC unit… wherein the at least one ONU includes a power filter unit for selectively controlling an application of power to itself” teaches the enabling and disabling power to each of the ONU [claims 1-2]; Aradhyula: Outputs from the comparators 320 can be provided to the DAC 318 and used to control the driving of the gates of the switches 306 and 308….the comparators 320 to be used to detect excessive voltages or currents being generated by the I/O circuitry 302 or 304 and to shut down the driving of the associated switch 306 or 308, [0048]).
With respect to claims 6 and 10, Distefano and Aradhyula combined teaches wherein the electronic processor is configured to control the power state for the at least one channel circuit in response to receiving a remote request from a user device (Aradhyula: user…to configure DI and AI channels associated with a single I/O terminal of an I/O module…the I/O module 104 receiving information indicating that the user…are going to couple DI and AI field devices 102, 102a-102b to the same electrical conductor 114 coupled to an I/O terminal 205 of an I/O module 104, [0063]).
With respect to claim 7, Distefano and Aradhyula combined teaches wherein the electronic processor is configured to control the power state for the at least one channel circuit in response to receiving a request automatically initiated by a ladder logic program associated with the I/O module (Aradhyula: programmable logic controllers 106 associated with the I/O module 104…to control the aspects of the industrial process, fig. 3 and [0025]; the module controller 310 receiving a digital/analog value to be output to a field device from a controller 106… to activate or deactivate the switch 308 to achieve the desired digital/analog state and communicate a digital/analog output value, [0070 and 0077]).
With respect to claim 11, Distefano and Aradhyula combined teaches wherein the electronic processor is configured to control the power state for the at least one channel circuit in response to receiving a request automatically initiated by an external logic program (Aradhyula: programmable logic controllers 106 is external to the I/O modules 104 to control the aspects of the industrial process, [0025, 0070, 0077]).
With respect to claim 15, Distefano teaches a method for providing remote channel reset for input/output ("I/O") modules (modular carrier (MC) unit including an interface unit of multiple connector slot equipment shelf 101 for housing a plurality of optical network units (ONUs) 102, fig.1 and col.1 lines 65-67 and col.2 lines 1-12), the method comprising:
providing a multichannel I/O module, the multichannel I/O module including an electronic processor (board controller of MC unit, col.1 lines 58-59), a first channel circuit and a second channel circuit (plurality of ONUs, fig.1 and col.2 lines 1-12), wherein the first channel circuit is controlled independently from the second channel circuit, wherein the first channel circuit is electrically isolated from the second channel circuit such that control of the first channel circuit does not interfere with control of the second channel circuit (each ONU is adapted for mounting into a separate connector slot to connect to the backplane card and arranged to receive the power and control signals from the MC unit, col.2 lines 4-7);
controlling, with an electronic processor communicatively coupled to the first channel circuit and the second channel circuit, a first power state specific to the first channel circuit via transmission of a first control signal to the first channel circuit using a first dedicated hardware communication channel communicatively coupling the electronic processor to the first channel circuit wherein the first dedicated hardware communication channel electrically isolates the first channel circuit from the second channel circuit such that the transmission of the first control signal does not interfere with the second channel circuit (the board controller being responsive to the ONU present signal for (1) signaling the power unit to apply power to the connected ONU and (2) for sending control signals to connected ONU… each ONU connected into a separate connector slot to the backplane card and arranged to receive the power and control signals from the MC unit [Claim 1]; the at least one ONU includes a power filter unit for selectively controlling an application of power to itself [claim 2]; wherein the MC unit selectively controls the application of power to the at least one ONU [claim 7]).; and
controlling, with the electronic processor, a second power state specific to the second channel circuit via transmission of a second control signal to the second channel circuit using a second dedicated hardware communication channel communicatively coupling the electrical processor to the second channel circuit, wherein the first dedicated hardware communication channel is different from the second dedicated hardware communication channel, and wherein the first control signal is different from the second control signal (the board controller being responsive to the ONU present signal for (1) signaling the power unit to apply power to the connected ONU and (2) for sending control signals to connected ONU… each ONU connected into a separate connector slot to the backplane card and arranged to receive the power and control signals from the MC unit [Claim 1]; the at least one ONU includes a power filter unit for selectively controlling an application of power to itself [claim 2]; wherein the MC unit selectively controls the application of power to the at least one ONU [claim 7])..
With respect to claim 15, Distefano does not appear to teach that the multichannel I/O module interfaces with industrial control equipment of an industrial system.
However, it is known by Aradhyula et al. (US 2020/0278652) to also teach of a system for providing remote channel reset for an input/output (“I/O”) module of industrial system (I/O module 104 of industrial process control and automation system 100, fig.1 and fig.3), the system and the I/O module (fig.1 and fig.3) comprising: a plurality of channel circuits (first I/O circuitry 302 and second I/O circuitry 304 of I/O module 104, fig.3 and [0049]) for interfacing with industrial control equipment of an industrial system (to drive different electrical signals to multiple [equipment] devices 102a-102b, [0049], of industrial process control and automation system 100, fig.1).
Because Aradhyula’s teaching is also directed to input/output ("I/O") module for a system (Aradhyula: I/O module 104 of industrial process control and automation system 100, fig.1 and fig.3; Distefano: fig.1, col.1 lines 65-67 and col.2 lines 1-12), it would have been obvious to one of ordinary skill in the art before the effective filing date to combine the teaching of the I/O module for interfacing with industrial control equipment of an industrial system as taught by Aradhyula with the I/O module as taught by Distefano for the purpose of communicating with the field devices over various I/O channels (Aradhyula: [0016]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 4-5, 9, 13, and 17-20 are rejected under 35 U.S.C. 103 as being unpatentable over Distefano et al. (US-6,396,611-B1) in view of Aradhyula et al. (US 2020/0278652) and further in view of Park Ho Kyun (KR 10-1940811-B1).
With respect to claims 4-5, 9, 13, and 17-20, Distefano and Aradhyula combined does not appear to teach performing a power reset cycle for the first channel circuit to clear a fault associated with the first channel circuit.
However, it is known by Park to teach of a remote channel reset for I/O modules of industrial systems (Park: a system to power reset each of multiple channels connected via a communication means, abstract and fig.1) wherein the power reset system can be implemented with conventional system having at least a plurality of channel circuits (Park: conventional system with module group 20, fig.2) for interfacing with industrial control equipment of an industrial system (Park: each of module group 1-N interfaces with equipment 500, fig.2 and p.5) and with an electronic processor (Park: conventional microprocessor 12 of controlling apparatus 10, fig.2) communicatively coupled to each channel circuit (Park: coupled to the module group 20, fig.2) via a dedicated hardware communication channel (Park: via RS-232 communication port to communication means RS-232 #1-2, fig.1 and p.7-8). Particularly, Park teaches the limitation “performing the power reset cycle to clear a fault in response to detecting a fault (a hardware fault and a software fault) associated with the at least one channel circuit” (Park: CPU, fig.1 and p.9; automatically recover a malfunction of the remote monitoring control device due to a failure occurring in a certain module of the equipment connected to the remote monitoring control device, p.2; power supply for resetting the power of each channel connected to the communication means when there is no response from the communication means, p.8; CPU performs power reset control to recover the fault when the predetermined time passes after the power-off, p.9; identifying the fault caused by faulty module constituting the equipment repairs or exchanges the fault, p.5; identifying the fault caused by malfunction of the remote monitoring and control apparatus itself, p.5).
Because Park is also directed to a I/O module for industrial systems (Park: fig.2; Aradhyula: fig.1; Distefano: fig.1, col.1 lines 65-67 and col.2 lines 1-12), it would have been obvious to one of ordinary skill in the art before the effective filing date to incorporate the teaching of remote channel reset for I/O modules of industrial systems as taught by Park with the control I/O module system as taught by Distefano and Aradhyula combined for the purpose of automatically recover a malfunction of the remote monitoring control device due to a failure occurring in a certain module of the equipment connected to the remote monitoring control device (Park: p.2).
Conclusion
The additional prior arts made of record and have not been relied upon are considered pertinent to applicant's disclosure as follows: US-5659680-A; Nakajima (US-2012/0047376-A1); US-20130085627-A1; US-20130124761-A1; US-20130241606-A1; US-20140265550-A1; and US-20160191418-A1.
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to HIEN (CINDY) D KHUU whose telephone number is (571)272-8585. The examiner can normally be reached on Monday-Friday 8a-8p.
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/HIEN D KHUU/Primary Examiner, Art Unit 2116 August 3, 2026
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