DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Obvious-type Double Patenting (ODP) Rejections
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory obviousness-type double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); and In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on a nonstatutory double patenting ground provided the conflicting application or patent either is shown to be commonly owned with this application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement.
Effective January 1, 1994, a registered attorney or agent of record may sign a terminal disclaimer. A terminal disclaimer signed by the assignee must fully comply with 37 CFR 3.73(b).
Claims 1-35 are rejected under the judicially created doctrine of obviousness-type double patenting as being unpatentable over claims 1-35 of U.S. Patent 12/379,927 hereinafter ‘927. Although the conflicting claims are not identical, they are not patentably distinct from each other. For example, Claims 1-35 of instant Application, respectively contain elements of claims 1-35 of the ‘927 as follows:
Claims
Instant
Claims
‘927
1, 8, 15, 22, 29
decode circuitry
an instance of
a single instruction
includes fields for
an opcode
an identification of
a location of
a 1st pack. data src operand
an identification of
a location of
a 2nd pack. data src operand
an identification of
a pack data dest. Operand
execution circuitry is to
perform for each
data element position of
the pack. data src operand
a floating point scale op.
a FP8 data element of
the first pack. data src by
multiplying
the data element by
a power of 2 value
a value of exponent of
the power if 2 value is
a floor value of
a FP8 data element of
upscaling
the 2nd pack. data source
store a result of
the floating point scale op.
downscaling
a corresponding data elem.
to execute
according to the opcode
1
decode circuitry
an instance of
a single instruction
includes fields for
an opcode
an identification of
a location of
a 1st pack. data src operand
an identification of
a location of
a 2nd pack. data src operand
an identification of
a pack data dest. Operand
execution circuitry is to
perform for each
data element position of
the pack. data src operand
a floating point scale op.
a BF16 data element of*
the first pack. data src by
multiplying
the data element by
a power of 2 value
a value of exponent of
the power if 2 value is
a floor value of
a BF16 data element of *
BF16**
the 2nd pack. data source
store a result of
the floating point scale op.
BF16**
a corresponding data elem.
to execute
according to the opcode
2, 9, 16, 23, 30
a vector register
2
a vector register
3, 10, 17, 24, 31
a memory location
3
a memory location
4, 11, 18, 25, 32
a round to nearest
even rounding mode
4
a round to nearest
even rounding mode
5, 12. 19, 26, 33
the floor value is
a zero
a denormal
5
the floor value is
a zero
a denormal
6, 13, 20, 27, 34
the 1st pack. data src
a zero
a denormal
6
the 1st pack. data src
a zero
a denormal
7, 14, 21, 28, 35
one or more fields for
a writemask register
7
one or more fields for
a writemask register
Claims 1-35 of ‘927 does not expressly disclose FP8 data element (instead they disclose *BF16 data elements). However, an applicant submitted prior art, a non-patent publication, Lee et al., “ISSCC 2019/Session 7/ Machine Learning /7.7” hereinafter Lee does disclose a FP8 data element (see Lee Column 1, Paragraph 2). At the time of the invention it would have been obvious to a person of ordinary skill in the art to interchange FP8 with BF16 data element or vice versa. The suggestion/motivation for doing so would have been to reduces external memory accesses and enhances throughput (see Lee Column 1, Paragraph 2).
** Upscaling FP8 would yield BF16 and downscaling BF32 would also yield BF16.
Allowable Subject Matter
Claims 1-35 would be allowable: 1) if rewritten or amended to overcome the rejection(s) under ODP set forth in this Office action; or 2) with a proper Terminal Disclaimer.
Response to Arguments
Applicant's arguments filed 4/22/2026 have been fully considered but they are not deemed to be persuasive.
Regarding the 35 U.S.C. §112, second paragraph problems, Applicant's response and amendments has overcome these rejections.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Hyun Nam whose telephone number is (571) 270-1725 and fax number is (571) 270-2725. The examiner can normally be reached on Monday through Friday 8:30 AM to 5:00 PM EST. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jyoti Mehta can be reached on (571) 270-3995. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/HYUN NAM/Primary Examiner, Art Unit 2183
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