DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on December 18, 2025 has been entered.
Response to Amendment
The Amendment filed December 18, 2025 has been entered. Claims 1-20 remain pending in the application.
Response to Arguments
Applicant’s arguments, see pages 7-9, filed December 18, 2025, with respect to the rejections of claims 1-20 under 35 U.S.C. § 103 have been fully considered and are persuasive. Therefore, the rejections have been withdrawn. However, upon further consideration, a new ground of rejection is made in view of newly found prior art reference Birner et al. (Patent Publication Number US 2017/0373138 A1), hereafter referred to as Birner.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-19 are rejected under 35 U.S.C. 103 as being unpatentable over An et al. (Patent Publication Number CN 104,124,924 A), hereafter referred to as An, in view of Wagh et al. (Patent Number US 9,716,477 B2), hereafter referred to as Wagh, further in view of Kwon et al. (Patent Publication Number DE 10 2015/108468 A1), hereafter referred to as Kwon, further in view of Then et al. (Patent Publication Number US 2020/0235216 A1), hereafter referred to as Then, and further in view of Birner.
Regarding claim 1, An discloses:
A power amplifier system (An, Fig. 3) comprising: a power amplifier (Fig. 3) configured to amplify the radio frequency signal (Paragraph 24, lines 1-3) with at least one complementary metal-oxide semiconductor transistor (Fig. 3, see transistors M1), the adaptation circuit (Fig. 3, M2 and M1a) configured to adapt the supply voltage to provide operating power to the power amplifier (Fig. 3, see connection between supply VDD and amplifying transistors M1 via M2 and M1a), the adaptation circuit including at least one field-effect-transistor (Fig. 3, M2) configured to generate the operating power in response to an increased swing of the supply voltage (Fig. 3, see connection between VDD amplifying transistors M1 via transistors M2) and at least one linearizing circuit (Fig. 3, M1a) configured to linearize an operation of the at least one field-effect-transistor (Paragraph 31, lines 1-3), but fails to disclose an envelope tracker configured to generate a supply voltage that changes in relation to an envelope of a radio frequency signal; and an adaptation circuit connected to the power amplifier with a plurality of copper pillars, [the adaptation circuit including at least one] Gallium Nitride [field-effect-transistor], the at least one Gallium Nitride field-effect-transistor having a Gallium Nitride layer positioned on a silicon layer connecting a source and a drain of the at least one Gallium Nitride field-effect-transistor that is on a die with the at least one complementary metal-oxide semiconductor transistor, the at least one Gallium Nitride field-effect-transistor separated from the at least one complementary metal-oxide semiconductor transistor by a through-silicon via.
However, Wagh teaches an envelope tracker (Wagh, Fig. 1, 180) configured to generate a supply voltage that changes in relation to an envelope of a radio frequency signal (Fig. 1, ETDR, see also Col. 11, lines 44-51); but fails to teach and an adaptation circuit connected to the power amplifier with a plurality of copper pillars, [the adaptation circuit including at least one] Gallium Nitride [field-effect-transistor], the at least one Gallium Nitride field-effect-transistor having a Gallium Nitride layer positioned on a silicon layer connecting a source and a drain of the at least one Gallium Nitride field-effect-transistor that is on a die with the at least one complementary metal-oxide semiconductor transistor, the at least one Gallium Nitride field-effect-transistor separated from the at least one complementary metal-oxide semiconductor transistor by a through-silicon via.
However, Kwon teaches teach and an adaptation circuit connected to the power amplifier with a plurality of copper pillars (Kwon, Fig. 1B, see connection between adaptation circuit 130 and the power amplifier transistor in substrate 200 via copper pillars 50), but fails to teach [the adaptation circuit including at least one] Gallium Nitride [field-effect-transistor], the at least one Gallium Nitride field-effect-transistor having a Gallium Nitride layer positioned on a silicon layer connecting a source and a drain of the at least one Gallium Nitride field-effect-transistor that is on a die with the at least one complementary metal-oxide semiconductor transistor, the at least one Gallium Nitride field-effect-transistor separated from the at least one complementary metal-oxide semiconductor transistor by a through-silicon via.
However, Then teaches [the adaptation circuit including at least one] Gallium Nitride [field-effect-transistor] (Then, Paragraph 37, lines 8-11 [see the usage of a Gallium Nitride transistor in a power amplifier in Fig. 4B]), the at least one Gallium Nitride field-effect-transistor having a Gallium Nitride layer (Paragraph 17, lines 3-5) positioned on a silicon layer (Paragraph 17, lines 3-6) connecting a source and a drain of the at least one Gallium Nitride field-effect-transistor (Paragraph 17, lines 6-8) that is on a die with the at least one complementary metal-oxide semiconductor transistor (Paragraph 71, lines 1-7), but fails to teach the at least one Gallium Nitride field-effect-transistor separated from the at least one complementary metal-oxide semiconductor transistor by a through-silicon via.
However, Birner teaches the at least one Gallium Nitride field-effect-transistor separated from the at least one complementary metal-oxide semiconductor transistor by a through-silicon via (Birner, Paragraph 57, lines 1-6).
An, Wagh, Kwon, Then, and Birner are all considered to be analogous to the claimed invention because they are in the same field of improving power amplifiers used in radio frequency communications. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have modified An to incorporate the teachings of Wagh, Kwon, Then, and Birner to include an envelope tracking system in the amplifier of An, which would have the effect of improving linearity of the power amplifier of An (Wagh, Col. 1, lines 53-57), to include the copper pillars of Kwon between the adaptation circuit and power amplifier of An, which would have the effect of dissipating excess heat (Kwon, Page 5, Paragraph 2, lines 2-7), to use the Gallium Nitride transistors of Then to implement the transistors of An, which would have the effect of further improving linearity of the power amplifier of An (Then, Paragraph 17, last four lines), and to include the through-silicon via of Birner in the circuit of An, which would have the effect of providing a well-known connection medium to connect two transistors (Birner, Paragraph 57, lines 1-6).
Regarding claim 2, An further discloses:
wherein the at least one Gallium Nitride field-effect-transistor is configured to provide the power amplifier with the operating power to operate the power amplifier (An, Fig. 3, see connection between VDD and amplifying transistors M1 via transistors M2) in a linear state that amplifies the radio frequency signal proportionally (Paragraph 5, lines 1-5 [amplifier of An is a linear amplifier configured to work in a linear state]).
Regarding claim 3, An further discloses:
wherein the at least one linearizing circuit is configured to compare the operating power with the supply voltage (An, Fig. 3, see connection between M1a, M1 and VDD).
Regarding claim 4, An further discloses:
wherein the at least one linearizing circuit includes a first linearizing transistor (An, Fig. 3, see T1 in modified Fig. 3 below) and a second linearizing transistor (Fig. 3, see T2 in modified Fig. 3 below).
PNG
media_image1.png
553
465
media_image1.png
Greyscale
Regarding claim 5, An fails to disclose:
wherein the first linearizing transistor and the second linearizing transistor are Gallium Nitride field-effect-transistors.
However, Then teaches wherein the first linearizing transistor and the second linearizing transistor are Gallium Nitride field-effect-transistors (Then, Paragraph 37, lines 8-11 [see the usage of a Gallium Nitride transistor in a power amplifier in Fig. 4B]).
An, Wagh, Kwon, Then, and Birner are all considered to be analogous to the claimed invention because they are in the same field of improving power amplifiers used in radio frequency communications. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have modified An to incorporate the teachings of Then to use the Gallium Nitride transistors of Then to implement the transistors of An, which would have the effect of further improving linearity of the power amplifier of An (Then, Paragraph 17, last four lines).
Regarding claim 6, An further discloses:
wherein the first linearizing transistor is configured to receive the supply voltage generated by the envelope tracker (An, Fig. 3, see connection between VDD and T1 in modified Fig. 3 above) and to provide a signal to the at least one Gallium Nitride field-effect-transistor (Fig. 3, see connection between T1 and G1 in modified Fig. 3 above) depending on a signal received from the second linearizing transistor (Fig. 3, see connection between T1 and T2 in modified Fig. 3 above).
Regarding claim 7, An further discloses:
wherein the second linearizing transistor is configured to generate a signal to be sent to the first linearizing transistor based on the operating power provided to the power amplifier (An, Fig. 3, see connection between T1, T2, and VDD in modified Fig. 3 above).
Regarding claim 8, An further discloses:
wherein the first linearizing transistor has a source connected to the envelope tracker (An, Fig. 3, see connection between source of T1 and VDD in modified Fig. 3 above), a drain connected to a gate of the at least one Gallium Nitride field-effect-transistor (Fig. 3, see connection between drain of T1 and gate of G1 in modified Fig. 3 above), and a gate connected to a gate of the second linearizing transistor (Fig. 3, see connection between gate of T1 and gate of T2 in modified Fig. 3 above).
Regarding claim 9, An further discloses:
wherein the second linearizing transistor has a drain connected to a gate of the second linearizing transistor (An, Fig. 3, see connection between drain and gate of T2), and a source connected to a source of the at least one Gallium Nitride field-effect-transistor (Fig. 3, see connection between source of T2 and source of G1 in modified Fig. 3 above).
Regarding claim 10, An discloses:
A radio frequency module (An, Fig. 3) comprising: a power amplifier (Fig. 3) configured to amplify the radio frequency signal (Paragraph 24, lines 1-3) with at least one complementary metal-oxide semiconductor transistor (Fig. 3, see transistors M1); the adaptation circuit (Fig. 3, M2 and M1a) configured to adapt the supply voltage to provide operating power to the power amplifier (Fig. 3, see connection between supply VDD and amplifying transistors M1 via M2 and M1a), the adaptation circuit including at least one field-effect-transistor (Fig. 3, M2) configured to generate the operating power in response to an increased swing of the supply voltage (Fig. 3, see connection between VDD amplifying transistors M1 via transistors M2) and at least one linearizing circuit (Fig. 3, M1a) configured to linearize an operation of the at least one field-effect-transistor (Paragraph 31, lines 1-3), but fails to disclose a packaging substrate configured to receive a plurality of components; and a power amplifier system implemented on the packaging substrate, the power amplifier system including an envelope tracker configured to generate a supply voltage that changes in relation to an envelope of a radio frequency signal; and an adaptation circuit connected to the power amplifier with a plurality of copper pillars, [the adaptation circuit including at least one] Gallium Nitride [field-effect-transistor], the at least one Gallium Nitride field-effect- transistor having a Gallium Nitride layer positioned on a silicon layer connecting a source and a drain of the at least one Gallium Nitride field-effect-transistor that is on a die with the at least one complementary metal-oxide semiconductor transistor, the at least one Gallium Nitride field-effect-transistor separated from the at least one complementary metal-oxide semiconductor transistor by a through-silicon via.
However, Wagh teaches a packaging substrate configured to receive a plurality of components (Wagh, Col. 64, lines 28-46); and a power amplifier system implemented on the packaging substrate (Col. 64, lines 28-46), the power amplifier system including an envelope tracker (Fig. 1, 180) configured to generate a supply voltage that changes in relation to an envelope of a radio frequency signal (Fig. 1, ETDR, see also Col. 11, lines 44-51); but fails to teach and an adaptation circuit connected to the power amplifier with a plurality of copper pillars, [the adaptation circuit including at least one] Gallium Nitride [field-effect-transistor], the at least one Gallium Nitride field-effect- transistor having a Gallium Nitride layer positioned on a silicon layer connecting a source and a drain of the at least one Gallium Nitride field-effect-transistor that is on a die with the at least one complementary metal-oxide semiconductor transistor, the at least one Gallium Nitride field-effect-transistor separated from the at least one complementary metal-oxide semiconductor transistor by a through-silicon via.
However, Kwon teaches teach and an adaptation circuit connected to the power amplifier with a plurality of copper pillars (Kwon, Fig. 1B, see connection between adaptation circuit 130 and the power amplifier transistor in substrate 200 via copper pillars 50), but fails to teach [the adaptation circuit including at least one] Gallium Nitride [field-effect-transistor], the at least one Gallium Nitride field-effect- transistor having a Gallium Nitride layer positioned on a silicon layer connecting a source and a drain of the at least one Gallium Nitride field-effect-transistor that is on a die with the at least one complementary metal-oxide semiconductor transistor, the at least one Gallium Nitride field-effect-transistor separated from the at least one complementary metal-oxide semiconductor transistor by a through-silicon via.
However, Then teaches [the adaptation circuit including at least one] Gallium Nitride [field-effect-transistor] (Then, Paragraph 37, lines 8-11 [see the usage of a Gallium Nitride transistor in a power amplifier in Fig. 4B]), the at least one Gallium Nitride field-effect-transistor having a Gallium Nitride layer (Paragraph 17, lines 3-5) positioned on a silicon layer (Paragraph 17, lines 3-6) connecting a source and a drain of the at least one Gallium Nitride field-effect-transistor (Paragraph 17, lines 6-8) that is on a die with the at least one complementary metal-oxide semiconductor transistor (Paragraph 71, lines 1-7), but fails to teach the at least one Gallium Nitride field-effect-transistor separated from the at least one complementary metal-oxide semiconductor transistor by a through-silicon via.
However, Birner teaches the at least one Gallium Nitride field-effect-transistor separated from the at least one complementary metal-oxide semiconductor transistor by a through-silicon via (Birner, Paragraph 57, lines 1-6).
An, Wagh, Kwon, Then, and Birner are all considered to be analogous to the claimed invention because they are in the same field of improving power amplifiers used in radio frequency communications. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have modified An to incorporate the teachings of Wagh, Kwon, Then, and Birner to implement the amplifier of An on a packaging substrate, which would have the effect of allowing good heat dissipation (Wagh, Col. 64, lines 38-42), to include an envelope tracking system in the amplifier of An, which would have the effect of improving linearity of the power amplifier of An (Wagh, Col. 1, lines 53-57), to include the copper pillars of Kwon between the adaptation circuit and power amplifier of An, which would have the effect of dissipating excess heat (Kwon, Page 5, Paragraph 2, lines 2-7), to use the Gallium Nitride transistors of Then to implement the transistors of An, which would have the effect of further improving linearity of the power amplifier of An (Then, Paragraph 17, last four lines), and to include the through-silicon via of Birner in the circuit of An, which would have the effect of providing a well-known connection medium to connect two transistors (Birner, Paragraph 57, lines 1-6).
Regarding claim 11, An fails to disclose:
wherein the radio frequency module is a front-end module.
However, Wagh further teaches wherein the radio frequency module is a front-end module (Wagh, Col. 8, lines 34-40).
An, Wagh, Kwon, Then, and Birner are all considered to be analogous to the claimed invention because they are in the same field of improving power amplifiers used in radio frequency communications. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have modified An to incorporate the teachings of Wagh to include the amplifier of An in a radio frequency front-end module, which would have the effect of providing a useful implementation for the amplifier of An (Wagh, Col. 8, lines 34-40).
Regarding claim 12, An further discloses:
wherein the at least one Gallium Nitride field-effect-transistor is configured to provide the power amplifier with the operating power to operate the power amplifier (An, Fig. 3, see connection between VDD and amplifying transistors M1 via transistors M2) in a linear state that amplifies the radio frequency signal proportionally (Paragraph 5, lines 1-5 [amplifier of An is a linear amplifier configured to work in a linear state]).
Regarding claim 13, An further discloses:
wherein the at least one linearizing circuit is configured to compare the operating power with the supply voltage (An, Fig. 3, see connection between M1a, M1 and VDD).
Regarding claim 14, An further discloses:
wherein the at least one linearizing circuit includes a first linearizing transistor (An, Fig. 3, see T1 in modified Fig. 3 below) and a second linearizing transistor (Fig. 3, see T2 in modified Fig. 3 below).
Regarding claim 15, An fails to disclose:
wherein the first linearizing transistor and the second linearizing transistor are Gallium Nitride field-effect-transistors.
However, Then teaches wherein the first linearizing transistor and the second linearizing transistor are Gallium Nitride field-effect-transistors (Then, Paragraph 37, lines 8-11 [see the usage of a Gallium Nitride transistor in a power amplifier in Fig. 4B]).
An, Wagh, Kwon, Then, and Birner are all considered to be analogous to the claimed invention because they are in the same field of improving power amplifiers used in radio frequency communications. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have modified An to incorporate the teachings of Then to use the Gallium Nitride transistors of Then to implement the transistors of An, which would have the effect of further improving linearity of the power amplifier of An (Then, Paragraph 17, last four lines).
Regarding claim 16, An further discloses:
wherein the first linearizing transistor is configured to receive the supply voltage generated by the envelope tracker (An, Fig. 3, see connection between VDD and T1 in modified Fig. 3 above) and to provide a signal to the at least one Gallium Nitride field-effect-transistor (Fig. 3, see connection between T1 and G1 in modified Fig. 3 above) depending on a signal received from the second linearizing transistor (Fig. 3, see connection between T1 and T2 in modified Fig. 3 above).
Regarding claim 17, An further discloses:
wherein the second linearizing transistor is configured to generate a signal to be sent to the first linearizing transistor based on the operating power provided to the power amplifier (An, Fig. 3, see connection between T1, T2, and VDD in modified Fig. 3 above).
Regarding claim 18, An further discloses:
wherein the first linearizing transistor has a source connected to the envelope tracker (An, Fig. 3, see connection between source of T1 and VDD in modified Fig. 3 above), a drain connected to a gate of the at least one Gallium Nitride field-effect-transistor (Fig. 3, see connection between drain of T1 and gate of G1 in modified Fig. 3 above), and a gate connected to a gate of the second linearizing transistor (Fig. 3, see connection between gate of T1 and gate of T2 in modified Fig. 3 above).
Regarding claim 19, An further discloses:
wherein the second linearizing transistor has a drain connected to a gate of the second linearizing transistor (An, Fig. 3, see connection between drain and gate of T2), and a source connected to a source of the at least one Gallium Nitride field-effect-transistor (Fig. 3, see connection between source of T2 and source of G1 in modified Fig. 3 above).
Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over Wagh in view of Kwon, An, Then, and Birner.
Regarding claim 20, Wagh discloses:
A mobile device (Wagh, Col. 14, lines 22-27) comprising: a transceiver configured to generate a radio frequency signal (Col. 48, lines 22-26); a power management system (Fig. 1, 180) including an envelope tracker (Fig. 1, 180) configured to generate a power amplifier supply voltage that changes is relation to an envelope of the radio frequency signal (Fig. 1, ETDR, see also Col. 11, lines 44-51); and a front end system (Col. 8, lines 34-40) including a power amplifier configured to amplify the radio frequency signal (Fig. 1, 100) with at least one complementary metal-oxide semiconductor transistor (Fig. 1, 115); the adaptation circuit (Fig. 1, 180) configured to adapt the power amplifier supply voltage to provide operating power to the power amplifier (Fig. 1, ETDR, see also Col. 11, lines 44-51), but fails to disclose and an adaptation circuit connected to the power amplifier with a plurality of copper pillars, the adaptation circuit including at least one Gallium Nitride field-effect-transistor configured to generate the operating power in response to an increased swing of the power amplifier supply voltage and at least one linearizing circuit configured to linearize an operation of the at least one Gallium Nitride field-effect-transistor, the at least one Gallium Nitride field-effect-transistor having a Gallium Nitride layer positioned on a silicon layer connecting a source and a drain of the at least one Gallium Nitride field-effect-transistor that is one a die with the at least one complementary metal-oxide semiconductor transistor, the at least one Gallium Nitride field-effect-transistor separated from the at least one complementary metal-oxide semiconductor transistor by a through-silicon via.
However, Kwon teaches and an adaptation circuit connected to the power amplifier with a plurality of copper pillars (Kwon, Fig. 1B, see connection between adaptation circuit 130 and the power amplifier transistor in substrate 200 via copper pillars 50), but fails to teach the adaptation circuit including at least one Gallium Nitride field-effect-transistor configured to generate the operating power in response to an increased swing of the power amplifier supply voltage and at least one linearizing circuit configured to linearize an operation of the at least one Gallium Nitride field-effect-transistor, the at least one Gallium Nitride field-effect-transistor having a Gallium Nitride layer positioned on a silicon layer connecting a source and a drain of the at least one Gallium Nitride field-effect-transistor that is one a die with the at least one complementary metal-oxide semiconductor transistor, the at least one Gallium Nitride field-effect-transistor separated from the at least one complementary metal-oxide semiconductor transistor by a through-silicon via.
However, An teaches the adaptation circuit including at least one field-effect-transistor (Fig. 3, M2) configured to generate the operating power in response to an increased swing of the power amplifier supply voltage (Fig. 3, see connection between VDD amplifying transistors M1 via transistors M2) and at least one linearizing circuit (Fig. 3, M1a) configured to linearize an operation of the at least one field-effect-transistor (Paragraph 31, lines 1-3), but fails to teach [the adaptation circuit including at least one] Gallium Nitride [field-effect-transistor], the at least one Gallium Nitride field-effect-transistor having a Gallium Nitride layer positioned on a silicon layer connecting a source and a drain of the at least one Gallium Nitride field-effect-transistor that is one a die with the at least one complementary metal-oxide semiconductor transistor, the at least one Gallium Nitride field-effect-transistor separated from the at least one complementary metal-oxide semiconductor transistor by a through-silicon via.
However, Then teaches [the adaptation circuit including at least one] Gallium Nitride [field-effect-transistor] (Then, Paragraph 37, lines 8-11 [see the usage of a Gallium Nitride transistor in a power amplifier in Fig. 4B]), the at least one Gallium Nitride field-effect-transistor having a Gallium Nitride layer (Paragraph 17, lines 3-5) positioned on a silicon layer (Paragraph 17, lines 3-6) connecting a source and a drain of the at least one Gallium Nitride field-effect-transistor (Paragraph 17, lines 6-8) that is one a die with the at least one complementary metal-oxide semiconductor transistor (Paragraph 71, lines 1-7), but fails to teach the at least one Gallium Nitride field-effect-transistor separated from the at least one complementary metal-oxide semiconductor transistor by a through-silicon via.
However, Birner teaches the at least one Gallium Nitride field-effect-transistor separated from the at least one complementary metal-oxide semiconductor transistor by a through-silicon via (Birner, Paragraph 57, lines 1-6).
Wagh, Kwon, An, Then, and Birner are all considered to be analogous to the claimed invention because they are in the same field of improving power amplifiers used in radio frequency communications. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have modified Wagh to incorporate the teachings of Kwon, An, Then, and Birner to include the copper pillars of Kwon between the adaptation circuit and power amplifier of Wagh, which would have the effect of dissipating excess heat (Kwon, Page 5, Paragraph 2, lines 2-7), to include the adaptation and linearization circuits of An in the amplifier of Wagh, which would have the effect of improving the linearity of the amplifier of Wagh (An, Paragraph 30, lines 6-9), to use the Gallium Nitride transistors of Then to implement the transistors of An, which would have the effect of further improving linearity of the power amplifier of Wagh (Then, Paragraph 17, last four lines), and to include the through-silicon via of Birner in the circuit of Wagh, which would have the effect of providing a well-known connection medium to connect two transistors (Birner, Paragraph 57, lines 1-6).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Folkmann et al. (Patent Publication Number US 2022/0368283 A1) discloses (Fig. 4) varying a supply voltage based on envelope tracking.
Wang et al. (Patent Publication Number CN 110,635,667 A) discloses (Fig. 2) varying a supply voltage based on envelope tracking.
Khesback et al. (Patent Publication Number US 2018/0331659 A1) discloses (Fig. 1) a power amplifier with an envelope tracking system formed on a packaging substrate.
Choo et al. (Patent Publication Number US 2018/0152144 A1) discloses (Fig. 7) a power amplifier with a variable supply voltage based on envelope tracking.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Lance T Bartol whose telephone number is (703)756-1267. The examiner can normally be reached Monday - Thursday 6:30 a.m. - 4:00 p.m. CT, Alternating Fridays 6:30 - 3:00.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Andrea Lindgren Baltzell can be reached at 571-272-5918. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/LANCE TORBJORN BARTOL/Examiner, Art Unit 2843
/ANDREA LINDGREN BALTZELL/Supervisory Patent Examiner, Art Unit 2843