DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Priority The present application, 17967797 filed 10/17/2022 is a Continuation of 17041801, filed 09/25/2020 ,now U.S. Patent # 11474784; 17041801 is a National Stage entry of PCT/IB2019/052112, international filing date: 03/15/2019; claims foreign priority to GB1813863.6, filed 08/24/2018; claims foreign priority to GB1804948.6, filed 03/27/2018. However, upon further review, the claims are not supported in GB1804948.6. Information Disclosure Statement The information disclosure statement (IDS) submitted on 11/02/2022, 04/06/2023, 01/07/2025 and 01/29/2025 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Drawings The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the following must be shown or the feature(s) canceled from the claim(s). No new matter should be entered. A. the encoder as specified in claim 20 B. the system comprising: a processor; and a memory as specified in claim 26 C . the non-transitory computer-readable storage medium as specified in claim 27 The drawings are objected to as failing to comply with 37 CFR 1.84(p)(5) because they include the following reference character(s) not mentioned in the description: 102, 104 and 510 . Corrected drawing sheets in compliance with 37 CFR 1.121(d), or amendment to the specification to add the reference character(s) in the description in compliance with 37 CFR 1.121(b) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Specification Applicant is reminded of the proper content of an abstract of the disclosure. A patent abstract is a concise statement of the technical disclosure of the patent and should include that which is new in the art to which the invention pertains. The abstract should not refer to purported merits or speculative applications of the invention and should not compare the invention with the prior art. If the patent is of a basic nature, the entire technical disclosure may be new in the art, and the abstract should be directed to the entire disclosure. If the patent is in the nature of an improvement in an old apparatus, process, product, or composition, the abstract should include the technical disclosure of the improvement. The abstract should also mention by way of example any preferred modifications or alternatives. Where applicable, the abstract should include the following: (1) if a machine or apparatus, its organization and operation; (2) if an article, its method of making; (3) if a chemical compound, its identity and use; (4) if a mixture, its ingredients; (5) if a process, the steps . Extensive mechanical and design details of an apparatus should not be included in the abstract. The abstract should be in narrative form and generally limited to a single paragraph within the range of 50 to 150 words in length. See MPEP § 608.01(b) for guidelines for the preparation of patent abstracts. The abstract of the disclosure is objected to because the invention is directed to a method, however, the abstract does not include the steps of the method. Appropriate correction is required. Claim Objections Claims 17 and 19-20 are objected to under 37 C.F.R. 1.71(a) which requires “full, clear, concise, and exact terms” as to enable any person skilled in the art or science to which the invention or discovery appertains, or with which it is most nearly connected, to make and use the same. The following should be corrected. A. In claim 17 line 2, “the file” should read “the data file” instead. Claim 19 recites a similar limitation in line 2 and is objected to for the same reason. B. In claim 20 lines 1-2, “different types of variables” should read “the different types of variables” instead because different types of variables is already introduced in claim 16 lines 11-12 from which the claim depends. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim s 16-27 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 16 recites “determining a mapping by determining a typed operation associated with the command; (iii) encoding a variable based on a type” in line 9-11. It is unclear how the type is related to the typed operation. The claim recites determining a mapping by determining a typed operation in (ii), however , (iii) performs the encoding based on a type and the type d operation is not used anywhere else in the subsequent steps. Therefore, it is unclear whether there is a relationship between steps (ii) and (iii), and if there is, it is unclear what is the relationship between steps (ii) and (iii). For purposes of examination, (iii) is interpreted as encoding a variable based on the typed operation. Claims 17-27 inherit the same deficiency as claim 16 by reason of dependence. Further, claim 16 recites “the command” in line 10. It is unclear whether this is supposed to be interpreted to refer to the command to serialise an arithmetic circuit recited in line 3 or to the command that corresponds to one or more executable instructions recited in lines 7-8. For purposes of examination, this is interpreted to refer to the command that corresponds to one or more executable instructions recited in lines 7-8. Claim 17 recite a similar limitation in line 3 and is rejected for the same reason. Claims 17-27 inherit the same deficiency as claim 16 by reason of dependence. Further, claim 16 recites “sequentially scanning through the data file to obtain further lines of the data file and processing the further lines according to steps ( i ) to (iv) until a final line of the data file is detected” in lines 14-16. It is unclear how the further lines can be sequentially scanned, obtained and processed. The claim recites sequentially scanning through the data file to obtain further lines of the data file and processing the further lines according to steps ( i ) to (iv), however, step ( i ) recites “scanning a first line”. Therefore, step ( i ) would always scan the first line and no further lines would be obtained . For purposes of examination, the sequentially scanning is interpreted to scan the next line at each iteration until the final line is detected. Claims 17-27 inherit the same deficiency as claim 16 by reason of dependence. Further, claim 16 recites “the data” in line 17. There is insufficient antecedent basis for this limitation in the claim. For purposes of examination, this is interpreted as data in the buffer. Claims 17-27 inherit the same deficiency as claim 16 by reason of dependence. Claim 19 recites “wherein detecting the final line of the data file comprises determining whether an end of the file has been reached by detecting whether a special end-of-file sequence of bits or characters has been reached”. A wherein clause is normally used to further limit a limitation that has been previously introduced. Therefore, it is unclear which detecting step the claim is referring to. Claim 16 recites sequentially scanning until a final line is detected, however, the claim does not positively recite a step of detecting the final line of the data file. For purposes of examination, this is interpreted as further comprising detecting the final line of the data file by determining whether an end of the file has been reached by detecting whether a special end-of-file sequence of bits or characters has been reached. Claim 20 recites “the encode r ” in line 3. There is insufficient antecedent basis for this limitation in the claim. For purposes of examination, this is interpreted as an encoder used for encoding the different types of variables. Claim 21 recites “ wherein encoding of header data, operator data, and wire identifier data each utilise different techniques such as arithmetic coding techniques for data encoding”. It is unclear whether the narrower range (i.e., arithmetic coding techniques for data encoding) is required because of the use exemplary claim language “such as”. See MPEP 2173.05(d) for more information. Further, it is unclear how the header data, operator data, and wire identifier data each utilize different coding techniques when only one coding technique is recited in the claim. For purposes of examination, this is interpreted as wherein encoding of header data, operator data, and wire identifier data each utilise different encoding techniques. Claim 23 recites “the command” in line 2. It is unclear whether this is supposed to be interpreted to refer to the command to serialise an arithmetic circuit recited in claim 1 line 3 or to the command that corresponds to one or more executable instructions recited in claim 1 lines 7-8. For purposes of examination, this is interpreted to refer to the command to serialise an arithmetic circuit recited in claim 1 line 3. Further, claim 23 recites “the serialised result of the arithmetic circuit” in line 2. There is insufficient antecedent basis for this limitation in the claim. There is no previous recitation of any serialized result. For purposes of examination, this is interpreted to refer to the serialised circuit recited in claim 1 line 18. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim s 16 -18, 20-21 and 2 4 -27 rejected under 35 U.S.C. 103 as being unpatentable over Covaci et al. (NPL – “ NECTAR: Non-Interactive Smart Contract Protocol using Blockchain Technology ”), hereinafter Covaci , in view of Pearson et al. (US 20050258982 A1), hereinafter Pearson, and Langdon (NPL – “ An Introduction to Arithmetic Coding ”). Langdon is cited in the IDS submitted on 04/06/2023. Regarding claim 16, Covaci teaches a method comprising: receiving a command to serialise an arithmetic circuit that represents a smart contract, wherein the command is an application programming interface (API) command that includes a reference to a data file that includes the arithmetic circuit to serialise ( Covaci Fig. 1 and page 3 section 3 first paragraph “NECTAR allows non-specialist programmers to compose smart contracts, outsource the contract execution to untrusted parties and publicly verify the correctness of the contract execution. As illustrated in Figure 1, the protocol consists of three main phases. In the setup phase, contracts are written in a formal language with precise semantics. Contracts expressed in such a language have a mathematically precise meaning and can be manipulated by software. A compiler/interpreter takes as input the source code and produces an arithmetic circuit C which consists of wires that carry values from a field F and connect to addition and multiplication gates”; command – command to take as input the source code and produce an arithmetic circuit C) : ( i ) scanning a first line of the data file including the arithmetic circuit, wherein each line of the data file that is read corresponds to a command that corresponds to one or more executable instructions ( Covaci page 5 section 3.2.3 “Line-by-line evaluation. Each source code line is analyzed independently. Local symbols, representing the internal declarations of identifiers, are included in the hierarchy of the global table of symbols. In more detail, this stage is responsible for the following tasks: ( i ) decoding of types, including the declaration of structures and array, elementary types (Booleans, integers, etc.) and pointers; (ii) decoding of expressions, e.g. unary or binary operations, constants, identifiers, data structures and function calls; (iii) evaluation of expressions, i.e. evaluation of (numeric) expressions which do not depend on the input values; (iv) memory allocation, i.e. temporary storage allocation for the data structures required by the contract functionality. This stage links all the statements of the arithmetic expression from a spatial (i.e. memory used) and temporal (i.e. operator precedence) point of view. A generic arithmetic/logic expression is collapsed in order to be represented in an explicit form, i.e. an arbitrary operator OP i+1 is applied to the expression after the operator OP i ”; page 4 section 3.2 “Our compiler is able to process a significant set of instructions natively supported by the C language, such as static initializers, global functions and block-scoped variables, arrays and structs, pointers, function calls, conditionals and loops, arithmetic and bit wise Boolean operators”) ; (ii) determining a mapping by determining a typed operation associated with the command ( Covaci page 5 section 3.3 “At this stage, the compiler is ready to make a one-to-one mapping between the operations used to generate the expression and the structures required to implement these functionalities on a circuit”; section 3.3.1 to section 3.3.8 discloses the different types of operations) ; (iii) encoding a variable based on a type, wherein different types of variables are encoded using a different number of bits ( Covaci page 3 section 2.2.2 “A quadratic arithmetic program (QAP) is a way of encoding arithmetic circuits … The very basic intuition for building a QAP is to encode the input-output correctness for each gate in the polynomials” ; section 3.3.1 to section 3.3.8 discloses how each operation, input and output are represented; section 3.2.2 discloses how the encoding table is generated; page 5 section 3.2.3 “ each output variable is expressed as a combination of logic and arithmetic operations applied on the input variables … The expression is used to create the arithmetic primitives required to represent the contract functionality”) ; and (iv) inserting the encoded variable into a buffer ; sequentially scanning through the data file to obtain further lines of the data file and processing the further lines according to steps ( i ) to (iii) (iv) until a final line of the data file is detected ( Covaci page 5 section 3.2.3 “Line-by-line evaluation. Each source code line is analyzed independently” ) ; and flushing the buffer to transfer the data to an output stream or file , thereby generating a serialised circuit ( Covaci page 3 section 3 “A compiler/interpreter takes as input the source code and produces an arithmetic circuit C which consists of wires that carry values from a field F and connect to addition and multiplication gates”; page 5 section 3.3 “the compiler is ready to make a one-to-one mapping between the operations used to generate the expression and the structures required to implement these functionalities on a circuit”; page 6 section 3.4 “The HLL compiler produces a circuit composed of arithmetic gates ”). Covaci does not explicitly teach (iii) encoding a variable based on a type, wherein different types of variables are encoded using a different number of bits ; (iv) inserting the encoded variable into a buffer ; sequentially scanning through the data file to obtain further lines of the data file and processing the further lines according to steps ( i ) to (iv) until a final line of the data file is detected; and flushing the buffer to transfer the data to an output stream or file , thereby generating a serialised circuit. However, on the same field of endeavor, Pearson discloses a system and method for arithmetic encoding where the encoded symbols are inserted in a buffer and flushing the buffer to transfer the content of the buffer to an output stream or file (Pearson Figs. 1-2 and paragraphs [0006, 0019] “The signal ENCBITS generally comprises a series of bits. The signal ENCBITS may comprise compressed and/or encoded data … For example, the signal ENCBITS may comprise arithmetic encoded data … The signal ENCBITS may be presented to an input 106 of an output buffer circuit 108 … The output buffer circuit 108 generally has an output 110 that may present a signal (e.g., BITSTREAM). The signal BITSTREAM generally comprises an encoded and/or compressed bit stream”). Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention, to modify Covaci using Pearson and include a buffer for temporarily storing each encoded variable until the final source code line is analyzed and to generate a compressed bit stream in response to the series of encoded variables (Pearson paragraph [0006]). Therefore, the combination of Covaci as modified in view of Pearson teaches (iii) encoding a variable based on a type, (iv) inserting the encoded variable into a buffer; sequentially scanning through the data file to obtain further lines of the data file and processing the further lines according to steps ( i ) to (iv) until a final line of the data file is detected; and flushing the buffer to transfer the data to an output stream or file, thereby generating a serialised circuit. Covaci does not explicitly teach wherein different types of variables are encoded using a different number of bits . However, on the same field of endeavor, Langdon discloses that arithmetic coding encodes different symbols using a different number of bits (Langdon page 135 right col bottom “Data compression results from encoding the more frequent symbols with short code-string length increases, and encoding the less-frequent events with long code length increases”; Table 2 shows different bit lengths for different symbols). Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention, to modify Covaci in view of Pearson using Langdon and encode the variables using arithmetic coding in order to compress the arithmetic circuit or output bitstream representing the arithmetic circuit (Pearson paragraphs [0001 , 0019] and Langdon abstract and introduction section). As discussed above, Pearson already discloses performing arithmetic coding and Langdon is merely providing evidence that arithmetic coding encodes different types of variables using a different number of bits. Therefore, the combination of Covaci as modified in view of Pearson and Langdon teaches (iii) encoding a variable based on a type, wherein different types of variables are encoded using a different number of bits. Regarding claim 17, Covaci as modified in view of Pearson and Langdon teaches all the limitations of claim 16 as stated above. Further, Covaci as modified in view of Pearson and Langdon teaches wherein scanning the file comprises obtaining a command from the first line or a next line of the data file and mapping the command to an underlying method ( Covaci page 5 section 3.2.3 and 3.3 “Line-by-line evaluation. Each source code line is analyzed independently … A generic arithmetic/logic expression is collapsed in order to be represented in an explicit form, i.e. an arbitrary operator OP i+1 is applied to the expression after the operator OP i … At this stage, the compiler is ready to make a one-to-one mapping between the operations used to generate the expression and the structures required to implement these functionalities on a circuit”). Regarding claim 18, Covaci as modified in view of Pearson and Langdon teaches all the limitations of claim 16 as stated above. Further, Covaci as modified in view of Pearson and Langdon teaches wherein inserting the encoded variable to the buffer is a command that writes a specific number of bits of data to the output stream (Pearson paragraph [0019] specific number of bits – number of bits of the arithmetic encoded variable). Regarding claim 20, Covaci as modified in view of Pearson and Langdon teaches all the limitations of claim 16 as stated above. Further, Covaci as modified in view of Pearson and Langdon teaches wherein different types of variables are encoded using a different number of bits based at least in part on a setting of the encoder (Langdon page 135 right col bottom and Table 2; Pearson Fig. 2 and paragraphs [0018-1109] encoder – circuit 100). Regarding claim 2 1 , Covaci as modified in view of Pearson and Langdon teaches all the limitations of claim 16 as stated above. Covaci does not explicitly teach wherein encoding of header data, operator data, and wire identifier data each utilise different techniques such as arithmetic coding techniques for data encoding . However, on the same field of endeavor, Langdon discloses different data coding techniques such as arithmetic coding techniques for data encoding (Langdon page 135 section 1 left col middle “Any data compression approach, whether employing arithmetic coding, Huffman codes, or any other coding technique, has a model which makes some assumptions about the data and the events encoded”). Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention, to modify Covaci in view of Pearson and Langdon and utilize different data coding techniques for encoding of the header data, operator data, and wire identifier data in order to implement the ideal compression technique for different types of data page 135 last paragraph to page 136 first paragraph). Therefore, the combination of Covaci as modified in view of Pearson and Langdon teaches wherein encoding of header data, operator data, and wire identifier data each utilise different techniques such as arithmetic coding techniques for data encoding. Regarding claim 24, Covaci as modified in view of Pearson and Langdon teaches all the limitations of claim 16 as stated above. Further, Covaci as modified in view of Pearson and Langdon teaches wherein the smart contract includes a set of conditions and one or more outcomes whose fulfilment depends at least in part on evaluation of the set of conditions based on one or more inputs ( Covaci page 4 section 3.2 “Let us consider the following portion of a contract: "Check if the average salary of the employees is greater than $32.5K "”; Fig. 2 and page 6 section 3.3.7; set of conditions - if the average salary of the employees is greater than $32.5K or if (Sc); one or more outcomes - (binary) output of the if statement). Regarding claim 25, Covaci as modified in view of Pearson and Langdon teaches all the limitations of claim 16 as stated above. Further, Covaci as modified in view of Pearson and Langdon teaches wherein the smart contract is written in domain-specific language (DSL) code that is converted to general-purpose language (GPL) code ( Covaci Fig. 1 and page 4 section 3 “Although more domain-specific languages (DSL) are required to implement a smart contract, e.g. Digital Asset Modeling Language (DAML) and Financial products Markup Language ( FpML ), as a first step we focus on a more generic language that provides a broader range of types, operators and constructs such as C. Our compilation pipeline is structured as follows. ( i ) The high-level C program containing the contract and the required external libraries are linked together to make the pre-processed contract. Pre-processor directives are evaluated”). Regarding claim 26, Covaci as modified in view of Pearson and Langdon teaches all the limitations of claim 16 as stated above. Covaci does not explicitly teach a system, comprising: a processor; and a memory including executable instructions that, as a result of execution by the processor, causes the system to perform the computer-implemented method of claim 16 . However, on the same field of endeavor, Pearson discloses a system, comprising: a processor; and a memory including executable instructions that, as a result of execution by the processor, causes the system to perform a computer-implemented method (Pearson paragraphs [0046 and 0048] processor – processor; memory – storage medium). Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention, to modify Covaci in view of Pearson and Langdon and implement the method of claim 16 in a system comprising: a processor; and a memory including executable instructions that implements the method of claim 16 such that the method can be implemented using a conventional general purpose digital computer (Pearson paragraph [0046]). Further, as discussed above, Covaci discloses compiling source codes, therefore, it is obvious that the method of Covaci is implemented in a computer environment. Therefore, the combination of Covaci as modified in view of Pearson and Langdon teaches a system, comprising: a processor; and a memory including executable instructions that, as a result of execution by the processor, causes the system to perform the computer-implemented method of claim 16. Regarding claim 27, Covaci as modified in view of Pearson and Langdon teaches all the limitations of claim 16 as stated above. Covaci does not explicitly teach a non-transitory computer-readable storage medium having stored thereon executable instructions that, as a result of being executed by a processor of a computer system, cause the computer system to at least perform the computer-implemented method of claim 16 . However, on the same field of endeavor, Pearson discloses a non-transitory computer-readable storage medium having stored thereon executable instructions that, as a result of being executed by a processor of a computer system, cause the computer system to at least perform a computer-implemented method (Pearson paragraphs [0046 and 0048] “The present invention thus may also include a computer product which may be a storage medium including instructions which can be used to program a computer to perform a process in accordance with the present invention. The storage medium can include, but is not limited to, any type of disk including floppy disk, optical disk, CD-ROM, and magneto-optical disks, ROMs, RAMs, EPROMs, EEPROMs, Flash memory, magnetic or optical cards, or any type of media suitable for storing electronic instructions.”). Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention, to modify Covaci in view of Pearson and Langdon and store the instructions for implementing the method of claim 16 in a non-transitory computer-readable storage medium having stored thereon executable instructions that, as a result of being executed by a processor of a computer system, cause the computer system to at least perform the method of claim 16 such that the method can be implemented using a conventional general purpose digital computer (Pearson paragraph [0046]). Therefore, the combination of Covaci as modified in view of Pearson and Langdon teaches a non-transitory computer-readable storage medium having stored thereon executable instructions that, as a result of being executed by a processor of a computer system, cause the computer system to at least perform the computer-implemented method of claim 16. Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over Covaci in view of Pearson and Langdon as applied to claim 16 above, and further in view of Howard et al. (NPL – “ Arithmetic Coding for Data Compression ”). Regarding claim 19, Covaci as modified in view of Pearson and Langdon teaches all the limitations of claim 16 as stated above. Covaci does not explicitly teach wherein detecting the final line of the data file comprises determining whether an end of the file has been reached by detecting whether a special end-of-file sequence of bits or characters has been reached . However, on the same field of endeavor, Howard discloses a mechanism to indicate the end of a file by encoding a special end-of-file event once (Howard page 858 section II.A right col top “We need some mechanism to indicate the end of the file, either a special end-of-file event coded just once, or some external indication of the file's length. Either method adds only a small amount to the code length”). Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention, to modify Covaci in view of Pearson and Langdon and generalize the teaching of Howard by configuring the data file to include a coded special end-of-file event to indicate the end of the data file such that detecting the coded special end-of-file event indicates the end of the file has been reached in order to indicate that the final line has been evaluated. As discussed, Covaci discloses evaluating the source code (data file) line by line. Therefore, detecting the end of file would also indicate that the last line of the source code has been evaluated ( Covaci page 5 section 3.2.3). Therefore, the combination of Covaci in view of Pearson, Langdon and Howard teaches wherein detecting the final line of the data file comprises determining whether an end of the file has been reached by detecting whether a special end-of-file sequence of bits or characters has been reached. Claim 2 2 is rejected under 35 U.S.C. 103 as being unpatentable over Covaci in view of Pearson and Langdon as applied to claim 16 above, and further in view of Horn et al. ( US 9941900 B1 ) , hereinafter Horn. Regarding claim 22, Covaci as modified in view of Pearson and Langdon teaches all the limitations of claim 16 as stated above. Covaci does not explicitly teach wherein the data file is an uncompressed data file . However, on the same field of endeavor, Horn discloses compressing an uncompressed data file (Horn Fig. 1 and col 4 lines 8-15 “For example, the original content item 102 may be an uncompressed word processing document, presentation document, spreadsheet document, executable (binary), shared library (e.g., a dynamic link library), text document, or other data that has not been compressed using a general-purpose lossless data compressor (e.g., ZIP)”). Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention, to modify Covaci in view of Pearson and Langdon and generalize the teaching of Horn by configuring the input source code as an uncompressed file such that applying the arithmetic coding would generate a compressed file (Langdon abstract, Introduction and page 147 last paragraph). Therefore, the combination of Covaci in view of Pearson, Langdon and Horn teaches wherein the data file is an uncompressed data file. Claim 23 is rejected under 35 U.S.C. 103 as being unpatentable over Covaci in view of Pearson and Langdon as applied to claim 16 above, and further in view of Henry (US 20160336959 A1). Regarding claim 23, Covaci as modified in view of Pearson and Langdon teaches all the limitations of claim 16 as stated above. Covaci does not explicitly teach wherein the command identifies the output stream for storing the serialised result of the arithmetic circuit . However, on the same field of endeavor, Henry discloses a compress instruction that includes a source operand, a destination operand, and a control operand. The source operand specifies the location in system memory of the input block of characters to be compressed, and the destination operand specifies the location to which the compressed block is to be written (Henry paragraph [0268]). Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention, to modify Covaci in view of Pearson and Langdon and generalize the teaching of Henry by including in the command a destination operand in order specify the location for storing the output stream (Henry paragraphs [0267-0268]). Therefore, the combination of Covaci in view of Pearson, Langdon and Henry teaches wherein the command identifies the output stream for storing the serialised result of the arithmetic circuit. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Parno et al. (NPL – “ Pinocchio: Nearly Practical Verifiable Computation ”) generally related to secure computation including taking as input a high level C program and generating arithmetic circuits and Quadratic arithmetic programs in which the NECTAR of Covaci is built upon. Parno et al . is cited in the IDS submitted on 11/02/2022. Wikipedia (NPL – “ Arithmetic Coding ”) generally related to arithmetic coding and discloses that arithmetic encoding frequently used characters are stored with fewer bits and not-so-frequently occurring characters are stored with more bits. Wikipedia is cited in the IDS submitted on 11/02/2022. Any inquiry concerning this communication or earlier communications from the examiner should be directed to FILLIN "Examiner name" \* MERGEFORMAT Carlo Waje whose telephone number is FILLIN "Phone number" \* MERGEFORMAT (571)272-5767 . The examiner can normally be reached FILLIN "Work Schedule?" \* MERGEFORMAT 9:00-6:00 M-F . Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, FILLIN "SPE Name?" \* MERGEFORMAT James Trujillo can be reached at FILLIN "SPE Phone?" \* MERGEFORMAT (571) 272-3677 . The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Carlo Waje / Examiner, Art Unit 2151 (571)272-5767