Prosecution Insights
Last updated: July 17, 2026
Application No. 17/968,697

NETWORK SWITCHING WITH CO-RESIDENT DATA-PLANE AND NETWORK INTERFACE CONTROLLERS

Non-Final OA §103
Filed
Oct 18, 2022
Priority
Nov 14, 2014 — divisional of 10/116,772 +1 more
Examiner
LAM, YEE F
Art Unit
2465
Tech Center
2400 — Computer Networks
Assignee
Marvell Asia Pte. Ltd.
OA Round
3 (Non-Final)
77%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 77% — above average
77%
Career Allowance Rate
492 granted / 639 resolved
+19.0% vs TC avg
Strong +22% interview lift
Without
With
+21.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 11m
Avg Prosecution
36 currently pending
Career history
684
Total Applications
across all art units

Statute-Specific Performance

§101
0.5%
-39.5% vs TC avg
§103
92.4%
+52.4% vs TC avg
§102
1.6%
-38.4% vs TC avg
§112
5.0%
-35.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 639 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priorities and Examiner Remarks This application is a Continuation in Part of 16132424 (filed 09/16/2018, now U.S. Patent # 11509750), which is a Divisional of 14542485 (filed 11/14/2014, now U.S. Patent # 10116772). Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 03/02/2026 has been entered. Double Patenting Claims 1, 4-5, 7-10, 12-14, 17-18, 20-23, and 25-26 are rejected on the ground of nonstatutory obviousness-type double patenting as being unpatentable over claims 1-2, 4, 7-9, and 11-12 of U.S. patent 11509750 B2 (hereinafter “patent 11509750”). Although the conflicting claims are not identical, they are not patentably distinct from each other because of the following: Regarding claim 1, instant application 17968697 claims: patent 11509750 teaches: 1. A method for network switching with co-resident data-plane processors and network interface controller, comprising: 1. A method for network switching with co-resident data-plane processors and a network interface controller, comprising: receiving a packet from a network at a medium access controller; receiving a packet from a network at a medium access controller; selecting, by a medium access controller, between a data-plane packet input processor and the network interface controller, determining by the medium access controller whether the packet should be provided to a data-plane packet input processor or to the network interface controller a network interface resource including the data-plane packet input processor, a data-plane packet output processor, and the network interface controller; and a network interface resource comprising: the data-plane packet input processor, a data-plane packet output processor, and the network interface controller providing, by the medium access controller, the packet received form the network to the network interface controller or the data-plane packet input processor of the network interface resource in accordance with the selecting. providing the packet to the data-plane packet input processor according to the determining; Hence, claim 1 of patent 11509750 is directed to an identical or substantially same invention as claim 1 of the instant application. Regarding claim 4, claim 2 of patent 11509750 is directed to an identical or substantially same invention as claim 4 of the instant application. Regarding claim 5, claim 4 of patent 11509750 is directed to an identical or substantially same invention as claim 5 of the instant application. Regarding claims 7-8, claim 7 of patent 11509750 is directed to an identical or substantially same invention as claims 7-8 of the instant application. Regarding claim 9, claim 8 of patent 11509750 is directed to an identical or substantially same invention as claim 9 of the instant application. Regarding claim 10, claim 9 of patent 11509750 is directed to an identical or substantially same invention as claim 10 of the instant application. Regarding claim 12, claim 11 of patent 11509750 is directed to an identical or substantially same invention as claim 12 of the instant application. Regarding claim 13, claim 12 of patent 11509750 is directed to an identical or substantially same invention as claim 13 of the instant application. Regarding claim 14, 17, 18, 20-21, 22, 23, 25, and 26, each of these claims is rejected for the same reasoning as claims 1, 4, 5, 7-8, 9, 10, 12, and 13, respectively, except each of these claims is in apparatus claim format. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 1-6 are rejected under 35 U.S.C. 103 as being unpatentable over Ronciak et al. (US 20060067228 A1, hereinafter Ronciak_28), in view of Ronciak et al. (US 20060067349 A1, hereinafter Ronciak_49). Regarding claim 1, Ronciak_28 teaches a method for network switching with co-resident data-plane processors and network interface controller, comprising (Ronciak_28, in general, see fig. 2 in view of fig. 1A-D along with their respective paragraphs, including but not limited to, 11-20): receiving a packet from a network at a medium access controller (Ronciak_28, see at least para. 17 and fig. 2, e.g. MAC 304 receives packets); selecting, by the medium access controller, a data-plane packet input processor (Ronciak_28, see at least para. 18-19 in view of one or more of fig. 1A-1D, for one example, but not limited to, MAC 304 sends packets to 306, 308, and further into memory pages 102), and providing, by the medium access controller, the packet received from the network to the network interface controller or the data-plane packet input processor of the network interface resource in accordance with the selecting (Ronciak_28, see at least para. 17-19 in view of one or more of fig. 1A-1D, for one example, but not limited to, within NIC 100 the MAC 304 receives then sends packets to 306, 308, and further into memory pages 102). Ronciak_28 does not specifically teach selecting, by the medium access controller, between a data-plane packet input processor and the network interface controller, a network interface resource including the data-plane packet input processor, a data-plane packet output processor, and the network interface controller. Ronciak_49 teaches selecting, by the medium access controller, between a data-plane packet input processor and the network interface controller (Ronciak_49, see at least para. 21, “...The PHY 200 is coupled to a media access controller (MAC) that performs layer 2 operations such as encapsulating/de-encapsulation of TCP/IP packets within Ethernet frames and computing checksums to verify correct transmission...”), a network interface resource including the data-plane packet input processor, a data-plane packet output processor, and the network interface controller (Ronciak_49, for components orientations see at least figures 1-2 and their corresponding paragraphs in view of at least para. 18 and 28, e.g. while there are many possibilities, one non-limiting example would be in fig. 2 where network interface controller 100 comprises components 204-208, components 204-206, PHY 200; note that processors 104s may be part of the network interface controller 100). Therefore, it would have been obvious, before the effective filing date of the claimed invention, to a person having ordinary skill in the art to incorporate Ronciak_49 into the method of Ronciak_28 for providing effective traffic congestion control. Regarding claim 2, Ronciak_28 in view of Ronciak_49 teaches the network interface resource is implemented as a single chip or a hybrid circuit. (Ronciak_28, see at least para. 27; Ronciak_49, see at least para. 28, e.g. chipset) Therefore, it would have been obvious, before the effective filing date of the claimed invention, to a person having ordinary skill in the art to incorporate Ronciak_49 into the method of Ronciak_28 for providing effective traffic congestion control. Regarding claim 3, Ronciak_28 in view of Ronciak_49 teaches the network interface resource is implemented as a module, comprising at least one or more chips or a hybrid circuit. (Ronciak_28, see at least para. 27; Ronciak_49, see at least para. 28, e.g. chipset) Therefore, it would have been obvious, before the effective filing date of the claimed invention, to a person having ordinary skill in the art to incorporate Ronciak_49 into the method of Ronciak_28 for providing effective traffic congestion control. Regarding claim 4, Ronciak_28 in view of Ronciak_49 teaches the selecting by the medium access controller includes: determining a content of the packet by the medium access controller; and providing the packet to the data-plane packet input processor or to the network interface controller of the network interface resource in accordance with the determined content of the packet. (Ronciak_28, see at least para. 21, for one unlimited example, “…As shown, the controller 100 determines 204 the flow of a received 202 packet, for example, by hashing header contents (e.g., a TCP/IP tuple). Based on the resulting flow identifier, the controller 100 performs a lookup to determine 206 whether the packet is part of a flow to be handled using page-flipping…”) Regarding claim 5, Ronciak_28 in view of Ronciak_49 teaches the selecting by the medium access controller includes: determining a state of a register; and providing the packet to the data-plane packet input processor or to the network interface controller of the network interface resource in accordance with the determined state of the register. (Ronciak_28, see at least para. 21 along with para. 15, for one unlimited example, “…As shown in FIG. 1A, after receiving a packet 104, the network interface controller 100 can determine the flow the packet 104 belongs to and access data 112 to determine if page-flipping is being used to handle packets in the flow. If so, the controller 100 can also use data 112 to determine where to place data in the page currently associated with the flow (e.g., page “Q”)…”) Regarding claim 6, Ronciak_28 in view of Ronciak_49 teaches the selecting by the medium access controller includes: determining a state of a register; determining a content of the packet; and providing the packet to the data-plane packet input processor or to the network interface controller of the network interface resource in accordance with the determined state of the register and the content of the packet. (Ronciak_28, see at least para. 21 along with para. 14-15, for one unlimited example, “…As shown in FIG. 1A, after receiving a packet 104, the network interface controller 100 can determine the flow the packet 104 belongs to and access data 112 to determine if page-flipping is being used to handle packets in the flow. If so, the controller 100 can also use data 112 to determine where to place data in the page currently associated with the flow (e.g., page “Q”)…”) Claims 7-13 are rejected under 35 U.S.C. 103 as being unpatentable over Ronciak_28 in view of Ronciak_49, as applied to claim 1 above, and further in view of Shuichi Karino (US 20110320632 A1, hereinafter Karino). Regarding claim 7, Ronciak_28 in view of Ronciak_49 teaches upon providing the packet to the data-plane packet input processor, the method further comprises: processing the packet. (Ronciak_28, see at least para. 18-19 and fig. 2, for one unlimited example, using circuitry 306 and 308; Ronciak_49, see at least para. 20 and fig. 2, using circuitry 200-208) Ronciak_28 in view of Ronciak_49 does not specifically teach processing the packet by the data-plane packet input processor to determine a target entity; providing the packet to a storage; and notifying a packet handling entity that the packet for the target entity is available in the storage. Karino teaches processing the packet by the data-plane packet input processor to determine a target entity; providing the packet to a storage; and notifying a packet handling entity that the packet for the target entity is available in the storage (in general, see fig. 9 along with fig. 10-11 and their respective paragraphs at least 67-80; in particular, see at least para. 75 for one unlimited example “…A reception packet received from the data link is processed as follows. If the reception packet belongs to the flow “flow1” or “flow2”, an exact match entry is hit in the reception filter table FILT1. Accordingly, the reception filter 110 stores the reception packet in the reception queue 101 associated with to the corresponding virtual machine 300. The reception packet is directly transmitted to the corresponding virtual machine 300…”, note that a target entity is interpreted to be a destination of a packet from one or more queues). Therefore, it would have been obvious, before the effective filing date of the claimed invention, to a person having ordinary skill in the art to incorporate Karino into the method of Ronciak_28 in view of Ronciak_49 for achieving flexible traffic control. Regarding claim 8, Ronciak_28 in view of Ronciak_49 and Karino teaches requesting the packet from the storage by the target entity; and processing the packet by the packet handling entity in accordance with a packet management policy. (Karino, see at least para. 127, for one unlimited example, “…The virtual switch packet transmission/reception function 320 stores the received transmission packets in the buffer and requests the hypervisor 50 to transfer the packets. The hypervisor 50 instructs the virtual switch 200 to process the transmission packets…”) Therefore, it would have been obvious, before the effective filing date of the claimed invention, to a person having ordinary skill in the art to incorporate Karino into the method of Ronciak_28 in view of Ronciak_49 for achieving flexible traffic control. Regarding claim 9, Ronciak_28 in view of Ronciak_49 and Karino teaches processing the packet by the packet handling entity in accordance with the packet management policy comprises: discarding the packet. (Ronciak_28, see at least para. 22-24, e.g. removing packet flows) Regarding claim 10, Ronciak_28 in view of Ronciak_49 and Karino teaches processing the packet by the packet handling entity in accordance with the packet management policy comprises: providing the packet to a different destination entity than the target entity. (Karino, see at least para. 73-76, e.g. disclosing two of many examples for packet flows to various destinations) Therefore, it would have been obvious, before the effective filing date of the claimed invention, to a person having ordinary skill in the art to incorporate Karino into the method of Ronciak_28 in view of Ronciak_49 for achieving flexible traffic control. Regarding claim 11, Ronciak_28 in view of Ronciak_49 and Karino teaches processing the packet by the packet handling entity in accordance with the packet management policy comprises: providing the packet to the target entity based on determining that the target entity instantiated a data-plane. (Karino, see at least para. 73-76 as well as para. 60, e.g. disclosing two of many examples for packet flows to various destinations per situations) Therefore, it would have been obvious, before the effective filing date of the claimed invention, to a person having ordinary skill in the art to incorporate Karino into the method of Ronciak_28 in view of Ronciak_49 for achieving flexible traffic control. Regarding claim 12, Ronciak_28 in view of Ronciak_49 and Karino teaches processing the packet by the packet handling entity in accordance with the packet management policy comprises: providing the packet to the target entity via the data-plane packet output processor, a loopback entity, and the network interface controller based on determining that the target entity did not instantiate or is not capable of instantiating a data-plane. (Karino, see at least para. 73-76 as well as para. 60, e.g. disclosing two of many examples for packet flows to various destinations per situations) Therefore, it would have been obvious, before the effective filing date of the claimed invention, to a person having ordinary skill in the art to incorporate Karino into the method of Ronciak_28 in view of Ronciak_49 for achieving flexible traffic control. Regarding claim 13, Ronciak_28 in view of Ronciak_49 and Karino teaches processing the packet by the packet handling entity in accordance with the packet management policy comprises: switching a packet route on layer 2 and layer 3. (Ronciak_28, see at least para. 14, e.g. TCP/IP packet flows) Claims 14-19 are rejected under 35 U.S.C. 103 as being unpatentable over Ronciak_28, in view of Ronciak_49 and Noureddine et al. (US 9309056 B1, hereinafter Noureddine). Regarding claim 14, this claim is rejected for the same reasoning as claim 1 except this claim is in apparatus claim format. In addition, Ronciak_28 in view of Ronciak_49 further teaches at least one medium access controller, communicatively coupled to network facing inbound and outgoing interfaces of the network interface controller, a network facing outgoing interface of the data-plane packet output processor, a network facing inbound interface of the data-plane packet input processor (Ronciak_28, see at least fig. 2; Ronciak_49, see at least fig. 2). Nonetheless, Ronciak_28 in view of Ronciak_49) does not specifically teaches at least one loopback entity. Noureddine teaches at least one loopback entity (in general, see fig. 1 and corresponding paragraphs/sections, in particular, see col. 2 line 39 to col. 3 line 20, in part, “...in which case the egress packet is then looped back to the NIC for ingress processing (including Layer 2 processing) as if the packet had been received at an input port of the NIC...”). Therefore, it would have been obvious, before the effective filing date of the claimed invention, to a person having ordinary skill in the art to incorporate Noureddine into Ronciak_28 in view of Ronciak_49 for providing capability effectively allows a NIC to perform the basic functions of a standalone network switch as well as additional useful functions. Regarding claims 15, 16, 17, 18, and 19, in view of claim 14 above additionally with Noureddine, these claims are rejected for the same reasoning as claims 2, 3, 4, 5, and 6 with Ronciak_28 in view of Ronciak_49, respectively, except each of these claims is in apparatus claim format. Claims 20-26 are rejected under 35 U.S.C. 103 as being unpatentable over Ronciak_28 in view of Ronciak_49 and Noureddine, as applied to claim 14 above, and further in view of Karino. Regarding claims 20, 21, 22, 23, 24, 25, and 26, in view of claim 14 above additionally with Noureddine, these claims are rejected for the same reasoning as claims 7, 8, 9, 10, 11, 12, and 13 with Ronciak_28 in view of Ronciak_49 and Karino, respectively, except each of these claims is in apparatus claim format. Response to Arguments Applicant's arguments filed 03/02/2026 have been fully considered. Regarding independent claims 1 and 14 since applicant's amendment necessitated new ground(s) of rejection presented in this Office action, previous Office action's rejections are moot. Accordingly, corresponding dependent claims have also been rejected in this Office action. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to YEE F LAM whose telephone number is (571)270-7577. The examiner can normally be reached M-F 8am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ayman Abaza can be reached on 571-270-0422. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /YEE F LAM/ Primary Examiner, Art Unit 2465
Read full office action

Prosecution Timeline

Oct 18, 2022
Application Filed
Jul 14, 2025
Non-Final Rejection mailed — §103
Oct 14, 2025
Response Filed
Dec 02, 2025
Final Rejection mailed — §103
Mar 02, 2026
Request for Continued Examination
Mar 11, 2026
Response after Non-Final Action
May 29, 2026
Non-Final Rejection mailed — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
77%
Grant Probability
99%
With Interview (+21.6%)
2y 11m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 639 resolved cases by this examiner. Grant probability derived from career allowance rate.

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