Prosecution Insights
Last updated: April 19, 2026
Application No. 17/969,339

MULTILAYER COIL COMPONENT

Non-Final OA §103
Filed
Oct 19, 2022
Examiner
HINSON, RONALD
Art Unit
2837
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
TDK Corporation
OA Round
3 (Non-Final)
74%
Grant Probability
Favorable
3-4
OA Rounds
3y 1m
To Grant
88%
With Interview

Examiner Intelligence

Grants 74% — above average
74%
Career Allow Rate
568 granted / 773 resolved
+5.5% vs TC avg
Moderate +14% lift
Without
With
+14.4%
Interview Lift
resolved cases with interview
Typical timeline
3y 1m
Avg Prosecution
31 currently pending
Career history
804
Total Applications
across all art units

Statute-Specific Performance

§103
55.9%
+15.9% vs TC avg
§102
26.3%
-13.7% vs TC avg
§112
16.0%
-24.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 773 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 02/17/26 has been entered. Response to Arguments Applicant’s arguments with respect to claims have been considered but are moot in grounds of the new rejection. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 1. Claims 1-2, 4 and 6 are rejected under 35 U.S.C. 103 as being unpatentable over Sato et al. (JP 2003197427)(English translation) in view of Sekiguchi et al. (US 2018/0096780) and Ishii et al. (US 20140145815). Regarding claim 1, Sato et al. (figures 1-5 and para 0017-0040) discloses an element body (see figures 1b/5) including a mounting surface and a main surface facing the mounting surface (see figures 1b/5); a pair of terminal electrodes (6/7) disposed on the mounting surface of the element body(see figures 1b/5); and a coil that is disposed in the element body and electrically connected to the pair of terminal electrodes(see figures 1b/5), wherein the coil includes a first wiring portion (2),a second wiring portion (3), and a connection portion (8) that extends in a direction in which the mounting surface and the main surface face each other and connects the first wiring portion to the second wiring portion (see para 0017-0032), the first wiring portion being disposed between the main surface and the second wiring portion in the direction in which the mounting surface and the main surface face each other (see figures 1b/5), the second wiring portion being disposed between the first wiring portion and the mounting surface in the direction in which the mounting surface and the main surface face each other (see figures 1b/5); and the element body is configured to include at least one first resin layer containing a filler (1 or 5) and at least one second resin layer (15) having a lower dielectric constant than the first resin layer between the first wiring portion and the terminal electrodes.(see para 0034-0036) Sato et al. does not expressly disclose wherein when viewed in the direction in which the mounting surface and the main surface face each other, the first wiring portion extends continuously between the pair of terminal electrodes and overlaps both of the pair of terminal electrodes, and the second wiring portion extends continuously between the pair of terminal electrodes and overlaps both of the pair of terminal electrodes, wherein one of the terminal electrodes and the connection portion overlap when viewed from the direction in which the mounting surface and the main surface face each other and wherein the pair of terminal electrodes are disposed only on the mounting surface. Sekiguchi et al. (figures 1a-3 and para 0089-0104) discloses a teaching wherein wherein when viewed in the direction in which the mounting surface and the main surface face each other, the first wiring portion extends continuously between the pair of terminal electrodes and overlaps both of the pair of terminal electrodes, and the second wiring portion extends continuously between the pair of terminal electrodes and overlaps both of the pair of terminal electrodes, wherein one of the terminal electrodes (16/16) and the connection portion (32) overlap when viewed from the direction in which the mounting surface and the main surface face each other. (see figures 1a-1b) Ishiiet al. (figures 1, para 0007-0008 and para 0020) discloses a teaching wherein the pair of terminal electrodes are disposed only on the mounting surface. Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the applicant claimed invention to design wherein when viewed in the direction in which the mounting surface and the main surface face each other, the first wiring portion extends continuously between the pair of terminal electrodes and overlaps both of the pair of terminal electrodes, and the second wiring portion extends continuously between the pair of terminal electrodes and overlaps both of the pair of terminal electrodes, wherein one of the terminal electrodes wherein the terminal electrodes and the connection portion overlap when viewed from the direction in which the mounting surface and the main surface face each other as taught by Sekiguchi et al. to the inductive device of Sato et al. so as allow for a more compact design, while also improving the electrical connection between the inductive device and the terminal electrode thereby allowing for improved inductive characteristics. Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the applicant claimed invention to design wherein the pair of terminal electrodes are disposed only on the mounting surface as taught by Ishii et al. to the inductive device of Sato et al. so as to allow for a more compact design; which will save in production cost in regards to time and material needed to make the inductive device while also allowing for a smaller stray capacitance and high Q to be obtained. Regarding claim 2, Sato et al. (figures 1b/5) discloses wherein the main surface is configured of the first resin layer (4). Regarding claim 4, Sato et al. (figures 1b/5 and para 0049-0063) discloses wherein a plurality of first resin layers (4,1,5) and a plurality of second resin layers (14,15) are alternately disposed in the element body. Regarding claim 6, Sekiguchi et al. (figures 1a-3) wherein the terminal electrodes and the second wiring portion overlap when viewed from the direction in which the main surface and the mounting surface face each other. 2. Claims 1-2, 4 and 6 are rejected under 35 U.S.C. 103 as being unpatentable over Sato et al. (JP 2003197427)(English translation) in view of Yatabe et al. (US 20180096778) and Ishii et al. (US 20140145815). Regarding claim 1, Sato et al. (figures 1-5 and para 0017-0040) discloses an element body (see figures 1b/5) including a mounting surface and a main surface facing the mounting surface (see figures 1b/5); a pair of terminal electrodes (6/7) disposed on the mounting surface of the element body(see figures 1b/5); and a coil that is disposed in the element body and electrically connected to the pair of terminal electrodes(see figures 1b/5), wherein the coil includes a first wiring portion (2),a second wiring portion (3), and a connection portion (8) that extends in a direction in which the mounting surface and the main surface face each other and connects the first wiring portion to the second wiring portion (see para 0017-0032), the first wiring portion being disposed between the main surface and the second wiring portion in the direction in which the mounting surface and the main surface face each other (see figures 1b/5), the second wiring portion being disposed between the first wiring portion and the mounting surface in the direction in which the mounting surface and the main surface face each other (see figures 1b/5); and the element body is configured to include at least one first resin layer containing a filler (1 or 5) and at least one second resin layer (15) having a lower dielectric constant than the first resin layer between the first wiring portion and the terminal electrodes.(see para 0034-0036) Sato et al. does not expressly disclose wherein when viewed in the direction in which the mounting surface and the main surface face each other, the first wiring portion extends continuously between the pair of terminal electrodes and overlaps both of the pair of terminal electrodes, and the second wiring portion extends continuously between the pair of terminal electrodes and overlaps both of the pair of terminal electrodes, wherein one of the terminal electrodes and the connection portion overlap when viewed from the direction in which the mounting surface and the main surface face each other and wherein the pair of terminal electrodes are disposed only on the mounting surface. Yatabe et al. (figures 1-2c and para 0072-0089) discloses a teaching wherein when viewed in the direction in which the mounting surface and the main surface face each other, the first wiring portion extends continuously between the pair of terminal electrodes and overlaps both of the pair of terminal electrodes, and the second wiring portion extends continuously between the pair of terminal electrodes and overlaps both of the pair of terminal electrodes, wherein one of the terminal electrodes (50/50) and the connection portion (32) overlap when viewed from the direction in which the mounting surface and the main surface face each other. (see figures 1-2b) Ishii et al. (figures 1, para 0007-0008 and para 0020) discloses a teaching wherein the pair of terminal electrodes are disposed only on the mounting surface. Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the applicant claimed invention to design when viewed in the direction in which the mounting surface and the main surface face each other, the first wiring portion extends continuously between the pair of terminal electrodes and overlaps both of the pair of terminal electrodes, and the second wiring portion extends continuously between the pair of terminal electrodes and overlaps both of the pair of terminal electrodes, wherein one of the terminal electrodes and the connection portion overlap when viewed from the direction in which the mounting surface and the main surface face each other as taught by Yatabe et al. to the inductive device of Sato et al. so as allow for a more compact design, while also improving the electrical connection between the inductive device and the terminal electrode thereby allowing for improved inductive characteristics. Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the applicant claimed invention to design wherein the pair of terminal electrodes are disposed only on the mounting surface as taught by Ishii et al. to the inductive device of Sato et al. so as to allow for a more compact design; which will save in production cost in regards to time and material needed to make the inductive device while also allowing for a smaller stray capacitance and high Q to be obtained. Regarding claim 2, Sato et al. (figures 1b/5) discloses wherein the main surface is configured of the first resin layer (4). Regarding claim 4, Sato et al. (figures 1b/5 and para 0049-0063) discloses wherein a plurality of first resin layers (4,1,5) and a plurality of second resin layers (14,15) are alternately disposed in the element body. Regarding claim 6, Yatabe et al. (figures 1-2c) discloses the terminal electrodes and the second wiring portion overlap when viewed from the direction in which the main surface and the mounting surface face each other. 3. Claims 1-4 and 6 are rejected under 35 U.S.C. 103 as being unpatentable over Takaya et al. (US 2004/0183645) in view of Sato et al. (JP 2003197427)(English translation), Sekiguchi et al. (US 20170345558) and Kido (US 10840009). Regarding claim 1, Takaya et al. (figures 1a-2b and para 0089-0104) discloses an element body (see figures 1a-2b) including a mounting surface and a main surface facing the mounting surface (see figures 1a-1c); a pair of terminal electrodes (12/12) disposed on the mounting surface of the element body(see figures 1a-1c); and a coil that is disposed in the element body and electrically connected to the pair of terminal electrodes(see figures 1a-1c and para 0090), wherein the coil includes a first wiring portion (3b) disposed on the main surface side (see figures 1a-1c), a second wiring portion (3a) disposed on the mounting surface side(see figures 1a-1c), and a connection portion (2a/2b) that extends in a direction in which the mounting surface and the main surface face each other and connects the first wiring portion to the second wiring portion (see figures 1a-1c and para 0090-0095), the first wiring portion being disposed between the main surface and the second wiring portion in the direction in which the mounting surface and the main surface face each other (see figures 1a-1c), the second wiring portion being disposed between the first wiring portion and the mounting surface in the direction in which the mounting surface and the main surface face each other (see figures 1a-1c) Takaya et al. (figures 1b/2b and para 0090-0093) discloses the element body has a plurality of first layers (9 or 10) and second resin layer (4-5/11) that are made of a resin material or a resin material containing fillers but does not expressly disclose wherein the element body is configured to include at least one first resin layer containing a filler and at least one second resin layer having a lower dielectric constant than the first resin layer between the first wiring portion and the terminal electrodes. Takaya et al. does not expressly disclose when viewed in the direction in which the mounting surface and the main surface face each other, the first wiring portion extends continuously between the pair of terminal electrodes and overlaps both of the pair of terminal electrodes, and the second wiring portion extends continuously between the pair of terminal electrodes and overlaps both of the pair of terminal electrodes, wherein one of the terminal electrodes and the connection portion overlap when viewed from the direction in which the mounting surface and the main surface face each other and a pair of terminal electrodes are disposed only on the mounting surface. Sato et al. (figures 1-5 and para 0017-0040) discloses a teaching of the element body is configured to include at least one first resin layer containing a filler (1 or 5) and at least one second resin layer (15) having a lower dielectric constant than the first resin layer between the first wiring portion and the terminal electrodes. (see para 0034-0036) Sekiguchi et al. (figures 1a-3 and para 0089-0104) discloses a teaching wherein wherein when viewed in the direction in which the mounting surface and the main surface face each other, the first wiring portion extends continuously between the pair of terminal electrodes and overlaps both of the pair of terminal electrodes, and the second wiring portion extends continuously between the pair of terminal electrodes and overlaps both of the pair of terminal electrodes, wherein one of the terminal electrodes (16/16) and the connection portion (32) overlap when viewed from the direction in which the mounting surface and the main surface face each other. (see figures 1a-1b) Kido (figure 1 and Col 6, lines 1-60) discloses a teaching wherein the pair of terminal electrodes are disposed only on the mounting surface. Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the applicant claimed invention to design wherein the element body is configured to include at least one first resin layer containing a filler and at least one second resin layer having a lower dielectric constant than the first resin layer between the first wiring portion and the terminal electrodes as taught by Sato et al. to the inductive device of Takaya et al.so as to reduce crosstalk thereby improving signal quality while also allowing for electrical signals to travel at a higher speed due to reduced interaction with the medium. Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the applicant claimed invention to design a teaching wherein when viewed in the direction in which the mounting surface and the main surface face each other, the first wiring portion extends continuously between the pair of terminal electrodes and overlaps both of the pair of terminal electrodes, and the second wiring portion extends continuously between the pair of terminal electrodes and overlaps both of the pair of terminal electrodes, wherein one of the terminal electrodes and the connection portion overlap when viewed from the direction in which the mounting surface and the main surface face each other as taught by Sekiguchi et al. to the inductive device of Takaya et al. so as allow for a more compact design, while also improving the electrical connection between the inductive device and the terminal electrode thereby allowing for improved inductive characteristics. Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the applicant claimed invention to design wherein the pair of terminal electrodes are disposed only on the mounting surface as taught by Kido to the inductive device of Takaya et al. so as to allow for a more compact design; which will save in production cost in regards to time and material needed to make the inductive device while also allowing for a smaller stray capacitance and high Q to be obtained. Regarding claim 2, Takaya et al. (figure 1b) discloses wherein the main surface is configured of the first resin layer (9). Regarding claim 3, Takaya et al. (figure 1b) discloses wherein a thickness of the first resin layer (9) in the direction in which the mounting surface and the main surface face each other is smaller than a thickness of the second resin layer (5). Regarding claim 4, Sato et al. (figures 1b/5 and para 0034-0036) discloses wherein a plurality of first resin layers (4,1,5) and a plurality of second resin layers (14,15) are alternately disposed in the element body. Regarding claim 6, Sekiguchi et al. (figures 1-4) discloses the terminal electrodes and the second wiring portion overlap when viewed from the direction in which the main surface and the mounting surface face each other. 4. Claims 1-3 and 6 are rejected under 35 U.S.C. 103 as being unpatentable over Takaya et al. (US 2004/0183645) in view of Takaya et al. (US 2002/0009577), Sekiguchi et al. (US 20170345558) and Kido (US 10840009). Regarding claim 1, Takaya et al. (figures 1a-2b and para 0089-0104) discloses an element body (see figures 1a-2b) including a mounting surface and a main surface facing the mounting surface (see figures 1a-1c); a pair of terminal electrodes (12/12) disposed on the mounting surface of the element body(see figures 1a-1c); and a coil that is disposed in the element body and electrically connected to the pair of terminal electrodes(see figures 1a-1c and para 0090), wherein the coil includes a first wiring portion (3b) disposed on the main surface side (see figures 1a-1c), a second wiring portion (3a) disposed on the mounting surface side(see figures 1a-1c), and a connection portion (2a/2b) that extends in a direction in which the mounting surface and the main surface face each other and connects the first wiring portion to the second wiring portion (see figures 1a-1c and para 0090-0095); the first wiring portion being disposed between the main surface and the second wiring portion in the direction in which the mounting surface and the main surface face each other (see figures 1a-1c), the second wiring portion being disposed between the first wiring portion and the mounting surface in the direction in which the mounting surface and the main surface face each other (see figures 1a-1c). Takaya et al. (figures 1b/2b and para 0090-0093) discloses the element body has a plurality of first layers (9 or 10) and second resin layer (4-5/11) that are made of a resin material or a resin material containing fillers but does not expressly disclose wherein the element body is configured to include at least one first resin layer containing a filler and at least one second resin layer having a lower dielectric constant than the first resin layer between the first wiring portion and the terminal electrodes. Takaya et al. does not expressly disclose when viewed in the direction in which the mounting surface and the main surface face each other, the first wiring portion extends continuously between the pair of terminal electrodes and overlaps both of the pair of terminal electrodes, and the second wiring portion extends continuously between the pair of terminal electrodes and overlaps both of the pair of terminal electrodes, wherein one of the terminal electrodes and the connection portion overlap when viewed from the direction in which the mounting surface and the main surface face each other and a pair of terminal electrodes are disposed only on the mounting surface. Takaya et al.(9577) (figures 1-4 and para 0068-0098) discloses a teaching of the element body is configured to include at least one first resin layer containing a filler (10c) and at least one second resin layer (10b) having a lower dielectric constant than the first resin layer between the first wiring portion and the terminal electrodes. (see para 0068 discloses how two layers can differ in at least one parameter in regards to dielectric constant, Q value, and magnetic permeability, which allows the prior art of Takaya 577 to have the capability where in the layers can be designed to one first resin layer containing a filler and at least one second resin layer having a lower dielectric constant than the first resin layer). Sekiguchi et al. (figures 1a-3 and para 0089-0104) discloses a teaching wherein wherein when viewed in the direction in which the mounting surface and the main surface face each other, the first wiring portion extends continuously between the pair of terminal electrodes and overlaps both of the pair of terminal electrodes, and the second wiring portion extends continuously between the pair of terminal electrodes and overlaps both of the pair of terminal electrodes, wherein one of the terminal electrodes (16/16) and the connection portion (32) overlap when viewed from the direction in which the mounting surface and the main surface face each other. (see figures 1a-1b) Kido (figure 1 and Col 6, lines 1-60) discloses a teaching wherein the pair of terminal electrodes are disposed only on the mounting surface. Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the applicant claimed invention to design wherein the element body is configured to include at least one first resin layer containing a filler and at least one second resin layer having a lower dielectric constant than the first resin layer between the first wiring portion and the terminal electrodes as taught by Takaya et al.(9577) to the inductive device of Takaya et al.so as to reduce crosstalk thereby improving signal quality while also allowing for electrical signals to travel at a higher speed due to reduced interaction with the medium. Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the applicant claimed invention to design a teaching wherein wherein when viewed in the direction in which the mounting surface and the main surface face each other, the first wiring portion extends continuously between the pair of terminal electrodes and overlaps both of the pair of terminal electrodes, and the second wiring portion extends continuously between the pair of terminal electrodes and overlaps both of the pair of terminal electrodes, wherein one of the terminal electrodes (and the connection portion overlap when viewed from the direction in which the mounting surface and the main surface face each other as taught by Sekiguchi et al. to the inductive device of Takaya et al. so as allow for a more compact design, while also improving the electrical connection between the inductive device and the terminal electrode thereby allowing for improved inductive characteristics. Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the applicant claimed invention to design wherein the pair of terminal electrodes are disposed only on the mounting surface as taught by Kido to the inductive device of Takaya et al. so as to allow for a more compact design; which will save in production cost in regards to time and material needed to make the inductive device while also allowing for a smaller stray capacitance and high Q to be obtained. Regarding claim 2, Takaya et al. (figure 1b) discloses wherein the main surface is configured of the first resin layer (9). Regarding claim 3, Takaya et al. (figure 1b) discloses wherein a thickness of the first resin layer (9) in the direction in which the mounting surface and the main surface face each other is smaller than a thickness of the second resin layer (5). Regarding claim 6, Sekiguchi et al. (figures 1-4) discloses the terminal electrodes and the second wiring portion overlap when viewed from the direction in which the main surface and the mounting surface face each other. 5. Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Takaya et al. (US 2004/0183645) in view of Takaya et al. (US 2002/0009577), Sekiguchi et al. (US 20170345558) and Kido (US 10840009) in further view Suga et al. (US 2017/0278811). Regarding claim 5, Takaya et al (figures 1a-2b and para 0089-0104) discloses all the limitations as noted above but does not expressly disclose wherein at least one second resin layer contains no filler. Suga et al. (para 0030) wherein at least one second resin layer contains no filler.(note: Suga discloses wherein a first resin-based insulating material can added with filler of a silica and mixed with polyimide or parylene and the second resin-based insulating material is added with no filler such as a just polyimide or parylene resin) Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the applicant claimed invention to design wherein at least one second resin layer contains no filler as taught by Suga et al. to the inductive device of Takaya et al.so as to help improve thermal stability of resin by increasing its heating temperature threshold while allowing the inductive device improves resistant to moisture and solvents. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to RONALD HINSON whose telephone number is (571)270-7915. The examiner can normally be reached M to F; 8 -5. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Shawki Ismail can be reached at 571-272-3985. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /RONALD HINSON/Primary Examiner, Art Unit 2837
Read full office action

Prosecution Timeline

Oct 19, 2022
Application Filed
Jul 19, 2025
Non-Final Rejection — §103
Oct 23, 2025
Response Filed
Nov 15, 2025
Final Rejection — §103
Feb 17, 2026
Request for Continued Examination
Feb 18, 2026
Response after Non-Final Action
Feb 21, 2026
Non-Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
74%
Grant Probability
88%
With Interview (+14.4%)
3y 1m
Median Time to Grant
High
PTA Risk
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