Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 10/20/2022 and 08/26/2025 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Objections
Claim 6, 13 and 20 are objected to because of the following informalities: claim 6, recites “a lowest discrete” should recite “ the lowest discrete”. Claims 13 and 20 recites similar limitation to those of claim 6, thus same rationale applies. Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 3-7, 10-14 and 16-20 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 3 recites the limitation “the standard.. ” in line 7. There is insufficient antecedent basis for this limitation in the claim. For purpose of examination, examiner is interpreting this term as “the assignment standard...”.
Claim 16 recites the limitation "The storage medium according to..." in line 1. There is insufficient antecedent basis for this limitation in the claim. For purpose of examination, examiner is interpreting this term as “The computer-readable storage medium according to...”.
Claims 10 and 17 recites similar limitation to those of claim 16, and thus are rejected for reasons set forth in the rejection of claim 3.
Claims 4-7, 11-14, 18-20 are dependent on claim 3, 10 and 17, thus are rejected for reasons set forth in the rejection of claim 3, 10 and 17.
Claims 17-20 recites similar limitation to those of claim 16 “The storage medium according to...” , and thus are rejected for reasons set forth in the rejection of claim 16.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more.
STEP 1
Claim 1-7 are a method type claim. Claim 8-14 are an electronic device type claim. Therefore, claims 1-14 are directed to either a process, machine, manufacture or composition of matter.
Claims 15-20 are a computer-readable storage medium type claim. Therefore, claims 15-20 do not fall within at least one of the four categories of patent eligible subject matter.
Regarding claim 15:
Subject Matter Eligibility Analysis Step 1:
Independent claim 15 is rejected under 35 U.S.C. 101 because the claimed invention is directed to non-statutory subject matter. The claim does not fall within at least one of the four categories of patent eligible subject matter because under the Broadest Reasonable Interpretation (BRI) the plain meaning of the “computer readable medium” of claim 1 encompasses signals per se. The claimed “computer readable medium” is broader than the “non-transitory computer-readable medium” in paragraph [0065] of the instant application. As understood in light of the specification, the broadest reasonable interpretation of claim 1 encompasses signals which are not within one of the four statutory categories of invention. See MPEP 2106.03(I). It is suggested that claim 15 be amended to recite a “A non-transitory” computer readable medium” to overcome this rejection.2A Prong 1:
assigning a plurality of operator groups to a plurality of execution units based on a plurality of segmentation methods; (mental process – of assigning a plurality of operator group to a plurality of execution unit based on a segmentation method can be performed by the human mind with the help of pen and paper (e.g., evaluation & judgment). For example, a person can divide a neural network into a plurality of operator groups/subnetworks and assign the groups/subnetworks to a plurality of processing units such as CPU, GPU, and processor ).
determining operation times of the plurality of execution units and discrete degree of the operation times of the plurality of execution units in each of the plurality of segmentation methods; (mental process in combination with mathematical concept – this claim limitation recites a metal process of determining the processing time/operation time of a plurality of execution unit and recites a mathematical calculation such as determining a discrete degree that can be determined by calculating a standard deviation as described in paragraph [0046-47] of the instant application (e.g., abstract idea such as a mental process of evaluation & judgment as well a mathematical calculation)).
and segmenting the neural network according to the segmentation method with a lowest discrete degree (mental process – of segmenting the neural network according to the segmentation method with a lowest discrete degree can be performed by the human mind with the help of pen and paper (e.g., evaluation & judgment)).
2A Prong 2 & 2B: This judicial exception is not integrated into a practical application.
Additional elements:
A computer-readable storage medium having instructions stored thereon, when the instructions are executed by a processor of an electronic device, the processor is configured to perform a method for segmenting a neural network, wherein the method comprises: (This is directed to using computers or other machinery merely as a tool to perform an existing process. See MPEP 2106.05(f)).
Regarding claim 1: 2A Prong 1:
assigning a plurality of operator groups to a plurality of execution units based on a plurality of segmentation methods; (mental process – of assigning a plurality of operator group to a plurality of execution unit based on a segmentation method can be performed by the human mind with the help of pen and paper (e.g., evaluation & judgment). For example, a person can divide a neural network into a plurality of operator groups/subnetworks and assign the groups/subnetworks to a plurality of processing units such as CPU, GPU, and processor ).
determining operation times of the plurality of execution units and discrete degree of the operation times of the plurality of execution units in each of the plurality of segmentation methods; and (mental process in combination with mathematical concept – this claim limitation recites a metal process of determining the processing time/operation time of a plurality of execution unit and recites a mathematical calculation such as determining a discrete degree that can be determined by calculating a standard deviation as described in paragraph [0046-47] of the instant application (e.g., abstract idea such as a mental process of evaluation & judgment as well a mathematical calculation)).
segmenting the neural network according to the segmentation method with a lowest discrete degree (mental process – of segmenting the neural network according to the segmentation method with a lowest discrete degree can be performed by the human mind with the help of pen and paper (e.g., evaluation & judgment)).
2A Prong 2 & 2B: This judicial exception is not integrated into a practical application.
Additional elements:
A method for segmenting a neural network implemented in an electronic device comprising: (This is directed to using computers or other machinery merely as a tool to perform an existing process. See MPEP 2106.05(f)).
Regarding claim 8: is rejected under the same rational of claim 1. Claim 8 only recites the additional elements of An electronic device comprising: at least one processor; and a storage device coupled to the at least one processor and storing instructions for execution by the at least one processor to cause the at least one processor to... which is directed to using computers or other machinery merely as a tool to perform an existing process. See MPEP 2106.05(f).
Regarding claim 2: Depends on claim 1, thus the rejection of claim 1 is incorporated.2A Prong 1:
segmenting each of a plurality of operators into a plurality of sub-operators, the operator group comprising the operators and the sub-operators (mental process – of segmenting each of a plurality of operators into a plurality of sub-operators, the operator group comprising the operators and the sub-operators can be performed by the human mind with the help of pen and paper (e.g., evaluation & judgment)).
2A Prong 2 and 2B: None.
Regarding claim 3: Depends on claim 2, thus the rejection of claim 2 is incorporated.2A Prong 1:
wherein assigning a plurality of operator groups to a plurality of execution units based on a plurality of segmentation methods comprises: (mental process – of assigning a plurality of operator groups to a plurality of execution units can be performed by the human mind with the help of pen and paper (e.g., evaluation & judgment)).
assigning an operator or sub-operator to the execution unit that has not completed assignment of the operator group; (mental process – of assigning an operator or sub-operator to the execution unit that has not completed assignment of the operator group can be performed by the human mind with the help of pen and paper (e.g., evaluation & judgment)).
determining whether an operation time of the execution unit meets an assignment standard; (mental process – of determining whether an operation time of the execution unit meets an assignment standard can be performed by the human mind with the help of pen and paper (e.g., evaluation & judgment)).
in response that the operation time of the execution unit meets the assignment standard, assigning a next operator or sub-operator to the execution unit; and (mental process – of assigning a next operator or sub-operator to the execution unit based on the operation time of the execution unit meets the assignment standard can be performed by the human mind with the help of pen and paper (e.g., evaluation & judgment)).
in response that the operation time of the execution unit does not meet the assignment standard, cancelling assignment of the operator or the sub-operator, and assigning the operator or the sub- operator to the execution unit that has not completed the assignment of operator group (mental process – of cancelling assignment of the operator or the sub-operator, and assigning the operator or the sub- operator to the execution unit that has not completed the assignment of operator group based on the operation time of the execution unit does not meet the assignment standard can be performed by the human mind with the help of pen and paper (e.g., evaluation & judgment)).
2A Prong 2 and 2B: None.
Regarding claim 4: Depends on claim 3, thus the rejection of claim 3 is incorporated.2A Prong 1:
...assigning a plurality of operator groups to a plurality of execution units based on a plurality of segmentation methods further comprises: (mental process – of assigning a plurality of operator groups to a plurality of execution units can be performed by the human mind with the help of pen and paper (e.g., evaluation & judgment)).
calculating an average operation time of the plurality of execution units according to the operation time of the plurality of operators and the plurality of sub-operators, and a number of execution units (mathematical concept – of calculating an average operation time of the plurality of execution units according to the operation time of the plurality of operators and the plurality of sub-operators, and a number of execution units can be calculated according to the formula as described in paragraph [0032-33] and formula (1) of the instant application (e.g., mathematical calculation)).
2A Prong 2 and 2B: The claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception.
Additional elements:
wherein the operator and the sub-operator both have the operation time,... (The specification of data to be stored is understood to be a field of use limitation. See MEPE 2106.05(h)).
Regarding claim 5: Depends on claim 4, thus the rejection of claim 4 is incorporated.2A Prong 1:
wherein determining whether an operation time of the execution unit meets an assignment standard comprises: (mental process – of determining whether an operation time of the execution unit meets an assignment standard can be performed by the human mind with the help of pen and paper (e.g., evaluation)).
determining whether the operation time of the execution unit is less than the average operation time; (mental process – of determining whether the operation time of the execution unit is less than the average operation time can be performed by the human mind with the help of pen and paper (e.g., evaluation)).
in response that the operation time of the execution unit is less than the average operation time, determining that the operation time of the execution unit meets the assignment standard; and (mental process – of determining that the operation time of the execution unit meets the assignment standard based on the operation time of the execution unit is less than the average operation time can be performed by the human mind with the help of pen and paper (e.g., evaluation & judgement)).
in response that the operation time of the execution unit is greater than or equal to the average operation time, determining that the operation time of the execution unit does not meet the assignment standard (mental process – of determining that the operation time of the execution unit does not meet the assignment standard based on the operation time of the execution unit is greater than or equal to the average operation time can be performed by the human mind with the help of pen and paper (e.g., evaluation & judgement)).
2A Prong 2 and 2B: None.
Regarding claim 6: Depends on claim 4, thus the rejection of claim 4 is incorporated.2A Prong 1:
wherein determining operation times of the plurality of execution units and discrete degree of the operation times of the plurality of execution units in each of the plurality of segmentation methods comprises: (mental process in combination with mathematical concept – this claim limitation recites a metal process of determining the processing time/operation time of a plurality of execution unit and recites a mathematical calculation such as determining a discrete degree that can be determined by calculating a standard deviation as described in paragraph [0046-47] of the instant application (e.g., abstract idea such as a mental process of evaluation & judgment as well a mathematical calculation)).
calculating a standard deviation of the operation times of the plurality of execution units
according to the operation times of the plurality of execution unit and the average operation time; (mathematical concept – of calculating a standard deviation of the operation times of the plurality of execution units according to the operation times of the plurality of execution unit and the average operation time can be achieved by calculating a standard deviation as described in paragraph [0046-47] of the instant application (e.g., mathematical calculation)).
and determining the discrete degree according to the standard deviation, the standard deviation being proportional to the discrete degree of the operation times of the plurality of execution units (mental process – of determining the discrete degree according to the standard deviation, the standard deviation being proportional to the discrete degree of the operation times of the plurality of execution units can be performed by the human mind with the help of pen and paper (e.g., evaluation & judgment)).
2A Prong 2 and 2B: None.
Regarding claim 7: Depends on claim 1, thus the rejection of claim 1 is incorporated.2A Prong 1:
wherein segmenting the neural network according to the segmentation method with a lowest discrete degree comprises: (mental process – of segmenting the neural network according to the segmentation method with a lowest discrete degree can be performed by the human mind with the help of pen and paper (e.g., evolution & judgment)).
determining a smallest standard deviation in a plurality of standard deviations; and (mental process – of finding the smallest standard deviation among a plurality of standard deviations can be performed by the human mind with the help of pen and paper (e.g., evolution & judgment)).
segmenting the neural network according to the segmentation method with the smallest standard deviation (mental process – of segmenting the neural network according to the segmentation method with the smallest standard deviation can be performed by the human mind with the help of pen and paper (e.g., evolution & judgment)).
2A Prong 2 and 2B: None.
Regarding claim 9 and 16 : See rejection of claim 2, same rational applies.
Regarding claim 10 and17: See rejection of claim 3, same rational applies.
Regarding claim 11 and 18: See rejection of claim 4, same rational applies.
Regarding claim 12 and 19: See rejection of claim 5, same rational applies.
Regarding claim 13 and 20: See rejection of claim 6, same rational applies.
Regarding claim 14: See rejection of claim 7, same rational applies.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1, 8 and 15 are rejected under 35 U.S.C. 103 as being unpatentable Zhong et al. WO/2022/012119 (hereinafter Zhong (1)) in view of Zhong et al. WO/2022/012118 (hereinafter Zhong (2)).
Regarding claim 1:
A method for segmenting a neural network implemented in an electronic device comprising: ( Zhong (1) Abstract teaches a method for splitting a model (i.e., neural network ) to be operated in an electronic device. Examiner notes that the terms partition, diving, splitting and “segmenting” are herein used interchangeably).
assigning a plurality of operator groups to a plurality of execution units based on a plurality of segmentation methods; (Examiner notes that the terms processing unit and “execution units” are herein used interchangeably. Zhong (1) [0043] teaches a model can be split such to obtain sub-parts (i.e., a plurality of operator groups) where each of the operator group is assigned to a plurality of processing units (i.e., CPU, NPU, GPU), this can be achieve by implementing plurality of splitting methods such as “data parallelization algorithm”, “operator parallelization algorithm”, “inter-layer pipeline algorithm” for which a person skilled in the relevant art will recognize these type of parallelization method allow to split and assign a model across multiple processing units (see [0049-0059])).
determining operation times of the plurality of execution units and discrete degree of the operation times of the plurality of execution units in each of the plurality of segmentation methods; ( Zhong (1) [0058] teaches obtaining operation times of the processing units such as 4 ms for the GPU & CPU. Further, paragraph [0046] of the instant application recites “the standard deviation is a value used to statistically represent the discrete degree in a statistical operation” for which Zhong [0092-0101] teaches a target condition includes “a standard deviation of a running time corresponding to each of the plurality of processing units” (i.e., a discrete degree) that is determined for each of the plurality of splitting methods (i.e., splitting and re-splitting) until the target condition is achieve).
Zhong (1) does not explicitly teaches the segmentation/splitting of the model is done according to the to the segmentation method with a lowest discrete degree.
Nevertheless, Zhong (2), teaches the following:
and segmenting the neural network according to the segmentation method with a lowest discrete degree ( Zhong (2) [0026] teaches performing “multiple model segmentation” (i.e., plurality of segmentation methods). Further, Zhong (2) [0021] teaches performing model segmentation and [0043-48] teaches the deviation is used to segment the model. Specifically, Zhong (2) [0048] teaches the segmentation is guided by the deviation value being less than “less than 5% of the minimum performance data” (i.e., lowest discrete degree)).
Zhong (2) is also in the same field of endeavor as Zhong (1) (machine learning – segmenting/splitting a model). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to include the functionality of segmenting a model according to segmentation method with the lowest discrete degree as being disclosed and taught by Zhong (2), in the system taught by Zhong (1) to yield the predictable results of improve the processing speed of the execution units ( Zhong (2) [0021] ).
Regarding claim 8: is rejected under the same rational of claim 1. Claim 8 only recites the additional elements of An electronic device comprising: at least one processor; and a storage device coupled to the at least one processor and storing instructions for execution by the at least one processor to cause the at least one processor to..., for which Zhong(1) [0117 - 0118] teaches an electronic device, one or more processor, a memory that can perform the contents of the embodiments.
Regarding claim 15: is rejected under the same rational of claim 1. Claim 15 only recites the additional elements of A computer-readable storage medium having instructions stored thereon, when the instructions are executed by a processor of an electronic device, the processor is configured to perform a method for segmenting a neural network, wherein the method comprises... , for which Zhong (1) [0123] teaches a computer-readable storage medium that “stores program code, and the program code can be invoked by a processor to perform the method described in the foregoing method embodiments”.
Claims 2-3, 9-10 and 16-17 are rejected under 35 U.S.C. 103 as being unpatentable over Zhong (1), Zhong (2) in further view of Zejda et al. US 12,093,806 B1 (hereinafter Zejda).
Regarding claim 2:
Zhong (1) and Zhong (2) teach The method according to claim 1, further comprising: ...the operator group comprising the operators... (Zhong (1) [0043] teaches each operator groups comprises operators).
Neither Zhong (1) and Zhong (2) teaches further comprising: segmenting each of a plurality of operators into a plurality of sub-operators, the operator group comprising the operators and the sub-operators.
Nevertheless Zejda teaches the following:
further comprising: segmenting each of a plurality of operators into a plurality of sub-operators, the operator group comprising the operators and the sub-operators (
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395
792
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Greyscale
According to applicant specification “the operators and the sub-operators in the neural network may be assigned to a plurality of operator groups, such as an operator group 1, an operator group 2, etc.” for which Zejda (see highlighted section of Fig. 1 above) teaches a neural network – element 110 that includes operations - element 114a-114n that can be divided into subgraphs (i.e.,. sub-operators), see col. 8:6-8. teaches the operations of the layers of the neural network may be divided into subgraphs (col. 8:6-8)).
Zejda is also in the same field of endeavor as Zhong (1) and Zhong (2) (machine learning – model division/segmentation ). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to include the functionality of dividing each of a plurality of operators into a plurality of sub-operators, as being disclosed and taught by Zejda, in the system taught by Zhong (1) and Zhong (2) to yield the predictable results of “improve the performance of systems executing neural networks by avoiding compile-time complexity” (see Zejda col. 3: 36-39). Regarding claim 3:
Zhong (1), Zhong (2) and Zejda teaches The method according to claim 2.
Zhong (1) specifically teaches wherein assigning a plurality of operator groups to a plurality of execution units based on a plurality of segmentation methods comprises: assigning an operator or sub-operator to the execution unit that has not completed assignment of the operator group; (Zhong (1) [0043] teaches a model can be split such to obtain sub-parts (i.e., a plurality of operator groups) where each of the operator group is assigned to a plurality of processing units (i.e., CPU, NPU, GPU)).
determining whether an operation time of the execution unit meets an assignment standard; (Zhong (1) [0097-98] teaches determining if the time consumption (operation time) of the processing unit meets the “target condition” (i.e., assignment standard)).
Zhong (1) and Zejda do not explicitly teaches in response that the operation time of the execution unit meets the assignment standard, assigning a next operator or sub-operator to the execution unit; and in response that the operation time of the execution unit does not meet the assignment standard, cancelling assignment of the operator or the sub-operator, and assigning the operator or the sub- operator to the execution unit that has not completed the assignment of operator group.
However, Zhang (2) teaches the following:
assigning an operator or sub-operator to the execution unit that has not completed assignment of the operator group;
determining whether an operation time of the execution unit meets an assignment standard; ( Zhong (2) [0039] teaches obtaining performance parameters of each processing unit and [0042] teaches “detecting whether the performance parameter meets a target condition”. The “target condition” or “performance target condition” can be view as the “assignment standard”).
in response that the operation time of the execution unit meets the assignment standard, assigning a next operator or sub-operator to the execution unit; and ( Zhong (2) [0042] teaches detecting whether the performance parameter of the processing unit meets a target condition. Further, Zhong (2) [0054] teaches if the performance parameter meets the performance target condition (assignment standard) the sub-part (operator) is assigned to the processing unit such that it can be executed).
in response that the operation time of the execution unit does not meet the assignment standard, cancelling assignment of the operator or the sub-operator, and assigning the operator or the sub- operator to the execution unit that has not completed the assignment of operator group ( Zhong (2) [0042] teaches detecting whether the performance parameter of the processing unit meets a target condition. Further, [0049] teaches “if the performance parameter does not meet the performance target condition” the sub-part (operator) are not assigned to the processing units that do not meet the performance target condition).
Regarding claim 9: is an electronic device type claim comprising limitations similar to those of claim 2 , therefore is rejected under the same rational of claim 2.
Regarding claim 10: is an electronic device type claim comprising limitations similar to those of claim 3 , therefore is rejected under the same rational of claim 3.
Regarding claim 16: is a storage medium type claim comprising limitations similar to those of claim 2 , therefore is rejected under the same rational of claim 2.
Regarding claim 17: is a storage medium type claim comprising limitations similar to those of claim 3 , therefore is rejected under the same rational of claim 3.
Claims 4, 6, 11, 13, 18 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Zhong (1), Zhong (2) and Zejda in further view of Kannan et al. US 11,797,280 B1 (hereinafter Kannan).
Regarding claim 4:
Zhong (1), Zhong (2) and Zejda teach The method according to claim 3. Zhong (1) specifically teaches assigning a plurality of operator groups to a plurality of execution units based on a plurality of segmentation methods further comprises: (Zhong (1) [0043] teaches a model can be split such to obtain sub-parts (i.e., a plurality of operator groups) where each of the operator group is assigned to a plurality of processing units (i.e., CPU, NPU, GPU). Examiner notes that the terms processing unit and “execution units” are herein used interchangeably).
Zejda teaches: wherein the sub-operator both have the operation time, (Zejda Table 3 teaches Subgraph (i.e., sub-operator) with corresponding execution time ( i.e., operation time)).
Neither Zhong (1), Zhong(2) and Zejda teach wherein the operator and the sub-operator both have the operation time.
wherein the operator both have the operation time, (Kannan teaches col. 2: 5-7 “partition a neural network model for serial execution across multiple processing cores”. Examiner notes that the terms “processing cores” and “execution units” are herein used interchangeably. Further, Kannan col. 3: 19-26 and Fig. 2 teaches the NN is partitioned into N number of partitions (operators) with each processing core executing one of the partitions and col. 5: 64 teaches an execution latency (i.e., operation time) can be calculated for each partition”).
Kannan is also in the same field of endeavor as Zhong (1), Zhong (2) and Zejda (machine learning – partitioning/segmenting neural network model). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to include the functionality of obtaining the execution latency of each operator, as being disclosed and taught by Kannan, in the system taught by Zhong (1), Zhong (2) and Zejda to yield the predictable results of balancing the execution latencies of the partitions amongst the processing cores to improve the overall system throughput ( Kannan col. 2: 22-23).
Furthermore, it would be obvious to one skilled in the art to combine Zhong (1), Zhong(2), Zejda and Kannan to teach “calculating an average operation time of the plurality of execution units according to the operation time of the plurality of operators and the plurality of sub-operators, and a number of execution units”. The motivation to do so, is because paragraph [0032-33] of the instant application teaches “the average operation time TE is calculated according to the following formula (1): TE=T/N [wherein...] T represents a total operation time of the operators and the sub-operators, and N represents the number of the execution units”, for which a person of ordinary skill in the relevant field will be motivated to modify Zhong (2) mean/average value formula
E
p
=
E
1
+
E
2
…
E
n
/
n
( where E represents the mean value, E is the performance data of the n processing unit, and n is the number of the processing units. See [0043-44]) and simple substitute the element
E
1
+
E
2
…
E
n
for the operation time of the plurality of operators, as described in Kannan col. 5: 64, and the operation time of the plurality of sub-operators, as described in Zejda Table 3 to obtain the average operation time of the plurality of execution units.
Regarding claim 6:
Zhong (1), Zhong (2), Zejda, and Kannan teach The method according to claim 4.
Zhong (1) specifically teaches wherein determining operation times of the plurality of execution units and discrete degree of the operation times of the plurality of execution units in each of the plurality of segmentation methods comprises: ( Zhong (1) [0058] teaches obtaining operation times of the processing units such as 4 ms for the GPU & CPU. Further, paragraph [0046] of the instant application recites “the standard deviation is a value used to statistically represent the discrete degree in a statistical operation” for which Zhong [0099] teaches a target condition includes “a standard deviation of a running time corresponding to each of the plurality of processing units” (i.e., a discrete degree)).
calculating a standard deviation of the operation times of the plurality of execution units according to the operation times of the plurality of execution unit and the average operation time; (Zhong (1) [0099-0101] teaches calculating the standard deviation according to
T
1
i
(i.e., the operation times of the plurality of execution unit) and
T
1
(i.e, the average operation time)).
and determining the discrete degree according to the standard deviation, (Zhong (1) teaches the standard deviation which as described in paragraph [0046] of the instant application is “a value used to statistically represent the discrete degree in a statistical operation”, therefore the “standard deviation” described in in Zhong (1) [0099-0101] can be used to determine the discrete degree).
Zhong (1) does not specifically teaches ...the standard deviation being proportional to the discrete degree of the operation times of the plurality of execution units.
However, Zhong (2) teaches the following:
...the deviation being proportional to the discrete degree of the operation times of the plurality of execution units (Zhong (2) [0046-48] teaches the deviation being proportional to the discrete degree, that is the smaller the value of the standard deviation, “less than 5% of the minimum performance data”, the lower is the discrete degree of the performance data (execution time) of the processing unit).
Regarding claim 11: is an electronic device type claim comprising limitations similar to those of claim 4 , therefore is rejected under the same rational of claim 4.
Regarding claim 13: is an electronic device comprising limitations similar to those of claim 6 , therefore is rejected under the same rational of claim 6.
Regarding claim 18: is a storage medium type claim comprising limitations similar to those of claim 4 , therefore is rejected under the same rational of claim 4.
Regarding claim 20: is a storage medium type claim comprising limitations similar to those of claim 6 , therefore is rejected under the same rational of claim 6.
Claim 5, 12 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Zhong (1), Zhong (2), Zejda, Kannan in further view of Fischer at al. US 2008/0071947 A1 (hereinafter Fischer).
Regarding claim 5:
Zhong (1), Zhong (2), Zejda, and Kannan teach The method according to claim 4. Zhong (1) teaches wherein determining whether an operation time of the execution unit meets an assignment standard comprises: (Zhong (1) [0097-98] teaches determining if the time consumption (operation time) of the processing unit meets the “target condition” (i.e., assignment standard)).
Neither Zhong (1), Zhong (2), Zejda, and Kannan disclose determining whether the operation time of the execution unit is less than the average operation time; in response that the operation time of the execution unit is less than the average operation time, determining that the operation time of the execution unit meets the assignment standard; and in response that the operation time of the execution unit is greater than or equal to the average operation time, determining that the operation time of the execution unit does not meet the assignment standard.
However, Fischer teaches the following:
determining whether the operation time of the execution unit is less than the average operation time; (Fischer [0024] & Fig. 5 element 90 teaches calculating the processing time of an execution unit such as CPU and element 92 teaches comparing the average processing time (i.e., average operation time ) to a threshold).
in response that the operation time of the execution unit is less than the average operation time, determining that the operation time of the execution unit meets the assignment standard; and ( Fischer [0024] and Fig. 5 teaches “ if the average processing time does not exceed the threshold”, determining load balancing is not “considered beneficial” and thus by-passed, which can be view as “determining that the operation time of the execution unit meets the assignment standard”).
in response that the operation time of the execution unit is greater than or equal to the average operation time, determining that the operation time of the execution unit does not meet the assignment standard ( Fischer [0024] and Fig. 5 teaches if the average processing time exceed the threshold, determining load balancing is considered beneficial and thus being performed, which can be view as “determining that the operation time of the execution unit does not meet the assignment standard”).
Fischer is also in the same field of endeavor as Zhong (1), Zhong (2), Zejda, and Kannan (electric digital processing). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to include the functionality of determining that the execution time of the processing unit meets or not a threshold, as being disclosed and taught by Fischer, in the system taught by Zhong (1), Zhong (2), Zejda, and Kannan to yield the predictable results of “improve the efficiency of interrupt servicing of the CPU” (see Fischer [0028]).
Regarding claim 12: is an electronic device type claim comprising limitations similar to those of claim 5 , therefore is rejected under the same rational of claim 5.
Regarding claim 19: is a storage medium type claim comprising limitations similar to those of claim 5 , therefore is rejected under the same rational of claim 5.
Claim 7 and 14 is rejected under 35 U.S.C. 103 as being unpatentable over Zhong (1), Zhong (2), Zejda, Kannan in further view of Chen et al. US 2010/0037006 A1 (hereinafter Chen).
Regarding claim 7:
Zhong (1), Zhong (2), Zejda, and Kannan teach The method according to claim 6. Zhong (2) specifically teaches wherein segmenting the neural network according to the segmentation method with a lowest discrete degree comprises: ( Zhong (2) [0021] teaches model segmentation and [0043-48] teaches the deviation is used to segment the model. Specifically, [0048] teaches the segmentation is guided by the deviation value being less than “less than 5% of the minimum performance data” (i.e., lowest discrete degree)).
segmenting the neural network according to the segmentation method with the smallest standard deviation (Zhang (2) [0048] teaches segmenting the model based on the deviation value being the smallest (i.e., less than 5% the performance data)).
Neither Zhong (1), Zhong (2), Zejda, Kannan teach being able to determine the smallest standard deviation in multiple standard deviations.
Nevertheless, Chen teaches:
determining a smallest standard deviation in a plurality of standard deviations; and (Chen [0032] teaches the “standard deviation is a measure of the dispersion” (i.e., discrete degree) of a collection of numbers and [0033] teaches determining the smaller standard deviation in a plurality of standard deviation of data sets).
Chen is also in the same field of endeavor as Zhong (1), Zhong (2), Zejda, and Kannan (electric digital processing). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to include the functionality of determining the smallest’s standard deviation from multiple standard deviations, as being disclosed and taught by Chen, in the system taught by Zhong (1), Zhong (2), Zejda, and Kannan to yield the predictable results of improve the accuracy of static wear leveling technology by applying the theory of standard deviation as used in the statistics field (see Chen [0031])..
Regarding claim 14: is an electronic device type claim comprising limitations similar to those of claim 7 , therefore is rejected under the same rational of claim 7.
Conclusion
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/G.G.F./Examiner, Art Unit 2127
/ABDULLAH AL KAWSAR/Supervisory Patent Examiner, Art Unit 2127
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