Prosecution Insights
Last updated: April 19, 2026
Application No. 17/972,488

METHODS AND APPARATUS FOR USING ROBOTICS TO ASSEMBLE/DE-ASSEMBLE COMPONENTS AND PERFORM SOCKET INSPECTION IN SERVER BOARD MANUFACTURING

Non-Final OA §102§103
Filed
Oct 24, 2022
Examiner
TUGBANG, ANTHONY D
Art Unit
2896
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Intel Corporation
OA Round
1 (Non-Final)
77%
Grant Probability
Favorable
1-2
OA Rounds
3y 9m
To Grant
99%
With Interview

Examiner Intelligence

Grants 77% — above average
77%
Career Allow Rate
816 granted / 1058 resolved
+9.1% vs TC avg
Strong +23% interview lift
Without
With
+22.6%
Interview Lift
resolved cases with interview
Typical timeline
3y 9m
Avg Prosecution
40 currently pending
Career history
1098
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
50.2%
+10.2% vs TC avg
§102
22.0%
-18.0% vs TC avg
§112
25.9%
-14.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1058 resolved cases

Office Action

§102 §103
DETAILED ACTION Election/Restrictions Applicant’s election of the invention of Group I, Claims 1 through 8, in the reply filed on January 21, 2026 is acknowledged. Because applicant did not distinctly and specifically point out the supposed errors in the restriction requirement, the election has been treated as an election without traverse (MPEP § 818.01(a)). Claims 9 through 20 have been withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on January 21, 2026. Specification Applicant is reminded of the proper content of an abstract of the disclosure. A patent abstract is a concise statement of the technical disclosure of the patent and should include that which is new in the art to which the invention pertains. The abstract should not refer to purported merits or speculative applications of the invention and should not compare the invention with the prior art. If the patent is of a basic nature, the entire technical disclosure may be new in the art, and the abstract should be directed to the entire disclosure. If the patent is in the nature of an improvement in an old apparatus, process, product, or composition, the abstract should include the technical disclosure of the improvement. The abstract should also mention by way of example any preferred modifications or alternatives. Where applicable, the abstract should include the following: (1) if a machine or apparatus, its organization and operation; (2) if an article, its method of making; (3) if a chemical compound, its identity and use; (4) if a mixture, its ingredients; (5) if a process, the steps. Extensive mechanical and design details of an apparatus should not be included in the abstract. The abstract should be in narrative form and generally limited to a single paragraph within the range of 50 to 150 words in length. See MPEP § 608.01(b) for guidelines for the preparation of patent abstracts. Applicant is reminded of the proper language and format for an abstract of the disclosure. The abstract should be in narrative form and generally limited to a single paragraph on a separate sheet within the range of 50 to 150 words in length. The abstract should describe the disclosure sufficiently to assist readers in deciding whether there is a need for consulting the full patent text for details. The language should be clear and concise and should not repeat information given in the title. It should avoid using phrases which can be implied, such as, “The disclosure concerns,” “The disclosure defined by this invention,” “The disclosure describes,” etc. In addition, the form and legal phraseology often used in patent claims, such as “means” and “said,” should be avoided. The abstract of the disclosure is objected to because the content does not appear to directed to the claimed invention, e.g. apparatus or machine. Furthermore, it should avoid the use of phrases that can be implied, e.g. “The disclosure is…”. A corrected abstract of the disclosure is required and must be presented on a separate sheet, apart from any other text. See MPEP § 608.01(b). Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1 and 2 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by U.S. Publication 2019/0280405 to Iwai et al (hereinafter “Iwai”). Claim 1: Iwai discloses an apparatus (e.g. Fig. 1A) for manufacturing a computer system, the apparatus comprising: a collaborative robot (e.g. 1, Fig. 1A) including an end effector (e.g. 101, Fig. 1A or 1B); a camera (e.g. 20, Fig. 7A) operatively coupled to the collaborative robot; a memory (e.g. 12, Fig. 2) coupled to the collaborative robot (e.g. inside of 10, Fig. 1A); and processing circuitry (e.g. 10, Fig. 1A or 2) coupled to the memory, the processing circuitry configured to: receive image data of a computer component (e.g. 90, Fig. 1C), the image data collected by the camera operatively coupled to the collaborative robot (e.g. ¶ [0064]); determine, based on the image data, a coordinate location (e.g. 602s, Fig. 1C) for the computer component; and direct the collaborative robot to secure the computer component (e.g. 90e of 90) to a printed circuit board (PCB)(e.g. 601) using the end effector based on the coordinate location (e.g. Figs. 4A to 4E, ¶ [0064]). Claim 2: Iwai discloses the apparatus for manufacturing of claim 1 wherein the collaborative robot in combination with the camera is configured to manufacture the computer system by securing the computer component (e.g. 90) to the PCB (e.g. 601), the computer system including the PCB (e.g. 601/602, ¶ [0053]). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Iwai in view U.S. Publication 2018/0331081 to Goh et al (hereinafter “Goh”). Iwai discloses the claimed apparatus as relied upon above in Claim 1, further including in an alternative embodiment, to direct the collaborative robot to secure pins (e.g. 199e, 199f or 190e, 190f, Fig. 6) of the computer component (e.g. 199 or 190) to the PCB based on the image data (e.g. ¶ [0066]), the PCB configured as a server board (e.g. to serve computer components) where the collaborative robot is configured to secure to the PCB. Iwai does not mention that the computer components are vendor-sourced, i.e. vendor-sourced computer components. Goh teaches that when manufacturing computer components with PCBs (e.g. Figs. 6A to 6C), the computer components can be vendor-sourced to allow different applications. In other words, by choosing computer components of different vendors, this allows for different PCB designs, hence different applications (e.g. ¶ [0024]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the component components of Iwai by allowing them to be chosen from different vendors (i.e. vendor-sourced computer components), as taught by Goh, to positively provide different PCB designs having a plurality of applications. Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Iwai in view U.S. Publication 2021/0384661 to Coteus et al (hereinafter “Coteus”). Iwai discloses the claimed apparatus as relied upon above in Claim 1, further including that the computer component is a component (e.g. 199 or 190) having a pin configuration (e.g. 199e, 199f or 190e, 190f) stored in the memory (e.g. 12), and wherein to determine the coordinate location for the computer component comprises to determine the coordinate location (e.g. 700e, 700f, Fig. 6) based on the pin configuration. While Iwai does mention that the computer component (e.g. 199, 190) is a capacitor, Iwai does not explicitly state that the computer component is a semiconductor memory socket component. Coteus teaches that a variety of components can be directed to and assembled to a PCB, which can include capacitors, semiconductor memory sockets (DIMMs), inductors, etc., in manufacturing completed circuits for PCBs (e.g. ¶ [0043]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the computer components of Iwai by utilizing them as semiconductor memory socket components, as taught by Coteus, in providing a complete PCB circuit that includes a variety of electrical components. Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Iwai in view of Coteus, as applied to Claims 1 and 4 above, and further in view of the teachings of U.S. Publication 2018/0177087 to Kito et al (hereinafter “Kito”) and U.S. Publication 2022/0101511 to Entman (hereinafter “Entman”). Iwai, as modified by Coteus, discloses the claimed apparatus as relied upon above in Claims 1 and 4, further including that the image data comprises 3D image data. The modified Iwai apparatus does not mention detecting a defect in the pins, or any pixel resolution. Kito teaches that a control unit (e.g. Fig. 8) can include as part of its algorithm (e.g. 104, 107, 108, etc.) when directing a computer component (e.g. 41) with pins (e.g. 45) to be mounted on PCBs (e.g. 43, Fig. 7), detecting defects in positioning. Kito discloses that defects are detected when there is a position deviation between the pins (e.g. 45) of the component and lands or holes on the PCB, such that when a defect occurs, the computer component is not placed on the PCB thus preventing any unreliable electrical connections (e.g. ¶¶ [0033], [0041]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the apparatus of Iwai by adding such an algorithm that detects defects in a pin, or pins, as taught by Kito, to thus prevent any unreliable electrical connections. Entman teaches that a camera (e.g. 360, Fig. 7) capturing an image of workpieces (e.g. 320) in general can have a resolution of greater than 1 megapixel at 0.0053 mm per pixel (5.3 microns per pixel), which falls within the claimed range of a minimum of 64 megapixels with 0.0025 mm per pixel (e.g. ¶ [0109]). This resolution of the camera of Entman provides increased precision of subsequent operations (e.g. ¶ [0001]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the camera of Iwai by utilizing the high resolution taught by Entman, to provide increased precision when directing the computer component to the PCB. Claims 6 and 7 are rejected under 35 U.S.C. 103 as being unpatentable over Iwai in view U.S. Publication 2020/0212010 to Kinsley et al (hereinafter “Kinsley”). Claim 6: Iwai discloses the claimed apparatus as relied upon above in Claim 1, further including that the processing circuitry is configured to direct the collaborative robot to insert a plurality of pins into the PCB (e.g. Fig. 6) using the end effector, the pins configured to receive a component module. Claim 7: Iwai further teaches that the processing circuitry is configured to direct the collaborative robot to lift and insert the computer component into each of the openings of the PCB (e.g. Fig. 6), each of the openings configured to hold the computer components. Iwai does not teach that the pins are sockets and that the component module is specifically a semiconductor in-line memory module (DIMMs). Kinsley teaches that PCBs (e.g. 270, Fig. 2B) can have a plurality of sockets (e.g. 273, 274) inserted within it to receive semiconductor in-line memory modules (DIMMs) (e.g. ¶ [0018]). Such a connection provides additional semiconductor applications (e.g. clock signaling, highly dense integrated circuitry, etc. ¶¶ [0003], [0009]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have substituted the openings and computer component of Iwai, for the sockets and DIMMs, respectively, taught by Kinsley, when directing the collaborative robot to lift and insert, to thereby provide additional semiconductor applications that include PCBs. Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Iwai in view Kito. Iwai discloses the claimed apparatus as relied upon above in Claim 1. Iwai does not teach direct inspection of the computer component for socket pin defects based on the image data. To reiterate (from Claim 5 above), Kito teaches that a control unit (e.g. Fig. 8) can include as part of its algorithm (e.g. 104, 107, 108, etc.) when directing a computer component (e.g. 41) with pins (e.g. 45) to be mounted on PCBs (e.g. 43, Fig. 7), detecting defects in positioning. Kito discloses that as part of its camera, defects are detected from imaging when there is a position deviation between the pins (e.g. 45) of the component and lands or holes on the PCB (i.e. socket pin defects), such that when a defect occurs, the computer component is not placed on the PCB thus preventing any unreliable electrical connections (e.g. ¶¶ [0033], [0041]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the apparatus of Iwai by adding such an algorithm that detects defects in a pin thus providing direct inspection for socket pin defects, as taught by Kito, to positively prevent any unreliable electrical connections. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. a) Japanese Patent Publication, JP 2020-113568 discloses a collaborative robot (e.g. 10, Fig. 3) including an end effector (e.g. 12) and a camera (e.g. 31) to assemble a computer component (e.g. P) to a substrate (e.g. 7, see SOLUTION). b) Non-Patent Literature IEEE Publication to Baartman et al, entitled "Using coarse/fine manipulation with vision to place fine pitch SMD components", discloses a collaborative robot (e.g. Fig. 4) including an end effector and a camera to assemble a computer component to a PCB (e.g. see entire document). Any inquiry concerning this communication or earlier communications from the examiner should be directed to A. DEXTER TUGBANG whose telephone number is (571)272-4570. The examiner can normally be reached Mon - Fri 8:00 am to 5:00 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, JESSICA HAN can be reached at (571) 272-2078. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /A. DEXTER TUGBANG/ Primary Examiner Art Unit 2896
Read full office action

Prosecution Timeline

Oct 24, 2022
Application Filed
May 17, 2023
Response after Non-Final Action
Feb 07, 2026
Non-Final Rejection — §102, §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12597663
Method for Producing a High-Voltage Battery Unit and a High-Voltage Battery Unit
2y 5m to grant Granted Apr 07, 2026
Patent 12597593
Manufacturing Method for Traceability of Battery Electrodes with Fiducial Markers
2y 5m to grant Granted Apr 07, 2026
Patent 12597834
METHOD FOR MANUFACTURING STATOR FOR ROTARY ELECTRIC MACHINE
2y 5m to grant Granted Apr 07, 2026
Patent 12598707
METHOD OF MANUFACTURING MULTI-LAYER CIRCUIT BOARD INCLUDING EXTREME FINE VIA AND MULTI-LAYER CIRCUIT BOARD MANUFACTURED BY THE SAME
2y 5m to grant Granted Apr 07, 2026
Patent 12597558
SPIRAL CORE CURRENT TRANSFORMER FOR ENERGY HARVESTING APPLICATIONS
2y 5m to grant Granted Apr 07, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

AI Strategy Recommendation

Get an AI-powered prosecution strategy using examiner precedents, rejection analysis, and claim mapping.
Powered by AI — typically takes 5-10 seconds

Prosecution Projections

1-2
Expected OA Rounds
77%
Grant Probability
99%
With Interview (+22.6%)
3y 9m
Median Time to Grant
Low
PTA Risk
Based on 1058 resolved cases by this examiner. Grant probability derived from career allow rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month