DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 02/09/2026 has been entered.
Response to Amendment
Examiner acknowledges the amendments made to claim 1. New claims 14-18 have been added.
Response to Arguments
Applicant's arguments filed 02/09/2026 have been fully considered but they are respectfully found not persuasive.
In response to applicant's argument that the references fail to show certain features of the invention, it is noted that the features upon which applicant relies (i.e., “within-layer graded compositions”) as recited on page 11 of the remarks filed 02/09/2026, are not recited in the rejected claim(s). Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993).
Regarding the argument that Kudo does not disclose the amended limitation of:
“the quantum well structure is configured to exhibit type-II band alignment in which electrons are confined in the first semiconductor layer and the third semiconductor layer and holes are confined in the second semiconductor layer, establishing a type-II transition from a conduction-band state confined in the first or third semiconductor layer to a valence-band state confined in the second semiconductor layer”
Examiner respectfully notes that Kudo forms a type-II band alignment as noted in the abstract of Kudo which states “The semiconductor laser device has a first semiconductor layer 5 and second semiconductor layers 4, the layer 5 and the layers 4 forming a type-II heterojunction structure, in which an energy of conduction band edge of said first conductor layer 5 is larger than the energy of conduction band of said second semiconductor layers 4.” Further, the rejection of claim 1 below discloses the additional information regarding the structure of the type-II structure formed by Kudo.
Regarding the argument that a person of ordinary skill in the art would have had no motivation to shift from barrier-side grading in type-I to intra-well grading in electron-confining layers of a type-II structure. Examiner notes that the rejection is based on the combination of the primary reference of Kudo which discloses a type-II quantum well structure (see rejection of claim 1 below) in view of Kim and Ju and therefore is not shifting from barrier-side grading in type-I to intra-well grading in a type-II structure since the modification is to modify the type-II structure of Kudo to include the first and third semiconductor layers to have a graded bandgap as shown in Kim and Ju. Further,
Kim discloses in paragraph [0012] “first includes layer 31 is present between the lower barrier layer 11 and the well layer 20” and therefore directly discloses the use of a gradient layer including grading withing electron-confining layers that are different from changing the bandgap of a barrier layer.
Further, regarding the remarks made on page 11 of the Remarks filed 02/09/2026 directed toward new claims 14-18, Applicant's arguments do not comply with 37 CFR 1.111(c) because they do not clearly point out the patentable novelty which he or she thinks the claims present in view of the state of the art disclosed by the references cited or the objections made. Further, they do not show how the amendments avoid such references or objections.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-3,5,7,8,11-13, 17 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Kudo et al. (hereinafter Kudo) (US 20030086461 A1) in view of Kim (KR 20210102647 A) and further in view of Ju et al. (hereinafter Ju) (KR 20130123592 A) (Examiner notes attached machine translations of Kim and Ju will be used for the claim mapping of Kim and Ju for the remainder of the instant office action. See PTO-892 form)
Regarding claim 1, Kudo discloses in Fig. 8,
A semiconductor stack [41,42,6a,10,6b,48] (Para. [0060]) comprising:
a first-conductivity-type layer [42] (Para. [0060]) formed of a III-V compound semiconductor (Para. [0060]);
a quantum well structure [10] (Para. [0017]) formed of III-V compound semiconductors (Para. [0060]); and
a second-conductivity-type layer [48] (Para. [0060]) formed of a III-V compound semiconductor (Para. [0060]) and having a conductivity type different from a conductivity type of the first-conductivity-type layer [42] (Para. [0060]),
wherein the first-conductivity-type layer [42], the quantum well structure [10], and the
second-conductivity-type layer [48] are stacked in this order (Fig. 8) (Para. [0060]),
the quantum well structure [10] includes
a first semiconductor layer [4a] (Para. [0060]),
a second semiconductor layer [5] (Para. [0060]) disposed on and in contact with the first semiconductor layer [4a] (Para. [0060]) at a first interface of the second semiconductor layer [interface of 4a and 5], and
a third semiconductor layer [4b] (Para. [0060]) disposed on and in contact with the second semiconductor layer [5] (Para. [0060]) at a second interface of the second semiconductor layer [interface of 4b and 5], the second interface being opposite the first interface in a thickness direction of the second semiconductor layer [interface of 4a and 5 opposite to interface of 4b and 5], and
the quantum well structure [10] (Para. [0033]) is configured to exhibit type-II band alignment (Para. [0033]) in which electrons are confined in the first semiconductor layer [4a Fig. 2] and the third semiconductor layer [4b Fig. 2] and holes are confined in the second semiconductor layer [5 Fig. 2] (Paras. [0016,0017,0033]), establishing a type-II transition from a conduction-band state confined in the first [4a Fig. 2] or third semiconductor layer [4b Fig. 2] to a valence-band state confined in the second semiconductor layer [5 Fig. 2 ] (Paras. [0015-0017])
Kudo fails to disclose,
in the first semiconductor layer and the third semiconductor layer, compositions of the first semiconductor layer and the third semiconductor layer are graded such that a bandgap of each of the first semiconductor layer and the third semiconductor layer decreases toward the respective first interface and second interface of the second semiconductor layer
Kim discloses in Fig. 2,
a first [11] and third [12] (Para. [0012]) semiconductor layer with changing bandgaps [31 and 32] (Para. [0012]) that decrease toward respective first [interface of 11 and 20] and second interfaces [interface of 12 and 20] of a second semiconductor layer [20] (Para. [0012])
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement the graded bandgap changes of the first and third semiconductor layers of Kim into the first and third semiconductor layers of Kudo for the purpose of reducing strain. (Kim Para. [0013])
Kudo in view of Kim fails to disclose,
in the first semiconductor layer and the third semiconductor layer, compositions of the first semiconductor layer and the third semiconductor layer are graded such that a bandgap of each of the first semiconductor layer and the third semiconductor layer decreases
Ju discloses in Fig. 2,
Graded bandgaps [120,140] (Paras. [0021-0023]) decreasing toward a well layer [120] (Para. [0022]) due to varying the concentration of indium in the compositions of the layers [120,140] (Paras. [0021-0023])
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement the grading of compositions to change the bandgap as shown in Ju with the first and third semiconductor layers of Kudo in view of Kim for the purpose of selectively controlling the bandgap of the layers (Ju Para. [0023])
Regarding claim 2, Kudo in view of Kim and Ju as applied to claim 1 above further discloses in Fig. 8 of Kudo,
wherein the first semiconductor layer [4a] and the third semiconductor layer [4b] are formed of the same III-V compound semiconductor (Para. [0060]).
Regarding claim 3, Kudo in view of Kim and Ju as applied to claim 2 above further discloses in Fig. 8 of Kudo,
wherein the first semiconductor layer [4a] and the third semiconductor layer [4b] have the same thickness (Para. [0060]).
Regarding claim 5, Kudo in view of Kim and Ju as applied to claim 2 above further discloses,
wherein the compositions of the first semiconductor layer [Kudo 4a Fig. 2] and the third semiconductor layer [Kudo 4b Fig. 2] are changed at a constant rate toward the second semiconductor layer [Kudo 5 Fig. 2] (Ju Paras. [0040,0045])
Regarding claim 7, Kudo in view of Kim and Ju as applied to claim 1 above further discloses in Kudo Fig 8,
wherein the first semiconductor layer [4a], the second semiconductor layer [5], and the third semiconductor layer [4b] each have a thickness of 1 nm to 8 nm (Para. [0060]).
Regarding claim 8, Kudo in view of Kim and Ju as applied to claim 1 above further discloses in Kudo Fig. 8,
A light-emitting device (Fig. 8) (Para. [0060,0062]) comprising:
the semiconductor stack [41,42,6a,10,6b,48] (Para. [0060]) according to claim 1; and
an electrode [502] (Para. [0058]) disposed in contact with the semiconductor stack (Para. [0058,0061]).
Regarding claim 11, Kudo in view of Kim and Ju as applied to claim 1 above further discloses in Kudo Fig. 8,
wherein the first-conductivity-type layer [42] is an n-type cladding layer (Para. [0060]) and the second-conductivity-type layer [48] is a p-type cladding layer (Para. [0060])
Regarding claim 12, Kudo in view of Kim and Ju as applied to claim 1 above further discloses in Kudo Fig. 8,
Wherein a total thickness of the first semiconductor layer [4a], the second semiconductor layer [5] and the third semiconductor layer [4b] is smaller than each thickness of the first-conductivity-type layer [42] and the second-conductivity-typer layer [48] (Para. [0060])
Regarding claim 13, Kudo in view of Kim and Ju as applied to claim 1 above further discloses in Kudo Fig. 8,
Wherein the first-conductivity-type layer [42] and the second-conductivity-type layer [48] each have a thickness of 300nm to 3000nm (Para. [0060])
Regarding claim 17, Kudo in view of Kim and Ju as applied to claim 1 above discloses the device outlined in the rejection of claim 1 but fails to disclose,
wherein the first semiconductor layer is disposed on and in contact with the first-conductivity-type layer, and the third semiconductor layer is disposed on and in contact with the second- conductivity-type layer.
Ju discloses in Fig. 2,
a first semiconductor layer [120] (Para. [0021]) is disposed on and in contact with a first-conductivity-type layer [110] (Para. [0021]) (See Fig. 2), and a third semiconductor layer [140] (Para. [0025]) is disposed on and in contact with a second- conductivity-type layer [150] (Para. [0026]) (See Fig. 2).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement the direct contact of the first and third semiconductor layers to the first and second conductivity type layers (respectively) as show in Ju with the first and third semiconductor layers of the modified device of Kudo for the purpose of concentration the electrons of the conduction band in the first semiconductor layer and moving holes directly from the valence band of the p-type cladding layer to the third semiconductor layer. (Ju Paras. [0031,0036])
Regarding claim 18, Kudo in view of Kim and Ju as applied to claim 1 above discloses the device outlined in the rejection of claim 1 and further discloses,
wherein, in each of the first semiconductor layer [Kudo 4a Fig. 2] (Kudo Para. [0015])and the third semiconductor layer [Kudo 4b Fig. 2] (Kudo Para. [0015]), an In concentration increases toward the second semiconductor layer (Ju Para. [0045]), the In concentration is symmetrical with respect to the second semiconductor layer (Paras. [0045,0047]), and the In concentration is a linear function of distance from the second semiconductor layer (Ju Para. [0045]) (see Ju Fig. 2).
Kudo in view of Kim and Ju fails to disclose,
wherein the first semiconductor layer is disposed on and in contact with the first-conductivity-type layer, and the third semiconductor layer is disposed on and in contact with the second- conductivity-type layer, and
Ju discloses in Fig. 2,
a first semiconductor layer [120] (Para. [0021]) is disposed on and in contact with a first-conductivity-type layer [110] (Para. [0021]) (See Fig. 2), and a third semiconductor layer [140] (Para. [0025]) is disposed on and in contact with a second- conductivity-type layer [150] (Para. [0026]) (See Fig. 2).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement the direct contact of the first and third semiconductor layers to the first and second conductivity type layers (respectively) as show in Ju with the first and third semiconductor layers of the modified device of Kudo for the purpose of concentration the electrons of the conduction band in the first semiconductor layer and moving holes directly from the valence band of the p-type cladding layer to the third semiconductor layer. (Ju Paras. [0031,0036])
Claims 4,15 and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Kudo in view of Kim and Ju as applied to claim 1 above, and further in view of Johnson et al. (hereinafter Johnson) (WO 0133677 A2).
Regarding claim 4, Kudo in view of Kim and Ju as applied to claim 1 above further discloses in Kudo Fig. 8,
a substrate [41] formed of GaAs (Para. [0060]) and stacked on an opposite side of the first-conductivity-type layer [42] from the quantum well structure [10] (Para. [0060]),
the III-V compound semiconductor constituting the second semiconductor layer [5] is
GaSbtAs1-t (Para. [0034,0060]) where 0<t<0.5
or (ii) GaBiuAs1-u, where 0<u<0.5 is satisfied. (Para. [0034,0060])
Kudo in view of Kim and Ju fails to disclose,
wherein the III-V compound semiconductors constituting the first semiconductor layer and the third semiconductor layer are each InxGa1-xAsyN1-y, and
where 0 <x<0.5, 0.9 <y<1.0 are satisfied
Johnson discloses in Fig. 17,
wherein the III-V compound semiconductors constituting a first semiconductor layer and a third semiconductor layer [Layers D] are each InxGa1-xAsyN1-y, and
where 0 <x<0.5, 0.9 <y<1.0 are satisfied (Page 13, lines 5 and 6 and Page 20, Lines 9-20)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement the composition of the first and third semiconductor layers of Johnson into the device of Kudo in view of Kim and Ju for the purpose of producing lasers having sufficiently long lifetimes. (Johnson Page 13, lines 19-22)
Examiner notes for the purposes of examination in the instant application the interpretation of the limitation “the second semiconductor layer is GaSbtAs1-t or GaBiuAs1-u” is “the second semiconductor layer is GaSbtAs1-t”, where 0 < t < 0.5 is satisfied.
Regarding claim 15, Kudo in view of Kim, Ju and Johnson as applied to claim 4 above further discloses,
wherein the III-V compound semiconductors constituting the first semiconductor layer and the third semiconductor layer [Kudo 4a and 4b Fig. 2] are each InxGa1-xAsyN1-y where 0 < x < 0.5, 0.9 < y < 1.0 is satisfied [Johnson Fig. 17 Layers D] (Johnson Page 13, lines 5 and 6 and Page 20, Lines 9-20), and
in the first semiconductor layer and the third semiconductor layer [Kudo 4a and 4b Fig. 2], a concentration of In is symmetrical with respect to the second semiconductor layer [Kudo 5 Fig. 2 (Ju Paras. [0045,0047]).
Regarding claim 16, Kudo in view of Kim, Ju and Johnson as applied to claim 4 above further discloses,
wherein the III-V compound semiconductors constituting the first semiconductor layer and the third semiconductor layer [Kudo 4a and 4b Fig. 2] are each InxGa1-xAsyN1-y where 0 < x < 0.5, 0.9 < y < 1.0 is satisfied [Johnson Fig. 17 Layers D] (Johnson Page 13, lines 5 and 6 and Page 20, Lines 9-20), and in the first semiconductor layer and the third semiconductor layer [Kudo 4a and 4b Fig. 2], the value of x increases toward the second semiconductor [Kudo 5 Fig. 2] layer (Ju Paras. [0045,0047]).
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Kudo in view of Kim and Ju as applied to claim 1 above, and further in view of Kim et al. (hereinafter Kim 611) (US 20040256611 A1).
Regarding claim 6, Kudo in view of Kim Fig. 5 discloses the device outlined in the rejection of claim 1 above but fails to disclose,
wherein the compositions of the first semiconductor layer and the third semiconductor layer are changed in stages toward the second semiconductor layer.
Kim 611 discloses in Fig. 7,
Wherein the compositions of a first and third semiconductor layer [12 left and right Fig. 7] are changed in stages toward a second semiconductor layer [14]. (Para. 0029]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement the nonlinear compositional grading of Kim into the first and third semiconductor layers of the modified device of Kudo for the purpose of being able to create a funnel which directs carriers into the quantum well layers while being able to change the indium content at a non-constant rate. (Kim Para. [0029,0030])
Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Kudo in view of Kim and Ju as applied to claim 1 above, and further in view of Shatalov et al. (hereinafter Shatalov) (US 20160260867 A1).
Regarding claim 9, Kudo in view of Kim and Ju discloses the device outlined in the rejection of claim 1 above but fails to disclose,
Wherein the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer have the same thickness
Shatalov discloses in Fig. 3A,
An active layer including multiple layers [12 and 14] grown at equal thicknesses (Para. [0040])
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement the equal layer thicknesses of Shatalov into the layers of the modified device of Kudo for the purpose of selectively choosing a desired target thickness to match a specific wave function. (Shatalov Para. [0040])
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Kudo in view of Kim and Ju as applied to claim 1 above, and further in view of Morohashi et al. (hereinafter Morohashi) (US 20200403381 A1).
Regarding claim 10, Kudo in view of Kim and Ju discloses the device outlined in the rejection of claim 1 above but fails to disclose,
Wherein the second-conductivity-type layer contains C (carbon) as a p-type impurity therein
Morohashi discloses in Fig. 1,
a p-type conductivity layer [51] containing carbon as an impurity (Para. [0077])
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement the carbon doping and concentration of Morohashi into the p-type conductivity cladding layer of the modified device of Kudo for the purpose of suppressing optical loss. (Morohashi Para. [0077])
Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Kudo in view of Kim and Ju as applied to claim 1 above, and further in view of “GaAs1-xBix/GaNyAs1-y type-II quantum wells: novel strain-balanced heterostructures for GaAs-based near- and mid-infrared photonics” (hereinafter Broderick).
Regarding claim 14, Kudo in view of Kim and Ju discloses the device outlined in the rejection of claim 1 above but fails to disclose,
wherein the III-V compound semiconductor constituting the second semiconductor layer is GaBiuAs1-u where 0 < u < 0.5 is satisfied.
Broderick discloses,
a type-II quantum well structure comprising GaAs1-xBix where 0 < x <0.5 is satisfied (Page 1, Paragraph 1)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement the GaAsBi quantum well composition of Broderick as the composition of the second semiconductor layer of the modified device of Kudo for the purpose of offering optical emission and absorption at wavelengths up to 3µm. (Broderick Page 1, Paragraph 1)
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Examiner particularly notes (US 6931044 B2) which discloses a type-II structure comprising GaAsSb.
Further, examiner notes (US 20040061102 A1) which discloses a type-II quantum well structure including InGaAsN/GaAsSb materials. See PTO-892 form.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to HUNTER J NELSON whose telephone number is (571)270-5318. The examiner can normally be reached Mon-Fri. 8:30am-5:00 ET.
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/H.J.N./Examiner, Art Unit 2828 /TOD T VAN ROY/Primary Examiner, Art Unit 2828